1 //===-------- SplitKit.h - Toolkit for splitting live ranges ----*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the SplitAnalysis class as well as mutator functions for
11 // live range splitting.
13 //===----------------------------------------------------------------------===//
15 #include "llvm/ADT/DenseMap.h"
16 #include "llvm/ADT/IntervalMap.h"
17 #include "llvm/ADT/SmallPtrSet.h"
18 #include "llvm/CodeGen/SlotIndexes.h"
22 class ConnectedVNInfoEqClasses;
27 class MachineLoopInfo;
28 class MachineRegisterInfo;
29 class TargetInstrInfo;
30 class TargetRegisterInfo;
35 /// At some point we should just include MachineDominators.h:
36 class MachineDominatorTree;
37 template <class NodeT> class DomTreeNodeBase;
38 typedef DomTreeNodeBase<MachineBasicBlock> MachineDomTreeNode;
41 /// SplitAnalysis - Analyze a LiveInterval, looking for live range splitting
45 const MachineFunction &MF;
46 const VirtRegMap &VRM;
47 const LiveIntervals &LIS;
48 const MachineLoopInfo &Loops;
49 const TargetInstrInfo &TII;
51 // Instructions using the the current register.
52 typedef SmallPtrSet<const MachineInstr*, 16> InstrPtrSet;
53 InstrPtrSet UsingInstrs;
55 // Sorted slot indexes of using instructions.
56 SmallVector<SlotIndex, 8> UseSlots;
58 // The number of instructions using CurLI in each basic block.
59 typedef DenseMap<const MachineBasicBlock*, unsigned> BlockCountMap;
60 BlockCountMap UsingBlocks;
62 /// Additional information about basic blocks where the current variable is
63 /// live. Such a block will look like one of these templates:
65 /// 1. | o---x | Internal to block. Variable is only live in this block.
66 /// 2. |---x | Live-in, kill.
67 /// 3. | o---| Def, live-out.
68 /// 4. |---x o---| Live-in, kill, def, live-out.
69 /// 5. |---o---o---| Live-through with uses or defs.
70 /// 6. |-----------| Live-through without uses. Transparent.
73 MachineBasicBlock *MBB;
74 SlotIndex Start; ///< Beginining of block.
75 SlotIndex Stop; ///< End of block.
76 SlotIndex FirstUse; ///< First instr using current reg.
77 SlotIndex LastUse; ///< Last instr using current reg.
78 SlotIndex Kill; ///< Interval end point inside block.
79 SlotIndex Def; ///< Interval start point inside block.
80 /// Last possible point for splitting live ranges.
81 SlotIndex LastSplitPoint;
82 bool Uses; ///< Current reg has uses or defs in block.
83 bool LiveThrough; ///< Live in whole block (Templ 5. or 6. above).
84 bool LiveIn; ///< Current reg is live in.
85 bool LiveOut; ///< Current reg is live out.
87 // Per-interference pattern scratch data.
88 bool OverlapEntry; ///< Interference overlaps entering interval.
89 bool OverlapExit; ///< Interference overlaps exiting interval.
92 /// Basic blocks where var is live. This array is parallel to
94 SmallVector<BlockInfo, 8> LiveBlocks;
97 // Current live interval.
98 const LiveInterval *CurLI;
100 // Sumarize statistics by counting instructions using CurLI.
103 /// calcLiveBlockInfo - Compute per-block information about CurLI.
104 void calcLiveBlockInfo();
106 /// canAnalyzeBranch - Return true if MBB ends in a branch that can be
108 bool canAnalyzeBranch(const MachineBasicBlock *MBB);
111 SplitAnalysis(const VirtRegMap &vrm, const LiveIntervals &lis,
112 const MachineLoopInfo &mli);
114 /// analyze - set CurLI to the specified interval, and analyze how it may be
116 void analyze(const LiveInterval *li);
118 /// clear - clear all data structures so SplitAnalysis is ready to analyze a
122 /// getParent - Return the last analyzed interval.
123 const LiveInterval &getParent() const { return *CurLI; }
125 /// hasUses - Return true if MBB has any uses of CurLI.
126 bool hasUses(const MachineBasicBlock *MBB) const {
127 return UsingBlocks.lookup(MBB);
130 /// isOriginalEndpoint - Return true if the original live range was killed or
131 /// (re-)defined at Idx. Idx should be the 'def' slot for a normal kill/def,
132 /// and 'use' for an early-clobber def.
133 /// This can be used to recognize code inserted by earlier live range
135 bool isOriginalEndpoint(SlotIndex Idx) const;
137 typedef SmallPtrSet<const MachineBasicBlock*, 16> BlockPtrSet;
139 // Print a set of blocks with use counts.
140 void print(const BlockPtrSet&, raw_ostream&) const;
142 /// getMultiUseBlocks - Add basic blocks to Blocks that may benefit from
143 /// having CurLI split to a new live interval. Return true if Blocks can be
144 /// passed to SplitEditor::splitSingleBlocks.
145 bool getMultiUseBlocks(BlockPtrSet &Blocks);
149 /// SplitEditor - Edit machine code and LiveIntervals for live range
152 /// - Create a SplitEditor from a SplitAnalysis.
153 /// - Start a new live interval with openIntv.
154 /// - Mark the places where the new interval is entered using enterIntv*
155 /// - Mark the ranges where the new interval is used with useIntv*
156 /// - Mark the places where the interval is exited with exitIntv*.
157 /// - Finish the current interval with closeIntv and repeat from 2.
158 /// - Rewrite instructions with finish().
164 MachineRegisterInfo &MRI;
165 MachineDominatorTree &MDT;
166 const TargetInstrInfo &TII;
167 const TargetRegisterInfo &TRI;
169 /// Edit - The current parent register and new intervals created.
172 /// Index into Edit of the currently open interval.
173 /// The index 0 is used for the complement, so the first interval started by
174 /// openIntv will be 1.
177 typedef IntervalMap<SlotIndex, unsigned> RegAssignMap;
179 /// Allocator for the interval map. This will eventually be shared with
180 /// SlotIndexes and LiveIntervals.
181 RegAssignMap::Allocator Allocator;
183 /// RegAssign - Map of the assigned register indexes.
184 /// Edit.get(RegAssign.lookup(Idx)) is the register that should be live at
186 RegAssignMap RegAssign;
188 typedef DenseMap<std::pair<unsigned, unsigned>, VNInfo*> ValueMap;
190 /// Values - keep track of the mapping from parent values to values in the new
191 /// intervals. Given a pair (RegIdx, ParentVNI->id), Values contains:
193 /// 1. No entry - the value is not mapped to Edit.get(RegIdx).
194 /// 2. Null - the value is mapped to multiple values in Edit.get(RegIdx).
195 /// Each value is represented by a minimal live range at its def.
196 /// 3. A non-null VNInfo - the value is mapped to a single new value.
197 /// The new value has no live ranges anywhere.
200 typedef std::pair<VNInfo*, MachineDomTreeNode*> LiveOutPair;
201 typedef DenseMap<MachineBasicBlock*,LiveOutPair> LiveOutMap;
203 // LiveOutCache - Map each basic block where a new register is live out to the
204 // live-out value and its defining block.
205 // One of these conditions shall be true:
207 // 1. !LiveOutCache.count(MBB)
208 // 2. LiveOutCache[MBB].second.getNode() == MBB
209 // 3. forall P in preds(MBB): LiveOutCache[P] == LiveOutCache[MBB]
211 // This is only a cache, the values can be computed as:
213 // VNI = Edit.get(RegIdx)->getVNInfoAt(LIS.getMBBEndIdx(MBB))
214 // Node = mbt_[LIS.getMBBFromIndex(VNI->def)]
216 // The cache is also used as a visited set by extendRange(). It can be shared
217 // by all the new registers because at most one is live out of each block.
218 LiveOutMap LiveOutCache;
220 /// defValue - define a value in RegIdx from ParentVNI at Idx.
221 /// Idx does not have to be ParentVNI->def, but it must be contained within
222 /// ParentVNI's live range in ParentLI. The new value is added to the value
224 /// Return the new LI value.
225 VNInfo *defValue(unsigned RegIdx, const VNInfo *ParentVNI, SlotIndex Idx);
227 /// markComplexMapped - Mark ParentVNI as complex mapped in RegIdx regardless
228 /// of the number of defs.
229 void markComplexMapped(unsigned RegIdx, const VNInfo *ParentVNI);
231 /// defFromParent - Define Reg from ParentVNI at UseIdx using either
232 /// rematerialization or a COPY from parent. Return the new value.
233 VNInfo *defFromParent(unsigned RegIdx,
236 MachineBasicBlock &MBB,
237 MachineBasicBlock::iterator I);
239 /// extendRange - Extend the live range of Edit.get(RegIdx) so it reaches Idx.
240 /// Insert PHIDefs as needed to preserve SSA form.
241 void extendRange(unsigned RegIdx, SlotIndex Idx);
243 /// updateSSA - Insert PHIDefs as necessary and update LiveOutCache such that
244 /// Edit.get(RegIdx) is live-in to all the blocks in LiveIn.
245 /// Return the value that is eventually live-in to IdxMBB.
246 VNInfo *updateSSA(unsigned RegIdx,
247 SmallVectorImpl<MachineDomTreeNode*> &LiveIn,
249 const MachineBasicBlock *IdxMBB);
251 /// transferSimpleValues - Transfer simply defined values to the new ranges.
252 /// Return true if any complex ranges were skipped.
253 bool transferSimpleValues();
255 /// extendPHIKillRanges - Extend the ranges of all values killed by original
257 void extendPHIKillRanges();
259 /// rewriteAssigned - Rewrite all uses of Edit.getReg() to assigned registers.
260 void rewriteAssigned(bool ExtendRanges);
262 /// rewriteComponents - Rewrite all uses of Intv[0] according to the eq
263 /// classes in ConEQ.
264 /// This must be done when Intvs[0] is styill live at all uses, before calling
265 /// ConEq.Distribute().
266 void rewriteComponents(const SmallVectorImpl<LiveInterval*> &Intvs,
267 const ConnectedVNInfoEqClasses &ConEq);
270 /// Create a new SplitEditor for editing the LiveInterval analyzed by SA.
271 /// Newly created intervals will be appended to newIntervals.
272 SplitEditor(SplitAnalysis &SA, LiveIntervals&, VirtRegMap&,
273 MachineDominatorTree&);
275 /// reset - Prepare for a new split.
276 void reset(LiveRangeEdit&);
278 /// Create a new virtual register and live interval.
281 /// enterIntvBefore - Enter the open interval before the instruction at Idx.
282 /// If the parent interval is not live before Idx, a COPY is not inserted.
283 /// Return the beginning of the new live range.
284 SlotIndex enterIntvBefore(SlotIndex Idx);
286 /// enterIntvAtEnd - Enter the open interval at the end of MBB.
287 /// Use the open interval from he inserted copy to the MBB end.
288 /// Return the beginning of the new live range.
289 SlotIndex enterIntvAtEnd(MachineBasicBlock &MBB);
291 /// useIntv - indicate that all instructions in MBB should use OpenLI.
292 void useIntv(const MachineBasicBlock &MBB);
294 /// useIntv - indicate that all instructions in range should use OpenLI.
295 void useIntv(SlotIndex Start, SlotIndex End);
297 /// leaveIntvAfter - Leave the open interval after the instruction at Idx.
298 /// Return the end of the live range.
299 SlotIndex leaveIntvAfter(SlotIndex Idx);
301 /// leaveIntvBefore - Leave the open interval before the instruction at Idx.
302 /// Return the end of the live range.
303 SlotIndex leaveIntvBefore(SlotIndex Idx);
305 /// leaveIntvAtTop - Leave the interval at the top of MBB.
306 /// Add liveness from the MBB top to the copy.
307 /// Return the end of the live range.
308 SlotIndex leaveIntvAtTop(MachineBasicBlock &MBB);
310 /// overlapIntv - Indicate that all instructions in range should use the open
311 /// interval, but also let the complement interval be live.
313 /// This doubles the register pressure, but is sometimes required to deal with
314 /// register uses after the last valid split point.
316 /// The Start index should be a return value from a leaveIntv* call, and End
317 /// should be in the same basic block. The parent interval must have the same
318 /// value across the range.
320 void overlapIntv(SlotIndex Start, SlotIndex End);
322 /// closeIntv - Indicate that we are done editing the currently open
323 /// LiveInterval, and ranges can be trimmed.
326 /// finish - after all the new live ranges have been created, compute the
327 /// remaining live range, and rewrite instructions to use the new registers.
330 /// dump - print the current interval maping to dbgs().
333 // ===--- High level methods ---===
335 /// splitSingleBlocks - Split CurLI into a separate live interval inside each
336 /// basic block in Blocks.
337 void splitSingleBlocks(const SplitAnalysis::BlockPtrSet &Blocks);