1 //===---------------------------- StackMaps.cpp ---------------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #include "llvm/CodeGen/StackMaps.h"
11 #include "llvm/CodeGen/AsmPrinter.h"
12 #include "llvm/CodeGen/MachineFrameInfo.h"
13 #include "llvm/CodeGen/MachineFunction.h"
14 #include "llvm/CodeGen/MachineInstr.h"
15 #include "llvm/IR/DataLayout.h"
16 #include "llvm/MC/MCContext.h"
17 #include "llvm/MC/MCExpr.h"
18 #include "llvm/MC/MCObjectFileInfo.h"
19 #include "llvm/MC/MCSectionMachO.h"
20 #include "llvm/MC/MCStreamer.h"
21 #include "llvm/Support/CommandLine.h"
22 #include "llvm/Support/Debug.h"
23 #include "llvm/Support/raw_ostream.h"
24 #include "llvm/Target/TargetMachine.h"
25 #include "llvm/Target/TargetOpcodes.h"
26 #include "llvm/Target/TargetRegisterInfo.h"
31 #define DEBUG_TYPE "stackmaps"
33 static cl::opt<int> StackMapVersion("stackmap-version", cl::init(1),
34 cl::desc("Specify the stackmap encoding version (default = 1)"));
36 PatchPointOpers::PatchPointOpers(const MachineInstr *MI)
38 HasDef(MI->getOperand(0).isReg() && MI->getOperand(0).isDef() &&
39 !MI->getOperand(0).isImplicit()),
40 IsAnyReg(MI->getOperand(getMetaIdx(CCPos)).getImm() == CallingConv::AnyReg)
43 unsigned CheckStartIdx = 0, e = MI->getNumOperands();
44 while (CheckStartIdx < e && MI->getOperand(CheckStartIdx).isReg() &&
45 MI->getOperand(CheckStartIdx).isDef() &&
46 !MI->getOperand(CheckStartIdx).isImplicit())
49 assert(getMetaIdx() == CheckStartIdx &&
50 "Unexpected additional definition in Patchpoint intrinsic.");
54 unsigned PatchPointOpers::getNextScratchIdx(unsigned StartIdx) const {
56 StartIdx = getVarIdx();
58 // Find the next scratch register (implicit def and early clobber)
59 unsigned ScratchIdx = StartIdx, e = MI->getNumOperands();
60 while (ScratchIdx < e &&
61 !(MI->getOperand(ScratchIdx).isReg() &&
62 MI->getOperand(ScratchIdx).isDef() &&
63 MI->getOperand(ScratchIdx).isImplicit() &&
64 MI->getOperand(ScratchIdx).isEarlyClobber()))
67 assert(ScratchIdx != e && "No scratch register available");
71 StackMaps::StackMaps(AsmPrinter &AP) : AP(AP) {
72 if (StackMapVersion != 1)
73 llvm_unreachable("Unsupported stackmap version!");
76 MachineInstr::const_mop_iterator
77 StackMaps::parseOperand(MachineInstr::const_mop_iterator MOI,
78 MachineInstr::const_mop_iterator MOE,
79 LocationVec &Locs, LiveOutVec &LiveOuts) const {
81 switch (MOI->getImm()) {
82 default: llvm_unreachable("Unrecognized operand type.");
83 case StackMaps::DirectMemRefOp: {
84 unsigned Size = AP.TM.getDataLayout()->getPointerSizeInBits();
85 assert((Size % 8) == 0 && "Need pointer size in bytes.");
87 unsigned Reg = (++MOI)->getReg();
88 int64_t Imm = (++MOI)->getImm();
89 Locs.push_back(Location(StackMaps::Location::Direct, Size, Reg, Imm));
92 case StackMaps::IndirectMemRefOp: {
93 int64_t Size = (++MOI)->getImm();
94 assert(Size > 0 && "Need a valid size for indirect memory locations.");
95 unsigned Reg = (++MOI)->getReg();
96 int64_t Imm = (++MOI)->getImm();
97 Locs.push_back(Location(StackMaps::Location::Indirect, Size, Reg, Imm));
100 case StackMaps::ConstantOp: {
102 assert(MOI->isImm() && "Expected constant operand.");
103 int64_t Imm = MOI->getImm();
104 Locs.push_back(Location(Location::Constant, sizeof(int64_t), 0, Imm));
111 // The physical register number will ultimately be encoded as a DWARF regno.
112 // The stack map also records the size of a spill slot that can hold the
113 // register content. (The runtime can track the actual size of the data type
116 // Skip implicit registers (this includes our scratch registers)
117 if (MOI->isImplicit())
120 assert(TargetRegisterInfo::isPhysicalRegister(MOI->getReg()) &&
121 "Virtreg operands should have been rewritten before now.");
122 const TargetRegisterClass *RC =
123 AP.TM.getRegisterInfo()->getMinimalPhysRegClass(MOI->getReg());
124 assert(!MOI->getSubReg() && "Physical subreg still around.");
126 Location(Location::Register, RC->getSize(), MOI->getReg(), 0));
130 if (MOI->isRegLiveOut())
131 LiveOuts = parseRegisterLiveOutMask(MOI->getRegLiveOut());
136 /// Go up the super-register chain until we hit a valid dwarf register number.
137 static unsigned getDwarfRegNum(unsigned Reg, const TargetRegisterInfo *TRI) {
138 int RegNo = TRI->getDwarfRegNum(Reg, false);
139 for (MCSuperRegIterator SR(Reg, TRI); SR.isValid() && RegNo < 0; ++SR)
140 RegNo = TRI->getDwarfRegNum(*SR, false);
142 assert(RegNo >= 0 && "Invalid Dwarf register number.");
143 return (unsigned) RegNo;
146 /// Create a live-out register record for the given register Reg.
147 StackMaps::LiveOutReg
148 StackMaps::createLiveOutReg(unsigned Reg, const TargetRegisterInfo *TRI) const {
149 unsigned RegNo = getDwarfRegNum(Reg, TRI);
150 unsigned Size = TRI->getMinimalPhysRegClass(Reg)->getSize();
151 return LiveOutReg(Reg, RegNo, Size);
154 /// Parse the register live-out mask and return a vector of live-out registers
155 /// that need to be recorded in the stackmap.
156 StackMaps::LiveOutVec
157 StackMaps::parseRegisterLiveOutMask(const uint32_t *Mask) const {
158 assert(Mask && "No register mask specified");
159 const TargetRegisterInfo *TRI = AP.TM.getRegisterInfo();
162 // Create a LiveOutReg for each bit that is set in the register mask.
163 for (unsigned Reg = 0, NumRegs = TRI->getNumRegs(); Reg != NumRegs; ++Reg)
164 if ((Mask[Reg / 32] >> Reg % 32) & 1)
165 LiveOuts.push_back(createLiveOutReg(Reg, TRI));
167 // We don't need to keep track of a register if its super-register is already
168 // in the list. Merge entries that refer to the same dwarf register and use
169 // the maximum size that needs to be spilled.
170 std::sort(LiveOuts.begin(), LiveOuts.end());
171 for (LiveOutVec::iterator I = LiveOuts.begin(), E = LiveOuts.end();
173 for (LiveOutVec::iterator II = std::next(I); II != E; ++II) {
174 if (I->RegNo != II->RegNo) {
175 // Skip all the now invalid entries.
179 I->Size = std::max(I->Size, II->Size);
180 if (TRI->isSuperRegister(I->Reg, II->Reg))
185 LiveOuts.erase(std::remove_if(LiveOuts.begin(), LiveOuts.end(),
186 LiveOutReg::IsInvalid), LiveOuts.end());
190 void StackMaps::recordStackMapOpers(const MachineInstr &MI, uint64_t ID,
191 MachineInstr::const_mop_iterator MOI,
192 MachineInstr::const_mop_iterator MOE,
195 MCContext &OutContext = AP.OutStreamer.getContext();
196 MCSymbol *MILabel = OutContext.CreateTempSymbol();
197 AP.OutStreamer.EmitLabel(MILabel);
199 LocationVec Locations;
203 assert(PatchPointOpers(&MI).hasDef() && "Stackmap has no return value.");
204 parseOperand(MI.operands_begin(), std::next(MI.operands_begin()),
205 Locations, LiveOuts);
210 MOI = parseOperand(MOI, MOE, Locations, LiveOuts);
213 // Move large constants into the constant pool.
214 for (LocationVec::iterator I = Locations.begin(), E = Locations.end();
216 // Constants are encoded as sign-extended integers.
217 // -1 is directly encoded as .long 0xFFFFFFFF with no constant pool.
218 if (I->LocType == Location::Constant &&
219 ((I->Offset + (int64_t(1)<<31)) >> 32) != 0) {
220 I->LocType = Location::ConstantIndex;
221 auto Result = ConstPool.insert(std::make_pair(I->Offset, I->Offset));
222 I->Offset = Result.first - ConstPool.begin();
226 // Create an expression to calculate the offset of the callsite from function
228 const MCExpr *CSOffsetExpr = MCBinaryExpr::CreateSub(
229 MCSymbolRefExpr::Create(MILabel, OutContext),
230 MCSymbolRefExpr::Create(AP.CurrentFnSym, OutContext),
233 CSInfos.push_back(CallsiteInfo(CSOffsetExpr, ID, Locations, LiveOuts));
235 // Record the stack size of the current function.
236 const MachineFrameInfo *MFI = AP.MF->getFrameInfo();
237 FnStackSize[AP.CurrentFnSym] =
238 MFI->hasVarSizedObjects() ? UINT64_MAX : MFI->getStackSize();
241 void StackMaps::recordStackMap(const MachineInstr &MI) {
242 assert(MI.getOpcode() == TargetOpcode::STACKMAP && "expected stackmap");
244 int64_t ID = MI.getOperand(0).getImm();
245 recordStackMapOpers(MI, ID, std::next(MI.operands_begin(), 2),
249 void StackMaps::recordPatchPoint(const MachineInstr &MI) {
250 assert(MI.getOpcode() == TargetOpcode::PATCHPOINT && "expected patchpoint");
252 PatchPointOpers opers(&MI);
253 int64_t ID = opers.getMetaOper(PatchPointOpers::IDPos).getImm();
255 MachineInstr::const_mop_iterator MOI =
256 std::next(MI.operands_begin(), opers.getStackMapStartIdx());
257 recordStackMapOpers(MI, ID, MOI, MI.operands_end(),
258 opers.isAnyReg() && opers.hasDef());
262 LocationVec &Locations = CSInfos.back().Locations;
263 if (opers.isAnyReg()) {
264 unsigned NArgs = opers.getMetaOper(PatchPointOpers::NArgPos).getImm();
265 for (unsigned i = 0, e = (opers.hasDef() ? NArgs+1 : NArgs); i != e; ++i)
266 assert(Locations[i].LocType == Location::Register &&
267 "anyreg arg must be in reg.");
272 /// Emit the stackmap header.
275 /// uint8 : Stack Map Version (currently 1)
276 /// uint8 : Reserved (expected to be 0)
277 /// uint16 : Reserved (expected to be 0)
279 /// uint32 : NumFunctions
280 /// uint32 : NumConstants
281 /// uint32 : NumRecords
282 void StackMaps::emitStackmapHeader(MCStreamer &OS) {
284 OS.EmitIntValue(StackMapVersion, 1); // Version.
285 OS.EmitIntValue(0, 1); // Reserved.
286 OS.EmitIntValue(0, 2); // Reserved.
289 DEBUG(dbgs() << WSMP << "#functions = " << FnStackSize.size() << '\n');
290 OS.EmitIntValue(FnStackSize.size(), 4);
292 DEBUG(dbgs() << WSMP << "#constants = " << ConstPool.size() << '\n');
293 OS.EmitIntValue(ConstPool.size(), 4);
295 DEBUG(dbgs() << WSMP << "#callsites = " << CSInfos.size() << '\n');
296 OS.EmitIntValue(CSInfos.size(), 4);
299 /// Emit the function frame record for each function.
301 /// StkSizeRecord[NumFunctions] {
302 /// uint64 : Function Address
303 /// uint64 : Stack Size
305 void StackMaps::emitFunctionFrameRecords(MCStreamer &OS) {
306 // Function Frame records.
307 DEBUG(dbgs() << WSMP << "functions:\n");
308 for (auto const &FR : FnStackSize) {
309 DEBUG(dbgs() << WSMP << "function addr: " << FR.first
310 << " frame size: " << FR.second);
311 OS.EmitSymbolValue(FR.first, 8);
312 OS.EmitIntValue(FR.second, 8);
316 /// Emit the constant pool.
318 /// int64 : Constants[NumConstants]
319 void StackMaps::emitConstantPoolEntries(MCStreamer &OS) {
320 // Constant pool entries.
321 DEBUG(dbgs() << WSMP << "constants:\n");
322 for (auto ConstEntry : ConstPool) {
323 DEBUG(dbgs() << WSMP << ConstEntry.second << '\n');
324 OS.EmitIntValue(ConstEntry.second, 8);
328 /// Emit the callsite info for each callsite.
330 /// StkMapRecord[NumRecords] {
331 /// uint64 : PatchPoint ID
332 /// uint32 : Instruction Offset
333 /// uint16 : Reserved (record flags)
334 /// uint16 : NumLocations
335 /// Location[NumLocations] {
336 /// uint8 : Register | Direct | Indirect | Constant | ConstantIndex
337 /// uint8 : Size in Bytes
338 /// uint16 : Dwarf RegNum
342 /// uint16 : NumLiveOuts
343 /// LiveOuts[NumLiveOuts] {
344 /// uint16 : Dwarf RegNum
346 /// uint8 : Size in Bytes
348 /// uint32 : Padding (only if required to align to 8 byte)
351 /// Location Encoding, Type, Value:
352 /// 0x1, Register, Reg (value in register)
353 /// 0x2, Direct, Reg + Offset (frame index)
354 /// 0x3, Indirect, [Reg + Offset] (spilled value)
355 /// 0x4, Constant, Offset (small constant)
356 /// 0x5, ConstIndex, Constants[Offset] (large constant)
357 void StackMaps::emitCallsiteEntries(MCStreamer &OS,
358 const TargetRegisterInfo *TRI) {
360 DEBUG(dbgs() << WSMP << "callsites:\n");
361 for (const auto &CSI : CSInfos) {
362 const LocationVec &CSLocs = CSI.Locations;
363 const LiveOutVec &LiveOuts = CSI.LiveOuts;
365 DEBUG(dbgs() << WSMP << "callsite " << CSI.ID << "\n");
367 // Verify stack map entry. It's better to communicate a problem to the
368 // runtime than crash in case of in-process compilation. Currently, we do
369 // simple overflow checks, but we may eventually communicate other
370 // compilation errors this way.
371 if (CSLocs.size() > UINT16_MAX || LiveOuts.size() > UINT16_MAX) {
372 OS.EmitIntValue(UINT64_MAX, 8); // Invalid ID.
373 OS.EmitValue(CSI.CSOffsetExpr, 4);
374 OS.EmitIntValue(0, 2); // Reserved.
375 OS.EmitIntValue(0, 2); // 0 locations.
376 OS.EmitIntValue(0, 2); // padding.
377 OS.EmitIntValue(0, 2); // 0 live-out registers.
378 OS.EmitIntValue(0, 4); // padding.
382 OS.EmitIntValue(CSI.ID, 8);
383 OS.EmitValue(CSI.CSOffsetExpr, 4);
385 // Reserved for flags.
386 OS.EmitIntValue(0, 2);
388 DEBUG(dbgs() << WSMP << " has " << CSLocs.size() << " locations\n");
390 OS.EmitIntValue(CSLocs.size(), 2);
392 unsigned OperIdx = 0;
393 for (const auto &Loc : CSLocs) {
395 int Offset = Loc.Offset;
397 RegNo = getDwarfRegNum(Loc.Reg, TRI);
399 // If this is a register location, put the subregister byte offset in
400 // the location offset.
401 if (Loc.LocType == Location::Register) {
402 assert(!Loc.Offset && "Register location should have zero offset");
403 unsigned LLVMRegNo = TRI->getLLVMRegNum(RegNo, false);
404 unsigned SubRegIdx = TRI->getSubRegIndex(LLVMRegNo, Loc.Reg);
406 Offset = TRI->getSubRegIdxOffset(SubRegIdx);
410 assert(Loc.LocType != Location::Register &&
411 "Missing location register");
414 DEBUG(dbgs() << WSMP << " Loc " << OperIdx << ": ";
415 switch (Loc.LocType) {
416 case Location::Unprocessed:
417 dbgs() << "<Unprocessed operand>";
419 case Location::Register:
420 dbgs() << "Register " << TRI->getName(Loc.Reg);
422 case Location::Direct:
423 dbgs() << "Direct " << TRI->getName(Loc.Reg);
425 dbgs() << " + " << Loc.Offset;
427 case Location::Indirect:
428 dbgs() << "Indirect " << TRI->getName(Loc.Reg)
429 << " + " << Loc.Offset;
431 case Location::Constant:
432 dbgs() << "Constant " << Loc.Offset;
434 case Location::ConstantIndex:
435 dbgs() << "Constant Index " << Loc.Offset;
438 dbgs() << " [encoding: .byte " << Loc.LocType
439 << ", .byte " << Loc.Size
440 << ", .short " << RegNo
441 << ", .int " << Offset << "]\n";
444 OS.EmitIntValue(Loc.LocType, 1);
445 OS.EmitIntValue(Loc.Size, 1);
446 OS.EmitIntValue(RegNo, 2);
447 OS.EmitIntValue(Offset, 4);
451 DEBUG(dbgs() << WSMP << " has " << LiveOuts.size()
452 << " live-out registers\n");
454 // Num live-out registers and padding to align to 4 byte.
455 OS.EmitIntValue(0, 2);
456 OS.EmitIntValue(LiveOuts.size(), 2);
459 for (const auto &LO : LiveOuts) {
460 DEBUG(dbgs() << WSMP << " LO " << OperIdx << ": "
461 << TRI->getName(LO.Reg)
462 << " [encoding: .short " << LO.RegNo
463 << ", .byte 0, .byte " << LO.Size << "]\n");
464 OS.EmitIntValue(LO.RegNo, 2);
465 OS.EmitIntValue(0, 1);
466 OS.EmitIntValue(LO.Size, 1);
468 // Emit alignment to 8 byte.
469 OS.EmitValueToAlignment(8);
473 /// Serialize the stackmap data.
474 void StackMaps::serializeToStackMapSection() {
475 // Bail out if there's no stack map data.
476 assert((!CSInfos.empty() || (CSInfos.empty() && ConstPool.empty())) &&
477 "Expected empty constant pool too!");
478 assert((!CSInfos.empty() || (CSInfos.empty() && FnStackSize.empty())) &&
479 "Expected empty function record too!");
483 MCContext &OutContext = AP.OutStreamer.getContext();
484 MCStreamer &OS = AP.OutStreamer;
485 const TargetRegisterInfo *TRI = AP.TM.getRegisterInfo();
487 // Create the section.
488 const MCSection *StackMapSection =
489 OutContext.getObjectFileInfo()->getStackMapSection();
490 OS.SwitchSection(StackMapSection);
492 // Emit a dummy symbol to force section inclusion.
493 OS.EmitLabel(OutContext.GetOrCreateSymbol(Twine("__LLVM_StackMaps")));
496 DEBUG(dbgs() << "********** Stack Map Output **********\n");
497 emitStackmapHeader(OS);
498 emitFunctionFrameRecords(OS);
499 emitConstantPoolEntries(OS);
500 emitCallsiteEntries(OS, TRI);