1 //===-- StackSlotColoring.cpp - Stack slot coloring pass. -----------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the stack slot coloring pass.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "stackcoloring"
15 #include "VirtRegMap.h"
16 #include "llvm/CodeGen/Passes.h"
17 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
18 #include "llvm/CodeGen/LiveStackAnalysis.h"
19 #include "llvm/CodeGen/MachineFrameInfo.h"
20 #include "llvm/CodeGen/MachineLoopInfo.h"
21 #include "llvm/CodeGen/MachineRegisterInfo.h"
22 #include "llvm/CodeGen/PseudoSourceValue.h"
23 #include "llvm/Support/CommandLine.h"
24 #include "llvm/Support/Compiler.h"
25 #include "llvm/Support/Debug.h"
26 #include "llvm/Target/TargetInstrInfo.h"
27 #include "llvm/Target/TargetMachine.h"
28 #include "llvm/ADT/BitVector.h"
29 #include "llvm/ADT/SmallSet.h"
30 #include "llvm/ADT/SmallVector.h"
31 #include "llvm/ADT/Statistic.h"
36 DisableSharing("no-stack-slot-sharing",
37 cl::init(false), cl::Hidden,
38 cl::desc("Suppress slot sharing during stack coloring"));
41 ColorWithRegsOpt("color-ss-with-regs",
42 cl::init(false), cl::Hidden,
43 cl::desc("Color stack slots with free registers"));
46 static cl::opt<int> DCELimit("ssc-dce-limit", cl::init(-1), cl::Hidden);
48 STATISTIC(NumEliminated, "Number of stack slots eliminated due to coloring");
49 STATISTIC(NumRegRepl, "Number of stack slot refs replaced with reg refs");
50 STATISTIC(NumLoadElim, "Number of loads eliminated");
51 STATISTIC(NumStoreElim, "Number of stores eliminated");
52 STATISTIC(NumDead, "Number of trivially dead stack accesses eliminated");
55 class VISIBILITY_HIDDEN StackSlotColoring : public MachineFunctionPass {
59 MachineFrameInfo *MFI;
60 MachineRegisterInfo *MRI;
61 const TargetInstrInfo *TII;
62 const TargetRegisterInfo *TRI;
63 const MachineLoopInfo *loopInfo;
65 // SSIntervals - Spill slot intervals.
66 std::vector<LiveInterval*> SSIntervals;
68 // SSRefs - Keep a list of frame index references for each spill slot.
69 SmallVector<SmallVector<MachineInstr*, 8>, 16> SSRefs;
71 // OrigAlignments - Alignments of stack objects before coloring.
72 SmallVector<unsigned, 16> OrigAlignments;
74 // OrigSizes - Sizess of stack objects before coloring.
75 SmallVector<unsigned, 16> OrigSizes;
77 // AllColors - If index is set, it's a spill slot, i.e. color.
78 // FIXME: This assumes PEI locate spill slot with smaller indices
79 // closest to stack pointer / frame pointer. Therefore, smaller
80 // index == better color.
83 // NextColor - Next "color" that's not yet used.
86 // UsedColors - "Colors" that have been assigned.
89 // Assignments - Color to intervals mapping.
90 SmallVector<SmallVector<LiveInterval*,4>, 16> Assignments;
93 static char ID; // Pass identification
95 MachineFunctionPass(&ID), ColorWithRegs(false), NextColor(-1) {}
96 StackSlotColoring(bool RegColor) :
97 MachineFunctionPass(&ID), ColorWithRegs(RegColor), NextColor(-1) {}
99 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
100 AU.addRequired<LiveStacks>();
101 AU.addRequired<VirtRegMap>();
102 AU.addPreserved<VirtRegMap>();
103 AU.addRequired<MachineLoopInfo>();
104 AU.addPreserved<MachineLoopInfo>();
105 AU.addPreservedID(MachineDominatorsID);
106 MachineFunctionPass::getAnalysisUsage(AU);
109 virtual bool runOnMachineFunction(MachineFunction &MF);
110 virtual const char* getPassName() const {
111 return "Stack Slot Coloring";
115 void InitializeSlots();
116 void ScanForSpillSlotRefs(MachineFunction &MF);
117 bool OverlapWithAssignments(LiveInterval *li, int Color) const;
118 int ColorSlot(LiveInterval *li);
119 bool ColorSlots(MachineFunction &MF);
120 bool ColorSlotsWithFreeRegs(SmallVector<int, 16> &SlotMapping,
121 SmallVector<SmallVector<int, 4>, 16> &RevMap,
122 BitVector &SlotIsReg);
123 void RewriteInstruction(MachineInstr *MI, int OldFI, int NewFI,
124 MachineFunction &MF);
125 bool PropagateBackward(MachineBasicBlock::iterator MII,
126 MachineBasicBlock *MBB,
127 unsigned OldReg, unsigned NewReg);
128 bool PropagateForward(MachineBasicBlock::iterator MII,
129 MachineBasicBlock *MBB,
130 unsigned OldReg, unsigned NewReg);
131 void UnfoldAndRewriteInstruction(MachineInstr *MI, int OldFI,
132 unsigned Reg, const TargetRegisterClass *RC,
133 SmallSet<unsigned, 4> &Defs,
134 MachineFunction &MF);
135 bool AllMemRefsCanBeUnfolded(int SS);
136 bool RemoveDeadStores(MachineBasicBlock* MBB);
138 } // end anonymous namespace
140 char StackSlotColoring::ID = 0;
142 static RegisterPass<StackSlotColoring>
143 X("stack-slot-coloring", "Stack Slot Coloring");
145 FunctionPass *llvm::createStackSlotColoringPass(bool RegColor) {
146 return new StackSlotColoring(RegColor);
150 // IntervalSorter - Comparison predicate that sort live intervals by
152 struct IntervalSorter {
153 bool operator()(LiveInterval* LHS, LiveInterval* RHS) const {
154 return LHS->weight > RHS->weight;
159 /// ScanForSpillSlotRefs - Scan all the machine instructions for spill slot
160 /// references and update spill slot weights.
161 void StackSlotColoring::ScanForSpillSlotRefs(MachineFunction &MF) {
162 SSRefs.resize(MFI->getObjectIndexEnd());
164 // FIXME: Need the equivalent of MachineRegisterInfo for frameindex operands.
165 for (MachineFunction::iterator MBBI = MF.begin(), E = MF.end();
167 MachineBasicBlock *MBB = &*MBBI;
168 unsigned loopDepth = loopInfo->getLoopDepth(MBB);
169 for (MachineBasicBlock::iterator MII = MBB->begin(), EE = MBB->end();
171 MachineInstr *MI = &*MII;
172 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
173 MachineOperand &MO = MI->getOperand(i);
176 int FI = MO.getIndex();
179 if (!LS->hasInterval(FI))
181 LiveInterval &li = LS->getInterval(FI);
182 li.weight += LiveIntervals::getSpillWeight(false, true, loopDepth);
183 SSRefs[FI].push_back(MI);
189 /// InitializeSlots - Process all spill stack slot liveintervals and add them
190 /// to a sorted (by weight) list.
191 void StackSlotColoring::InitializeSlots() {
192 int LastFI = MFI->getObjectIndexEnd();
193 OrigAlignments.resize(LastFI);
194 OrigSizes.resize(LastFI);
195 AllColors.resize(LastFI);
196 UsedColors.resize(LastFI);
197 Assignments.resize(LastFI);
199 // Gather all spill slots into a list.
200 DOUT << "Spill slot intervals:\n";
201 for (LiveStacks::iterator i = LS->begin(), e = LS->end(); i != e; ++i) {
202 LiveInterval &li = i->second;
204 int FI = li.getStackSlotIndex();
205 if (MFI->isDeadObjectIndex(FI))
207 SSIntervals.push_back(&li);
208 OrigAlignments[FI] = MFI->getObjectAlignment(FI);
209 OrigSizes[FI] = MFI->getObjectSize(FI);
214 // Sort them by weight.
215 std::stable_sort(SSIntervals.begin(), SSIntervals.end(), IntervalSorter());
217 // Get first "color".
218 NextColor = AllColors.find_first();
221 /// OverlapWithAssignments - Return true if LiveInterval overlaps with any
222 /// LiveIntervals that have already been assigned to the specified color.
224 StackSlotColoring::OverlapWithAssignments(LiveInterval *li, int Color) const {
225 const SmallVector<LiveInterval*,4> &OtherLIs = Assignments[Color];
226 for (unsigned i = 0, e = OtherLIs.size(); i != e; ++i) {
227 LiveInterval *OtherLI = OtherLIs[i];
228 if (OtherLI->overlaps(*li))
234 /// ColorSlotsWithFreeRegs - If there are any free registers available, try
235 /// replacing spill slots references with registers instead.
237 StackSlotColoring::ColorSlotsWithFreeRegs(SmallVector<int, 16> &SlotMapping,
238 SmallVector<SmallVector<int, 4>, 16> &RevMap,
239 BitVector &SlotIsReg) {
240 if (!(ColorWithRegs || ColorWithRegsOpt) || !VRM->HasUnusedRegisters())
243 bool Changed = false;
244 DOUT << "Assigning unused registers to spill slots:\n";
245 for (unsigned i = 0, e = SSIntervals.size(); i != e; ++i) {
246 LiveInterval *li = SSIntervals[i];
247 int SS = li->getStackSlotIndex();
248 if (!UsedColors[SS] || li->weight < 20)
249 // If the weight is < 20, i.e. two references in a loop with depth 1,
250 // don't bother with it.
253 // These slots allow to share the same registers.
254 bool AllColored = true;
255 SmallVector<unsigned, 4> ColoredRegs;
256 for (unsigned j = 0, ee = RevMap[SS].size(); j != ee; ++j) {
257 int RSS = RevMap[SS][j];
258 const TargetRegisterClass *RC = LS->getIntervalRegClass(RSS);
259 // If it's not colored to another stack slot, try coloring it
260 // to a "free" register.
265 unsigned Reg = VRM->getFirstUnusedRegister(RC);
270 if (!AllMemRefsCanBeUnfolded(RSS)) {
274 DOUT << "Assigning fi#" << RSS << " to " << TRI->getName(Reg) << '\n';
275 ColoredRegs.push_back(Reg);
276 SlotMapping[RSS] = Reg;
282 // Register and its sub-registers are no longer free.
283 while (!ColoredRegs.empty()) {
284 unsigned Reg = ColoredRegs.back();
285 ColoredRegs.pop_back();
286 VRM->setRegisterUsed(Reg);
287 // If reg is a callee-saved register, it will have to be spilled in
289 MRI->setPhysRegUsed(Reg);
290 for (const unsigned *AS = TRI->getAliasSet(Reg); *AS; ++AS) {
291 VRM->setRegisterUsed(*AS);
292 MRI->setPhysRegUsed(*AS);
295 // This spill slot is dead after the rewrites
297 MFI->RemoveStackObject(SS);
306 /// ColorSlot - Assign a "color" (stack slot) to the specified stack slot.
308 int StackSlotColoring::ColorSlot(LiveInterval *li) {
311 if (!DisableSharing) {
312 // Check if it's possible to reuse any of the used colors.
313 Color = UsedColors.find_first();
314 while (Color != -1) {
315 if (!OverlapWithAssignments(li, Color)) {
320 Color = UsedColors.find_next(Color);
324 // Assign it to the first available color (assumed to be the best) if it's
325 // not possible to share a used color with other objects.
327 assert(NextColor != -1 && "No more spill slots?");
329 UsedColors.set(Color);
330 NextColor = AllColors.find_next(NextColor);
333 // Record the assignment.
334 Assignments[Color].push_back(li);
335 int FI = li->getStackSlotIndex();
336 DOUT << "Assigning fi#" << FI << " to fi#" << Color << "\n";
338 // Change size and alignment of the allocated slot. If there are multiple
339 // objects sharing the same slot, then make sure the size and alignment
340 // are large enough for all.
341 unsigned Align = OrigAlignments[FI];
342 if (!Share || Align > MFI->getObjectAlignment(Color))
343 MFI->setObjectAlignment(Color, Align);
344 int64_t Size = OrigSizes[FI];
345 if (!Share || Size > MFI->getObjectSize(Color))
346 MFI->setObjectSize(Color, Size);
350 /// Colorslots - Color all spill stack slots and rewrite all frameindex machine
351 /// operands in the function.
352 bool StackSlotColoring::ColorSlots(MachineFunction &MF) {
353 unsigned NumObjs = MFI->getObjectIndexEnd();
354 SmallVector<int, 16> SlotMapping(NumObjs, -1);
355 SmallVector<float, 16> SlotWeights(NumObjs, 0.0);
356 SmallVector<SmallVector<int, 4>, 16> RevMap(NumObjs);
357 BitVector SlotIsReg(NumObjs);
358 BitVector UsedColors(NumObjs);
360 DOUT << "Color spill slot intervals:\n";
361 bool Changed = false;
362 for (unsigned i = 0, e = SSIntervals.size(); i != e; ++i) {
363 LiveInterval *li = SSIntervals[i];
364 int SS = li->getStackSlotIndex();
365 int NewSS = ColorSlot(li);
366 assert(NewSS >= 0 && "Stack coloring failed?");
367 SlotMapping[SS] = NewSS;
368 RevMap[NewSS].push_back(SS);
369 SlotWeights[NewSS] += li->weight;
370 UsedColors.set(NewSS);
371 Changed |= (SS != NewSS);
374 DOUT << "\nSpill slots after coloring:\n";
375 for (unsigned i = 0, e = SSIntervals.size(); i != e; ++i) {
376 LiveInterval *li = SSIntervals[i];
377 int SS = li->getStackSlotIndex();
378 li->weight = SlotWeights[SS];
380 // Sort them by new weight.
381 std::stable_sort(SSIntervals.begin(), SSIntervals.end(), IntervalSorter());
384 for (unsigned i = 0, e = SSIntervals.size(); i != e; ++i)
385 DEBUG(SSIntervals[i]->dump());
389 // Can we "color" a stack slot with a unused register?
390 Changed |= ColorSlotsWithFreeRegs(SlotMapping, RevMap, SlotIsReg);
395 // Rewrite all MO_FrameIndex operands.
396 SmallVector<SmallSet<unsigned, 4>, 4> NewDefs(MF.getNumBlockIDs());
397 for (unsigned SS = 0, SE = SSRefs.size(); SS != SE; ++SS) {
398 bool isReg = SlotIsReg[SS];
399 int NewFI = SlotMapping[SS];
400 if (NewFI == -1 || (NewFI == (int)SS && !isReg))
403 const TargetRegisterClass *RC = LS->getIntervalRegClass(SS);
404 SmallVector<MachineInstr*, 8> &RefMIs = SSRefs[SS];
405 for (unsigned i = 0, e = RefMIs.size(); i != e; ++i)
407 RewriteInstruction(RefMIs[i], SS, NewFI, MF);
409 // Rewrite to use a register instead.
410 unsigned MBBId = RefMIs[i]->getParent()->getNumber();
411 SmallSet<unsigned, 4> &Defs = NewDefs[MBBId];
412 UnfoldAndRewriteInstruction(RefMIs[i], SS, NewFI, RC, Defs, MF);
416 // Delete unused stack slots.
417 while (NextColor != -1) {
418 DOUT << "Removing unused stack object fi#" << NextColor << "\n";
419 MFI->RemoveStackObject(NextColor);
420 NextColor = AllColors.find_next(NextColor);
426 /// AllMemRefsCanBeUnfolded - Return true if all references of the specified
427 /// spill slot index can be unfolded.
428 bool StackSlotColoring::AllMemRefsCanBeUnfolded(int SS) {
429 SmallVector<MachineInstr*, 8> &RefMIs = SSRefs[SS];
430 for (unsigned i = 0, e = RefMIs.size(); i != e; ++i) {
431 MachineInstr *MI = RefMIs[i];
432 if (TII->isLoadFromStackSlot(MI, SS) ||
433 TII->isStoreToStackSlot(MI, SS))
434 // Restore and spill will become copies.
436 if (!TII->getOpcodeAfterMemoryUnfold(MI->getOpcode(), false, false))
438 for (unsigned j = 0, ee = MI->getNumOperands(); j != ee; ++j) {
439 MachineOperand &MO = MI->getOperand(j);
440 if (MO.isFI() && MO.getIndex() != SS)
441 // If it uses another frameindex, we can, currently* unfold it.
448 /// RewriteInstruction - Rewrite specified instruction by replacing references
449 /// to old frame index with new one.
450 void StackSlotColoring::RewriteInstruction(MachineInstr *MI, int OldFI,
451 int NewFI, MachineFunction &MF) {
452 for (unsigned i = 0, ee = MI->getNumOperands(); i != ee; ++i) {
453 MachineOperand &MO = MI->getOperand(i);
456 int FI = MO.getIndex();
462 // Update the MachineMemOperand for the new memory location.
463 // FIXME: We need a better method of managing these too.
464 SmallVector<MachineMemOperand, 2> MMOs(MI->memoperands_begin(),
465 MI->memoperands_end());
466 MI->clearMemOperands(MF);
467 const Value *OldSV = PseudoSourceValue::getFixedStack(OldFI);
468 for (unsigned i = 0, ee = MMOs.size(); i != ee; ++i) {
469 if (MMOs[i].getValue() != OldSV)
470 MI->addMemOperand(MF, MMOs[i]);
472 MachineMemOperand MMO(PseudoSourceValue::getFixedStack(NewFI),
473 MMOs[i].getFlags(), MMOs[i].getOffset(),
474 MMOs[i].getSize(), MMOs[i].getAlignment());
475 MI->addMemOperand(MF, MMO);
480 /// PropagateBackward - Traverse backward and look for the definition of
481 /// OldReg. If it can successfully update all of the references with NewReg,
482 /// do so and return true.
483 bool StackSlotColoring::PropagateBackward(MachineBasicBlock::iterator MII,
484 MachineBasicBlock *MBB,
485 unsigned OldReg, unsigned NewReg) {
486 if (MII == MBB->begin())
489 SmallVector<MachineOperand*, 4> Uses;
490 SmallVector<MachineOperand*, 4> Refs;
491 while (--MII != MBB->begin()) {
492 bool FoundDef = false; // Not counting 2address def.
495 const TargetInstrDesc &TID = MII->getDesc();
496 for (unsigned i = 0, e = MII->getNumOperands(); i != e; ++i) {
497 MachineOperand &MO = MII->getOperand(i);
500 unsigned Reg = MO.getReg();
507 // Abort the use is actually a sub-register def. We don't have enough
508 // information to figure out if it is really legal.
509 if (MO.getSubReg() ||
510 TID.getOpcode() == TargetInstrInfo::EXTRACT_SUBREG ||
511 TID.getOpcode() == TargetInstrInfo::INSERT_SUBREG ||
512 TID.getOpcode() == TargetInstrInfo::SUBREG_TO_REG)
515 const TargetRegisterClass *RC = TID.OpInfo[i].getRegClass(TRI);
516 if (RC && !RC->contains(NewReg))
523 if (!MII->isRegTiedToUseOperand(i))
526 } else if (TRI->regsOverlap(Reg, NewReg)) {
528 } else if (TRI->regsOverlap(Reg, OldReg)) {
529 if (!MO.isUse() || !MO.isKill())
535 // Found non-two-address def. Stop here.
536 for (unsigned i = 0, e = Refs.size(); i != e; ++i)
537 Refs[i]->setReg(NewReg);
541 // Two-address uses must be updated as well.
542 for (unsigned i = 0, e = Uses.size(); i != e; ++i)
543 Refs.push_back(Uses[i]);
548 /// PropagateForward - Traverse forward and look for the kill of OldReg. If
549 /// it can successfully update all of the uses with NewReg, do so and
551 bool StackSlotColoring::PropagateForward(MachineBasicBlock::iterator MII,
552 MachineBasicBlock *MBB,
553 unsigned OldReg, unsigned NewReg) {
554 if (MII == MBB->end())
557 SmallVector<MachineOperand*, 4> Uses;
558 while (++MII != MBB->end()) {
559 bool FoundUse = false;
560 bool FoundKill = false;
561 const TargetInstrDesc &TID = MII->getDesc();
562 for (unsigned i = 0, e = MII->getNumOperands(); i != e; ++i) {
563 MachineOperand &MO = MII->getOperand(i);
566 unsigned Reg = MO.getReg();
570 if (MO.isDef() || MO.isImplicit())
573 // Abort the use is actually a sub-register use. We don't have enough
574 // information to figure out if it is really legal.
575 if (MO.getSubReg() ||
576 TID.getOpcode() == TargetInstrInfo::EXTRACT_SUBREG)
579 const TargetRegisterClass *RC = TID.OpInfo[i].getRegClass(TRI);
580 if (RC && !RC->contains(NewReg))
587 } else if (TRI->regsOverlap(Reg, NewReg) ||
588 TRI->regsOverlap(Reg, OldReg))
592 for (unsigned i = 0, e = Uses.size(); i != e; ++i)
593 Uses[i]->setReg(NewReg);
600 /// UnfoldAndRewriteInstruction - Rewrite specified instruction by unfolding
601 /// folded memory references and replacing those references with register
602 /// references instead.
604 StackSlotColoring::UnfoldAndRewriteInstruction(MachineInstr *MI, int OldFI,
606 const TargetRegisterClass *RC,
607 SmallSet<unsigned, 4> &Defs,
608 MachineFunction &MF) {
609 MachineBasicBlock *MBB = MI->getParent();
610 if (unsigned DstReg = TII->isLoadFromStackSlot(MI, OldFI)) {
611 if (PropagateForward(MI, MBB, DstReg, Reg)) {
612 DOUT << "Eliminated load: ";
616 TII->copyRegToReg(*MBB, MI, DstReg, Reg, RC, RC);
620 if (!Defs.count(Reg)) {
621 // If this is the first use of Reg in this MBB and it wasn't previously
622 // defined in MBB, add it to livein.
626 } else if (unsigned SrcReg = TII->isStoreToStackSlot(MI, OldFI)) {
627 if (MI->killsRegister(SrcReg) && PropagateBackward(MI, MBB, SrcReg, Reg)) {
628 DOUT << "Eliminated store: ";
632 TII->copyRegToReg(*MBB, MI, Reg, SrcReg, RC, RC);
636 // Remember reg has been defined in MBB.
639 SmallVector<MachineInstr*, 4> NewMIs;
640 bool Success = TII->unfoldMemoryOperand(MF, MI, Reg, false, false, NewMIs);
641 Success = Success; // Silence compiler warning.
642 assert(Success && "Failed to unfold!");
643 MachineInstr *NewMI = NewMIs[0];
644 MBB->insert(MI, NewMI);
647 if (NewMI->readsRegister(Reg)) {
648 if (!Defs.count(Reg))
649 // If this is the first use of Reg in this MBB and it wasn't previously
650 // defined in MBB, add it to livein.
658 /// RemoveDeadStores - Scan through a basic block and look for loads followed
659 /// by stores. If they're both using the same stack slot, then the store is
660 /// definitely dead. This could obviously be much more aggressive (consider
661 /// pairs with instructions between them), but such extensions might have a
662 /// considerable compile time impact.
663 bool StackSlotColoring::RemoveDeadStores(MachineBasicBlock* MBB) {
664 // FIXME: This could be much more aggressive, but we need to investigate
665 // the compile time impact of doing so.
666 bool changed = false;
668 SmallVector<MachineInstr*, 4> toErase;
670 for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end();
672 if (DCELimit != -1 && (int)NumDead >= DCELimit)
675 MachineBasicBlock::iterator NextMI = next(I);
676 if (NextMI == MBB->end()) continue;
678 int FirstSS, SecondSS;
679 unsigned LoadReg = 0;
680 unsigned StoreReg = 0;
681 if (!(LoadReg = TII->isLoadFromStackSlot(I, FirstSS))) continue;
682 if (!(StoreReg = TII->isStoreToStackSlot(NextMI, SecondSS))) continue;
683 if (FirstSS != SecondSS || LoadReg != StoreReg || FirstSS == -1) continue;
688 if (NextMI->findRegisterUseOperandIdx(LoadReg, true, 0) != -1) {
690 toErase.push_back(I);
693 toErase.push_back(NextMI);
697 for (SmallVector<MachineInstr*, 4>::iterator I = toErase.begin(),
698 E = toErase.end(); I != E; ++I)
699 (*I)->eraseFromParent();
705 bool StackSlotColoring::runOnMachineFunction(MachineFunction &MF) {
706 DOUT << "********** Stack Slot Coloring **********\n";
708 MFI = MF.getFrameInfo();
709 MRI = &MF.getRegInfo();
710 TII = MF.getTarget().getInstrInfo();
711 TRI = MF.getTarget().getRegisterInfo();
712 LS = &getAnalysis<LiveStacks>();
713 VRM = &getAnalysis<VirtRegMap>();
714 loopInfo = &getAnalysis<MachineLoopInfo>();
716 bool Changed = false;
718 unsigned NumSlots = LS->getNumIntervals();
720 if (NumSlots == 0 || !VRM->HasUnusedRegisters())
725 // Gather spill slot references
726 ScanForSpillSlotRefs(MF);
728 Changed = ColorSlots(MF);
732 for (unsigned i = 0, e = SSRefs.size(); i != e; ++i)
735 OrigAlignments.clear();
739 for (unsigned i = 0, e = Assignments.size(); i != e; ++i)
740 Assignments[i].clear();
744 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I)
745 Changed |= RemoveDeadStores(I);