1 //===-- StackSlotColoring.cpp - Stack slot coloring pass. -----------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the stack slot coloring pass.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "stackcoloring"
15 #include "VirtRegMap.h"
16 #include "llvm/CodeGen/Passes.h"
17 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
18 #include "llvm/CodeGen/LiveStackAnalysis.h"
19 #include "llvm/CodeGen/MachineFrameInfo.h"
20 #include "llvm/CodeGen/MachineLoopInfo.h"
21 #include "llvm/CodeGen/MachineMemOperand.h"
22 #include "llvm/CodeGen/MachineRegisterInfo.h"
23 #include "llvm/CodeGen/PseudoSourceValue.h"
24 #include "llvm/Support/CommandLine.h"
25 #include "llvm/Support/Debug.h"
26 #include "llvm/Target/TargetInstrInfo.h"
27 #include "llvm/Target/TargetMachine.h"
28 #include "llvm/ADT/BitVector.h"
29 #include "llvm/ADT/SmallSet.h"
30 #include "llvm/ADT/SmallVector.h"
31 #include "llvm/ADT/Statistic.h"
36 DisableSharing("no-stack-slot-sharing",
37 cl::init(false), cl::Hidden,
38 cl::desc("Suppress slot sharing during stack coloring"));
41 ColorWithRegsOpt("color-ss-with-regs",
42 cl::init(false), cl::Hidden,
43 cl::desc("Color stack slots with free registers"));
46 static cl::opt<int> DCELimit("ssc-dce-limit", cl::init(-1), cl::Hidden);
48 STATISTIC(NumEliminated, "Number of stack slots eliminated due to coloring");
49 STATISTIC(NumRegRepl, "Number of stack slot refs replaced with reg refs");
50 STATISTIC(NumLoadElim, "Number of loads eliminated");
51 STATISTIC(NumStoreElim, "Number of stores eliminated");
52 STATISTIC(NumDead, "Number of trivially dead stack accesses eliminated");
55 class StackSlotColoring : public MachineFunctionPass {
59 MachineFrameInfo *MFI;
60 MachineRegisterInfo *MRI;
61 const TargetInstrInfo *TII;
62 const TargetRegisterInfo *TRI;
63 const MachineLoopInfo *loopInfo;
65 // SSIntervals - Spill slot intervals.
66 std::vector<LiveInterval*> SSIntervals;
68 // SSRefs - Keep a list of frame index references for each spill slot.
69 SmallVector<SmallVector<MachineInstr*, 8>, 16> SSRefs;
71 // OrigAlignments - Alignments of stack objects before coloring.
72 SmallVector<unsigned, 16> OrigAlignments;
74 // OrigSizes - Sizess of stack objects before coloring.
75 SmallVector<unsigned, 16> OrigSizes;
77 // AllColors - If index is set, it's a spill slot, i.e. color.
78 // FIXME: This assumes PEI locate spill slot with smaller indices
79 // closest to stack pointer / frame pointer. Therefore, smaller
80 // index == better color.
83 // NextColor - Next "color" that's not yet used.
86 // UsedColors - "Colors" that have been assigned.
89 // Assignments - Color to intervals mapping.
90 SmallVector<SmallVector<LiveInterval*,4>, 16> Assignments;
93 static char ID; // Pass identification
95 MachineFunctionPass(&ID), ColorWithRegs(false), NextColor(-1) {}
96 StackSlotColoring(bool RegColor) :
97 MachineFunctionPass(&ID), ColorWithRegs(RegColor), NextColor(-1) {}
99 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
100 AU.setPreservesCFG();
101 AU.addRequired<SlotIndexes>();
102 AU.addPreserved<SlotIndexes>();
103 AU.addRequired<LiveStacks>();
104 AU.addRequired<VirtRegMap>();
105 AU.addPreserved<VirtRegMap>();
106 AU.addRequired<MachineLoopInfo>();
107 AU.addPreserved<MachineLoopInfo>();
108 AU.addPreservedID(MachineDominatorsID);
109 MachineFunctionPass::getAnalysisUsage(AU);
112 virtual bool runOnMachineFunction(MachineFunction &MF);
113 virtual const char* getPassName() const {
114 return "Stack Slot Coloring";
118 void InitializeSlots();
119 void ScanForSpillSlotRefs(MachineFunction &MF);
120 bool OverlapWithAssignments(LiveInterval *li, int Color) const;
121 int ColorSlot(LiveInterval *li);
122 bool ColorSlots(MachineFunction &MF);
123 bool ColorSlotsWithFreeRegs(SmallVector<int, 16> &SlotMapping,
124 SmallVector<SmallVector<int, 4>, 16> &RevMap,
125 BitVector &SlotIsReg);
126 void RewriteInstruction(MachineInstr *MI, int OldFI, int NewFI,
127 MachineFunction &MF);
128 bool PropagateBackward(MachineBasicBlock::iterator MII,
129 MachineBasicBlock *MBB,
130 unsigned OldReg, unsigned NewReg);
131 bool PropagateForward(MachineBasicBlock::iterator MII,
132 MachineBasicBlock *MBB,
133 unsigned OldReg, unsigned NewReg);
134 void UnfoldAndRewriteInstruction(MachineInstr *MI, int OldFI,
135 unsigned Reg, const TargetRegisterClass *RC,
136 SmallSet<unsigned, 4> &Defs,
137 MachineFunction &MF);
138 bool AllMemRefsCanBeUnfolded(int SS);
139 bool RemoveDeadStores(MachineBasicBlock* MBB);
141 } // end anonymous namespace
143 char StackSlotColoring::ID = 0;
145 static RegisterPass<StackSlotColoring>
146 X("stack-slot-coloring", "Stack Slot Coloring");
148 FunctionPass *llvm::createStackSlotColoringPass(bool RegColor) {
149 return new StackSlotColoring(RegColor);
153 // IntervalSorter - Comparison predicate that sort live intervals by
155 struct IntervalSorter {
156 bool operator()(LiveInterval* LHS, LiveInterval* RHS) const {
157 return LHS->weight > RHS->weight;
162 /// ScanForSpillSlotRefs - Scan all the machine instructions for spill slot
163 /// references and update spill slot weights.
164 void StackSlotColoring::ScanForSpillSlotRefs(MachineFunction &MF) {
165 SSRefs.resize(MFI->getObjectIndexEnd());
167 // FIXME: Need the equivalent of MachineRegisterInfo for frameindex operands.
168 for (MachineFunction::iterator MBBI = MF.begin(), E = MF.end();
170 MachineBasicBlock *MBB = &*MBBI;
171 unsigned loopDepth = loopInfo->getLoopDepth(MBB);
172 for (MachineBasicBlock::iterator MII = MBB->begin(), EE = MBB->end();
174 MachineInstr *MI = &*MII;
175 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
176 MachineOperand &MO = MI->getOperand(i);
179 int FI = MO.getIndex();
182 if (!LS->hasInterval(FI))
184 LiveInterval &li = LS->getInterval(FI);
185 if (!MI->isDebugValue())
186 li.weight += LiveIntervals::getSpillWeight(false, true, loopDepth);
187 SSRefs[FI].push_back(MI);
193 /// InitializeSlots - Process all spill stack slot liveintervals and add them
194 /// to a sorted (by weight) list.
195 void StackSlotColoring::InitializeSlots() {
196 int LastFI = MFI->getObjectIndexEnd();
197 OrigAlignments.resize(LastFI);
198 OrigSizes.resize(LastFI);
199 AllColors.resize(LastFI);
200 UsedColors.resize(LastFI);
201 Assignments.resize(LastFI);
203 // Gather all spill slots into a list.
204 DEBUG(dbgs() << "Spill slot intervals:\n");
205 for (LiveStacks::iterator i = LS->begin(), e = LS->end(); i != e; ++i) {
206 LiveInterval &li = i->second;
208 int FI = li.getStackSlotIndex();
209 if (MFI->isDeadObjectIndex(FI))
211 SSIntervals.push_back(&li);
212 OrigAlignments[FI] = MFI->getObjectAlignment(FI);
213 OrigSizes[FI] = MFI->getObjectSize(FI);
216 DEBUG(dbgs() << '\n');
218 // Sort them by weight.
219 std::stable_sort(SSIntervals.begin(), SSIntervals.end(), IntervalSorter());
221 // Get first "color".
222 NextColor = AllColors.find_first();
225 /// OverlapWithAssignments - Return true if LiveInterval overlaps with any
226 /// LiveIntervals that have already been assigned to the specified color.
228 StackSlotColoring::OverlapWithAssignments(LiveInterval *li, int Color) const {
229 const SmallVector<LiveInterval*,4> &OtherLIs = Assignments[Color];
230 for (unsigned i = 0, e = OtherLIs.size(); i != e; ++i) {
231 LiveInterval *OtherLI = OtherLIs[i];
232 if (OtherLI->overlaps(*li))
238 /// ColorSlotsWithFreeRegs - If there are any free registers available, try
239 /// replacing spill slots references with registers instead.
241 StackSlotColoring::ColorSlotsWithFreeRegs(SmallVector<int, 16> &SlotMapping,
242 SmallVector<SmallVector<int, 4>, 16> &RevMap,
243 BitVector &SlotIsReg) {
244 if (!(ColorWithRegs || ColorWithRegsOpt) || !VRM->HasUnusedRegisters())
247 bool Changed = false;
248 DEBUG(dbgs() << "Assigning unused registers to spill slots:\n");
249 for (unsigned i = 0, e = SSIntervals.size(); i != e; ++i) {
250 LiveInterval *li = SSIntervals[i];
251 int SS = li->getStackSlotIndex();
252 if (!UsedColors[SS] || li->weight < 20)
253 // If the weight is < 20, i.e. two references in a loop with depth 1,
254 // don't bother with it.
257 // These slots allow to share the same registers.
258 bool AllColored = true;
259 SmallVector<unsigned, 4> ColoredRegs;
260 for (unsigned j = 0, ee = RevMap[SS].size(); j != ee; ++j) {
261 int RSS = RevMap[SS][j];
262 const TargetRegisterClass *RC = LS->getIntervalRegClass(RSS);
263 // If it's not colored to another stack slot, try coloring it
264 // to a "free" register.
269 unsigned Reg = VRM->getFirstUnusedRegister(RC);
274 if (!AllMemRefsCanBeUnfolded(RSS)) {
278 DEBUG(dbgs() << "Assigning fi#" << RSS << " to "
279 << TRI->getName(Reg) << '\n');
280 ColoredRegs.push_back(Reg);
281 SlotMapping[RSS] = Reg;
287 // Register and its sub-registers are no longer free.
288 while (!ColoredRegs.empty()) {
289 unsigned Reg = ColoredRegs.back();
290 ColoredRegs.pop_back();
291 VRM->setRegisterUsed(Reg);
292 // If reg is a callee-saved register, it will have to be spilled in
294 MRI->setPhysRegUsed(Reg);
295 for (const unsigned *AS = TRI->getAliasSet(Reg); *AS; ++AS) {
296 VRM->setRegisterUsed(*AS);
297 MRI->setPhysRegUsed(*AS);
300 // This spill slot is dead after the rewrites
302 MFI->RemoveStackObject(SS);
306 DEBUG(dbgs() << '\n');
311 /// ColorSlot - Assign a "color" (stack slot) to the specified stack slot.
313 int StackSlotColoring::ColorSlot(LiveInterval *li) {
316 if (!DisableSharing) {
317 // Check if it's possible to reuse any of the used colors.
318 Color = UsedColors.find_first();
319 while (Color != -1) {
320 if (!OverlapWithAssignments(li, Color)) {
325 Color = UsedColors.find_next(Color);
329 // Assign it to the first available color (assumed to be the best) if it's
330 // not possible to share a used color with other objects.
332 assert(NextColor != -1 && "No more spill slots?");
334 UsedColors.set(Color);
335 NextColor = AllColors.find_next(NextColor);
338 // Record the assignment.
339 Assignments[Color].push_back(li);
340 int FI = li->getStackSlotIndex();
341 DEBUG(dbgs() << "Assigning fi#" << FI << " to fi#" << Color << "\n");
343 // Change size and alignment of the allocated slot. If there are multiple
344 // objects sharing the same slot, then make sure the size and alignment
345 // are large enough for all.
346 unsigned Align = OrigAlignments[FI];
347 if (!Share || Align > MFI->getObjectAlignment(Color))
348 MFI->setObjectAlignment(Color, Align);
349 int64_t Size = OrigSizes[FI];
350 if (!Share || Size > MFI->getObjectSize(Color))
351 MFI->setObjectSize(Color, Size);
355 /// Colorslots - Color all spill stack slots and rewrite all frameindex machine
356 /// operands in the function.
357 bool StackSlotColoring::ColorSlots(MachineFunction &MF) {
358 unsigned NumObjs = MFI->getObjectIndexEnd();
359 SmallVector<int, 16> SlotMapping(NumObjs, -1);
360 SmallVector<float, 16> SlotWeights(NumObjs, 0.0);
361 SmallVector<SmallVector<int, 4>, 16> RevMap(NumObjs);
362 BitVector SlotIsReg(NumObjs);
363 BitVector UsedColors(NumObjs);
365 DEBUG(dbgs() << "Color spill slot intervals:\n");
366 bool Changed = false;
367 for (unsigned i = 0, e = SSIntervals.size(); i != e; ++i) {
368 LiveInterval *li = SSIntervals[i];
369 int SS = li->getStackSlotIndex();
370 int NewSS = ColorSlot(li);
371 assert(NewSS >= 0 && "Stack coloring failed?");
372 SlotMapping[SS] = NewSS;
373 RevMap[NewSS].push_back(SS);
374 SlotWeights[NewSS] += li->weight;
375 UsedColors.set(NewSS);
376 Changed |= (SS != NewSS);
379 DEBUG(dbgs() << "\nSpill slots after coloring:\n");
380 for (unsigned i = 0, e = SSIntervals.size(); i != e; ++i) {
381 LiveInterval *li = SSIntervals[i];
382 int SS = li->getStackSlotIndex();
383 li->weight = SlotWeights[SS];
385 // Sort them by new weight.
386 std::stable_sort(SSIntervals.begin(), SSIntervals.end(), IntervalSorter());
389 for (unsigned i = 0, e = SSIntervals.size(); i != e; ++i)
390 DEBUG(SSIntervals[i]->dump());
391 DEBUG(dbgs() << '\n');
394 // Can we "color" a stack slot with a unused register?
395 Changed |= ColorSlotsWithFreeRegs(SlotMapping, RevMap, SlotIsReg);
400 // Rewrite all MO_FrameIndex operands.
401 SmallVector<SmallSet<unsigned, 4>, 4> NewDefs(MF.getNumBlockIDs());
402 for (unsigned SS = 0, SE = SSRefs.size(); SS != SE; ++SS) {
403 bool isReg = SlotIsReg[SS];
404 int NewFI = SlotMapping[SS];
405 if (NewFI == -1 || (NewFI == (int)SS && !isReg))
408 const TargetRegisterClass *RC = LS->getIntervalRegClass(SS);
409 SmallVector<MachineInstr*, 8> &RefMIs = SSRefs[SS];
410 for (unsigned i = 0, e = RefMIs.size(); i != e; ++i)
412 RewriteInstruction(RefMIs[i], SS, NewFI, MF);
414 // Rewrite to use a register instead.
415 unsigned MBBId = RefMIs[i]->getParent()->getNumber();
416 SmallSet<unsigned, 4> &Defs = NewDefs[MBBId];
417 UnfoldAndRewriteInstruction(RefMIs[i], SS, NewFI, RC, Defs, MF);
421 // Delete unused stack slots.
422 while (NextColor != -1) {
423 DEBUG(dbgs() << "Removing unused stack object fi#" << NextColor << "\n");
424 MFI->RemoveStackObject(NextColor);
425 NextColor = AllColors.find_next(NextColor);
431 /// AllMemRefsCanBeUnfolded - Return true if all references of the specified
432 /// spill slot index can be unfolded.
433 bool StackSlotColoring::AllMemRefsCanBeUnfolded(int SS) {
434 SmallVector<MachineInstr*, 8> &RefMIs = SSRefs[SS];
435 for (unsigned i = 0, e = RefMIs.size(); i != e; ++i) {
436 MachineInstr *MI = RefMIs[i];
437 if (TII->isLoadFromStackSlot(MI, SS) ||
438 TII->isStoreToStackSlot(MI, SS))
439 // Restore and spill will become copies.
441 if (!TII->getOpcodeAfterMemoryUnfold(MI->getOpcode(), false, false))
443 for (unsigned j = 0, ee = MI->getNumOperands(); j != ee; ++j) {
444 MachineOperand &MO = MI->getOperand(j);
445 if (MO.isFI() && MO.getIndex() != SS)
446 // If it uses another frameindex, we can, currently* unfold it.
453 /// RewriteInstruction - Rewrite specified instruction by replacing references
454 /// to old frame index with new one.
455 void StackSlotColoring::RewriteInstruction(MachineInstr *MI, int OldFI,
456 int NewFI, MachineFunction &MF) {
457 // Update the operands.
458 for (unsigned i = 0, ee = MI->getNumOperands(); i != ee; ++i) {
459 MachineOperand &MO = MI->getOperand(i);
462 int FI = MO.getIndex();
468 // Update the memory references. This changes the MachineMemOperands
469 // directly. They may be in use by multiple instructions, however all
470 // instructions using OldFI are being rewritten to use NewFI.
471 const Value *OldSV = PseudoSourceValue::getFixedStack(OldFI);
472 const Value *NewSV = PseudoSourceValue::getFixedStack(NewFI);
473 for (MachineInstr::mmo_iterator I = MI->memoperands_begin(),
474 E = MI->memoperands_end(); I != E; ++I)
475 if ((*I)->getValue() == OldSV)
476 (*I)->setValue(NewSV);
479 /// PropagateBackward - Traverse backward and look for the definition of
480 /// OldReg. If it can successfully update all of the references with NewReg,
481 /// do so and return true.
482 bool StackSlotColoring::PropagateBackward(MachineBasicBlock::iterator MII,
483 MachineBasicBlock *MBB,
484 unsigned OldReg, unsigned NewReg) {
485 if (MII == MBB->begin())
488 SmallVector<MachineOperand*, 4> Uses;
489 SmallVector<MachineOperand*, 4> Refs;
490 while (--MII != MBB->begin()) {
491 bool FoundDef = false; // Not counting 2address def.
494 const TargetInstrDesc &TID = MII->getDesc();
495 for (unsigned i = 0, e = MII->getNumOperands(); i != e; ++i) {
496 MachineOperand &MO = MII->getOperand(i);
499 unsigned Reg = MO.getReg();
506 // Abort the use is actually a sub-register def. We don't have enough
507 // information to figure out if it is really legal.
508 if (MO.getSubReg() || MII->isExtractSubreg() ||
509 MII->isInsertSubreg() || MII->isSubregToReg())
512 const TargetRegisterClass *RC = TID.OpInfo[i].getRegClass(TRI);
513 if (RC && !RC->contains(NewReg))
520 if (!MII->isRegTiedToUseOperand(i))
523 } else if (TRI->regsOverlap(Reg, NewReg)) {
525 } else if (TRI->regsOverlap(Reg, OldReg)) {
526 if (!MO.isUse() || !MO.isKill())
532 // Found non-two-address def. Stop here.
533 for (unsigned i = 0, e = Refs.size(); i != e; ++i)
534 Refs[i]->setReg(NewReg);
538 // Two-address uses must be updated as well.
539 for (unsigned i = 0, e = Uses.size(); i != e; ++i)
540 Refs.push_back(Uses[i]);
545 /// PropagateForward - Traverse forward and look for the kill of OldReg. If
546 /// it can successfully update all of the uses with NewReg, do so and
548 bool StackSlotColoring::PropagateForward(MachineBasicBlock::iterator MII,
549 MachineBasicBlock *MBB,
550 unsigned OldReg, unsigned NewReg) {
551 if (MII == MBB->end())
554 SmallVector<MachineOperand*, 4> Uses;
555 while (++MII != MBB->end()) {
556 bool FoundKill = false;
557 const TargetInstrDesc &TID = MII->getDesc();
558 for (unsigned i = 0, e = MII->getNumOperands(); i != e; ++i) {
559 MachineOperand &MO = MII->getOperand(i);
562 unsigned Reg = MO.getReg();
566 if (MO.isDef() || MO.isImplicit())
569 // Abort the use is actually a sub-register use. We don't have enough
570 // information to figure out if it is really legal.
571 if (MO.getSubReg() || MII->isExtractSubreg())
574 const TargetRegisterClass *RC = TID.OpInfo[i].getRegClass(TRI);
575 if (RC && !RC->contains(NewReg))
581 } else if (TRI->regsOverlap(Reg, NewReg) ||
582 TRI->regsOverlap(Reg, OldReg))
586 for (unsigned i = 0, e = Uses.size(); i != e; ++i)
587 Uses[i]->setReg(NewReg);
594 /// UnfoldAndRewriteInstruction - Rewrite specified instruction by unfolding
595 /// folded memory references and replacing those references with register
596 /// references instead.
598 StackSlotColoring::UnfoldAndRewriteInstruction(MachineInstr *MI, int OldFI,
600 const TargetRegisterClass *RC,
601 SmallSet<unsigned, 4> &Defs,
602 MachineFunction &MF) {
603 MachineBasicBlock *MBB = MI->getParent();
604 if (unsigned DstReg = TII->isLoadFromStackSlot(MI, OldFI)) {
605 if (PropagateForward(MI, MBB, DstReg, Reg)) {
606 DEBUG(dbgs() << "Eliminated load: ");
610 TII->copyRegToReg(*MBB, MI, DstReg, Reg, RC, RC,
615 if (!Defs.count(Reg)) {
616 // If this is the first use of Reg in this MBB and it wasn't previously
617 // defined in MBB, add it to livein.
621 } else if (unsigned SrcReg = TII->isStoreToStackSlot(MI, OldFI)) {
622 if (MI->killsRegister(SrcReg) && PropagateBackward(MI, MBB, SrcReg, Reg)) {
623 DEBUG(dbgs() << "Eliminated store: ");
627 TII->copyRegToReg(*MBB, MI, Reg, SrcReg, RC, RC,
632 // Remember reg has been defined in MBB.
635 SmallVector<MachineInstr*, 4> NewMIs;
636 bool Success = TII->unfoldMemoryOperand(MF, MI, Reg, false, false, NewMIs);
637 Success = Success; // Silence compiler warning.
638 assert(Success && "Failed to unfold!");
639 MachineInstr *NewMI = NewMIs[0];
640 MBB->insert(MI, NewMI);
643 if (NewMI->readsRegister(Reg)) {
644 if (!Defs.count(Reg))
645 // If this is the first use of Reg in this MBB and it wasn't previously
646 // defined in MBB, add it to livein.
654 /// RemoveDeadStores - Scan through a basic block and look for loads followed
655 /// by stores. If they're both using the same stack slot, then the store is
656 /// definitely dead. This could obviously be much more aggressive (consider
657 /// pairs with instructions between them), but such extensions might have a
658 /// considerable compile time impact.
659 bool StackSlotColoring::RemoveDeadStores(MachineBasicBlock* MBB) {
660 // FIXME: This could be much more aggressive, but we need to investigate
661 // the compile time impact of doing so.
662 bool changed = false;
664 SmallVector<MachineInstr*, 4> toErase;
666 for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end();
668 if (DCELimit != -1 && (int)NumDead >= DCELimit)
671 MachineBasicBlock::iterator NextMI = llvm::next(I);
672 if (NextMI == MBB->end()) continue;
674 int FirstSS, SecondSS;
675 unsigned LoadReg = 0;
676 unsigned StoreReg = 0;
677 if (!(LoadReg = TII->isLoadFromStackSlot(I, FirstSS))) continue;
678 if (!(StoreReg = TII->isStoreToStackSlot(NextMI, SecondSS))) continue;
679 if (FirstSS != SecondSS || LoadReg != StoreReg || FirstSS == -1) continue;
684 if (NextMI->findRegisterUseOperandIdx(LoadReg, true, 0) != -1) {
686 toErase.push_back(I);
689 toErase.push_back(NextMI);
693 for (SmallVector<MachineInstr*, 4>::iterator I = toErase.begin(),
694 E = toErase.end(); I != E; ++I)
695 (*I)->eraseFromParent();
701 bool StackSlotColoring::runOnMachineFunction(MachineFunction &MF) {
703 dbgs() << "********** Stack Slot Coloring **********\n"
704 << "********** Function: "
705 << MF.getFunction()->getName() << '\n';
708 MFI = MF.getFrameInfo();
709 MRI = &MF.getRegInfo();
710 TII = MF.getTarget().getInstrInfo();
711 TRI = MF.getTarget().getRegisterInfo();
712 LS = &getAnalysis<LiveStacks>();
713 VRM = &getAnalysis<VirtRegMap>();
714 loopInfo = &getAnalysis<MachineLoopInfo>();
716 bool Changed = false;
718 unsigned NumSlots = LS->getNumIntervals();
720 if (NumSlots == 0 || !VRM->HasUnusedRegisters())
725 // Gather spill slot references
726 ScanForSpillSlotRefs(MF);
728 Changed = ColorSlots(MF);
732 for (unsigned i = 0, e = SSRefs.size(); i != e; ++i)
735 OrigAlignments.clear();
739 for (unsigned i = 0, e = Assignments.size(); i != e; ++i)
740 Assignments[i].clear();
744 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I)
745 Changed |= RemoveDeadStores(I);