1 //===-- StackSlotColoring.cpp - Stack slot coloring pass. -----------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the stack slot coloring pass.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "stackcoloring"
15 #include "VirtRegMap.h"
16 #include "llvm/CodeGen/Passes.h"
17 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
18 #include "llvm/CodeGen/LiveStackAnalysis.h"
19 #include "llvm/CodeGen/MachineFrameInfo.h"
20 #include "llvm/CodeGen/MachineLoopInfo.h"
21 #include "llvm/CodeGen/MachineMemOperand.h"
22 #include "llvm/CodeGen/MachineRegisterInfo.h"
23 #include "llvm/CodeGen/PseudoSourceValue.h"
24 #include "llvm/Support/CommandLine.h"
25 #include "llvm/Support/Compiler.h"
26 #include "llvm/Support/Debug.h"
27 #include "llvm/Target/TargetInstrInfo.h"
28 #include "llvm/Target/TargetMachine.h"
29 #include "llvm/ADT/BitVector.h"
30 #include "llvm/ADT/SmallSet.h"
31 #include "llvm/ADT/SmallVector.h"
32 #include "llvm/ADT/Statistic.h"
37 DisableSharing("no-stack-slot-sharing",
38 cl::init(false), cl::Hidden,
39 cl::desc("Suppress slot sharing during stack coloring"));
42 ColorWithRegsOpt("color-ss-with-regs",
43 cl::init(false), cl::Hidden,
44 cl::desc("Color stack slots with free registers"));
47 static cl::opt<int> DCELimit("ssc-dce-limit", cl::init(-1), cl::Hidden);
49 STATISTIC(NumEliminated, "Number of stack slots eliminated due to coloring");
50 STATISTIC(NumRegRepl, "Number of stack slot refs replaced with reg refs");
51 STATISTIC(NumLoadElim, "Number of loads eliminated");
52 STATISTIC(NumStoreElim, "Number of stores eliminated");
53 STATISTIC(NumDead, "Number of trivially dead stack accesses eliminated");
56 class VISIBILITY_HIDDEN StackSlotColoring : public MachineFunctionPass {
60 MachineFrameInfo *MFI;
61 MachineRegisterInfo *MRI;
62 const TargetInstrInfo *TII;
63 const TargetRegisterInfo *TRI;
64 const MachineLoopInfo *loopInfo;
66 // SSIntervals - Spill slot intervals.
67 std::vector<LiveInterval*> SSIntervals;
69 // SSRefs - Keep a list of frame index references for each spill slot.
70 SmallVector<SmallVector<MachineInstr*, 8>, 16> SSRefs;
72 // OrigAlignments - Alignments of stack objects before coloring.
73 SmallVector<unsigned, 16> OrigAlignments;
75 // OrigSizes - Sizess of stack objects before coloring.
76 SmallVector<unsigned, 16> OrigSizes;
78 // AllColors - If index is set, it's a spill slot, i.e. color.
79 // FIXME: This assumes PEI locate spill slot with smaller indices
80 // closest to stack pointer / frame pointer. Therefore, smaller
81 // index == better color.
84 // NextColor - Next "color" that's not yet used.
87 // UsedColors - "Colors" that have been assigned.
90 // Assignments - Color to intervals mapping.
91 SmallVector<SmallVector<LiveInterval*,4>, 16> Assignments;
94 static char ID; // Pass identification
96 MachineFunctionPass(&ID), ColorWithRegs(false), NextColor(-1) {}
97 StackSlotColoring(bool RegColor) :
98 MachineFunctionPass(&ID), ColorWithRegs(RegColor), NextColor(-1) {}
100 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
101 AU.setPreservesCFG();
102 AU.addRequired<LiveStacks>();
103 AU.addRequired<VirtRegMap>();
104 AU.addPreserved<VirtRegMap>();
105 AU.addRequired<MachineLoopInfo>();
106 AU.addPreserved<MachineLoopInfo>();
107 AU.addPreservedID(MachineDominatorsID);
108 MachineFunctionPass::getAnalysisUsage(AU);
111 virtual bool runOnMachineFunction(MachineFunction &MF);
112 virtual const char* getPassName() const {
113 return "Stack Slot Coloring";
117 void InitializeSlots();
118 void ScanForSpillSlotRefs(MachineFunction &MF);
119 bool OverlapWithAssignments(LiveInterval *li, int Color) const;
120 int ColorSlot(LiveInterval *li);
121 bool ColorSlots(MachineFunction &MF);
122 bool ColorSlotsWithFreeRegs(SmallVector<int, 16> &SlotMapping,
123 SmallVector<SmallVector<int, 4>, 16> &RevMap,
124 BitVector &SlotIsReg);
125 void RewriteInstruction(MachineInstr *MI, int OldFI, int NewFI,
126 MachineFunction &MF);
127 bool PropagateBackward(MachineBasicBlock::iterator MII,
128 MachineBasicBlock *MBB,
129 unsigned OldReg, unsigned NewReg);
130 bool PropagateForward(MachineBasicBlock::iterator MII,
131 MachineBasicBlock *MBB,
132 unsigned OldReg, unsigned NewReg);
133 void UnfoldAndRewriteInstruction(MachineInstr *MI, int OldFI,
134 unsigned Reg, const TargetRegisterClass *RC,
135 SmallSet<unsigned, 4> &Defs,
136 MachineFunction &MF);
137 bool AllMemRefsCanBeUnfolded(int SS);
138 bool RemoveDeadStores(MachineBasicBlock* MBB);
140 } // end anonymous namespace
142 char StackSlotColoring::ID = 0;
144 static RegisterPass<StackSlotColoring>
145 X("stack-slot-coloring", "Stack Slot Coloring");
147 FunctionPass *llvm::createStackSlotColoringPass(bool RegColor) {
148 return new StackSlotColoring(RegColor);
152 // IntervalSorter - Comparison predicate that sort live intervals by
154 struct IntervalSorter {
155 bool operator()(LiveInterval* LHS, LiveInterval* RHS) const {
156 return LHS->weight > RHS->weight;
161 /// ScanForSpillSlotRefs - Scan all the machine instructions for spill slot
162 /// references and update spill slot weights.
163 void StackSlotColoring::ScanForSpillSlotRefs(MachineFunction &MF) {
164 SSRefs.resize(MFI->getObjectIndexEnd());
166 // FIXME: Need the equivalent of MachineRegisterInfo for frameindex operands.
167 for (MachineFunction::iterator MBBI = MF.begin(), E = MF.end();
169 MachineBasicBlock *MBB = &*MBBI;
170 unsigned loopDepth = loopInfo->getLoopDepth(MBB);
171 for (MachineBasicBlock::iterator MII = MBB->begin(), EE = MBB->end();
173 MachineInstr *MI = &*MII;
174 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
175 MachineOperand &MO = MI->getOperand(i);
178 int FI = MO.getIndex();
181 if (!LS->hasInterval(FI))
183 LiveInterval &li = LS->getInterval(FI);
184 li.weight += LiveIntervals::getSpillWeight(false, true, loopDepth);
185 SSRefs[FI].push_back(MI);
191 /// InitializeSlots - Process all spill stack slot liveintervals and add them
192 /// to a sorted (by weight) list.
193 void StackSlotColoring::InitializeSlots() {
194 int LastFI = MFI->getObjectIndexEnd();
195 OrigAlignments.resize(LastFI);
196 OrigSizes.resize(LastFI);
197 AllColors.resize(LastFI);
198 UsedColors.resize(LastFI);
199 Assignments.resize(LastFI);
201 // Gather all spill slots into a list.
202 DEBUG(errs() << "Spill slot intervals:\n");
203 for (LiveStacks::iterator i = LS->begin(), e = LS->end(); i != e; ++i) {
204 LiveInterval &li = i->second;
206 int FI = li.getStackSlotIndex();
207 if (MFI->isDeadObjectIndex(FI))
209 SSIntervals.push_back(&li);
210 OrigAlignments[FI] = MFI->getObjectAlignment(FI);
211 OrigSizes[FI] = MFI->getObjectSize(FI);
214 DEBUG(errs() << '\n');
216 // Sort them by weight.
217 std::stable_sort(SSIntervals.begin(), SSIntervals.end(), IntervalSorter());
219 // Get first "color".
220 NextColor = AllColors.find_first();
223 /// OverlapWithAssignments - Return true if LiveInterval overlaps with any
224 /// LiveIntervals that have already been assigned to the specified color.
226 StackSlotColoring::OverlapWithAssignments(LiveInterval *li, int Color) const {
227 const SmallVector<LiveInterval*,4> &OtherLIs = Assignments[Color];
228 for (unsigned i = 0, e = OtherLIs.size(); i != e; ++i) {
229 LiveInterval *OtherLI = OtherLIs[i];
230 if (OtherLI->overlaps(*li))
236 /// ColorSlotsWithFreeRegs - If there are any free registers available, try
237 /// replacing spill slots references with registers instead.
239 StackSlotColoring::ColorSlotsWithFreeRegs(SmallVector<int, 16> &SlotMapping,
240 SmallVector<SmallVector<int, 4>, 16> &RevMap,
241 BitVector &SlotIsReg) {
242 if (!(ColorWithRegs || ColorWithRegsOpt) || !VRM->HasUnusedRegisters())
245 bool Changed = false;
246 DEBUG(errs() << "Assigning unused registers to spill slots:\n");
247 for (unsigned i = 0, e = SSIntervals.size(); i != e; ++i) {
248 LiveInterval *li = SSIntervals[i];
249 int SS = li->getStackSlotIndex();
250 if (!UsedColors[SS] || li->weight < 20)
251 // If the weight is < 20, i.e. two references in a loop with depth 1,
252 // don't bother with it.
255 // These slots allow to share the same registers.
256 bool AllColored = true;
257 SmallVector<unsigned, 4> ColoredRegs;
258 for (unsigned j = 0, ee = RevMap[SS].size(); j != ee; ++j) {
259 int RSS = RevMap[SS][j];
260 const TargetRegisterClass *RC = LS->getIntervalRegClass(RSS);
261 // If it's not colored to another stack slot, try coloring it
262 // to a "free" register.
267 unsigned Reg = VRM->getFirstUnusedRegister(RC);
272 if (!AllMemRefsCanBeUnfolded(RSS)) {
276 DEBUG(errs() << "Assigning fi#" << RSS << " to "
277 << TRI->getName(Reg) << '\n');
278 ColoredRegs.push_back(Reg);
279 SlotMapping[RSS] = Reg;
285 // Register and its sub-registers are no longer free.
286 while (!ColoredRegs.empty()) {
287 unsigned Reg = ColoredRegs.back();
288 ColoredRegs.pop_back();
289 VRM->setRegisterUsed(Reg);
290 // If reg is a callee-saved register, it will have to be spilled in
292 MRI->setPhysRegUsed(Reg);
293 for (const unsigned *AS = TRI->getAliasSet(Reg); *AS; ++AS) {
294 VRM->setRegisterUsed(*AS);
295 MRI->setPhysRegUsed(*AS);
298 // This spill slot is dead after the rewrites
300 MFI->RemoveStackObject(SS);
304 DEBUG(errs() << '\n');
309 /// ColorSlot - Assign a "color" (stack slot) to the specified stack slot.
311 int StackSlotColoring::ColorSlot(LiveInterval *li) {
314 if (!DisableSharing) {
315 // Check if it's possible to reuse any of the used colors.
316 Color = UsedColors.find_first();
317 while (Color != -1) {
318 if (!OverlapWithAssignments(li, Color)) {
323 Color = UsedColors.find_next(Color);
327 // Assign it to the first available color (assumed to be the best) if it's
328 // not possible to share a used color with other objects.
330 assert(NextColor != -1 && "No more spill slots?");
332 UsedColors.set(Color);
333 NextColor = AllColors.find_next(NextColor);
336 // Record the assignment.
337 Assignments[Color].push_back(li);
338 int FI = li->getStackSlotIndex();
339 DEBUG(errs() << "Assigning fi#" << FI << " to fi#" << Color << "\n");
341 // Change size and alignment of the allocated slot. If there are multiple
342 // objects sharing the same slot, then make sure the size and alignment
343 // are large enough for all.
344 unsigned Align = OrigAlignments[FI];
345 if (!Share || Align > MFI->getObjectAlignment(Color))
346 MFI->setObjectAlignment(Color, Align);
347 int64_t Size = OrigSizes[FI];
348 if (!Share || Size > MFI->getObjectSize(Color))
349 MFI->setObjectSize(Color, Size);
353 /// Colorslots - Color all spill stack slots and rewrite all frameindex machine
354 /// operands in the function.
355 bool StackSlotColoring::ColorSlots(MachineFunction &MF) {
356 unsigned NumObjs = MFI->getObjectIndexEnd();
357 SmallVector<int, 16> SlotMapping(NumObjs, -1);
358 SmallVector<float, 16> SlotWeights(NumObjs, 0.0);
359 SmallVector<SmallVector<int, 4>, 16> RevMap(NumObjs);
360 BitVector SlotIsReg(NumObjs);
361 BitVector UsedColors(NumObjs);
363 DEBUG(errs() << "Color spill slot intervals:\n");
364 bool Changed = false;
365 for (unsigned i = 0, e = SSIntervals.size(); i != e; ++i) {
366 LiveInterval *li = SSIntervals[i];
367 int SS = li->getStackSlotIndex();
368 int NewSS = ColorSlot(li);
369 assert(NewSS >= 0 && "Stack coloring failed?");
370 SlotMapping[SS] = NewSS;
371 RevMap[NewSS].push_back(SS);
372 SlotWeights[NewSS] += li->weight;
373 UsedColors.set(NewSS);
374 Changed |= (SS != NewSS);
377 DEBUG(errs() << "\nSpill slots after coloring:\n");
378 for (unsigned i = 0, e = SSIntervals.size(); i != e; ++i) {
379 LiveInterval *li = SSIntervals[i];
380 int SS = li->getStackSlotIndex();
381 li->weight = SlotWeights[SS];
383 // Sort them by new weight.
384 std::stable_sort(SSIntervals.begin(), SSIntervals.end(), IntervalSorter());
387 for (unsigned i = 0, e = SSIntervals.size(); i != e; ++i)
388 DEBUG(SSIntervals[i]->dump());
389 DEBUG(errs() << '\n');
392 // Can we "color" a stack slot with a unused register?
393 Changed |= ColorSlotsWithFreeRegs(SlotMapping, RevMap, SlotIsReg);
398 // Rewrite all MO_FrameIndex operands.
399 SmallVector<SmallSet<unsigned, 4>, 4> NewDefs(MF.getNumBlockIDs());
400 for (unsigned SS = 0, SE = SSRefs.size(); SS != SE; ++SS) {
401 bool isReg = SlotIsReg[SS];
402 int NewFI = SlotMapping[SS];
403 if (NewFI == -1 || (NewFI == (int)SS && !isReg))
406 const TargetRegisterClass *RC = LS->getIntervalRegClass(SS);
407 SmallVector<MachineInstr*, 8> &RefMIs = SSRefs[SS];
408 for (unsigned i = 0, e = RefMIs.size(); i != e; ++i)
410 RewriteInstruction(RefMIs[i], SS, NewFI, MF);
412 // Rewrite to use a register instead.
413 unsigned MBBId = RefMIs[i]->getParent()->getNumber();
414 SmallSet<unsigned, 4> &Defs = NewDefs[MBBId];
415 UnfoldAndRewriteInstruction(RefMIs[i], SS, NewFI, RC, Defs, MF);
419 // Delete unused stack slots.
420 while (NextColor != -1) {
421 DEBUG(errs() << "Removing unused stack object fi#" << NextColor << "\n");
422 MFI->RemoveStackObject(NextColor);
423 NextColor = AllColors.find_next(NextColor);
429 /// AllMemRefsCanBeUnfolded - Return true if all references of the specified
430 /// spill slot index can be unfolded.
431 bool StackSlotColoring::AllMemRefsCanBeUnfolded(int SS) {
432 SmallVector<MachineInstr*, 8> &RefMIs = SSRefs[SS];
433 for (unsigned i = 0, e = RefMIs.size(); i != e; ++i) {
434 MachineInstr *MI = RefMIs[i];
435 if (TII->isLoadFromStackSlot(MI, SS) ||
436 TII->isStoreToStackSlot(MI, SS))
437 // Restore and spill will become copies.
439 if (!TII->getOpcodeAfterMemoryUnfold(MI->getOpcode(), false, false))
441 for (unsigned j = 0, ee = MI->getNumOperands(); j != ee; ++j) {
442 MachineOperand &MO = MI->getOperand(j);
443 if (MO.isFI() && MO.getIndex() != SS)
444 // If it uses another frameindex, we can, currently* unfold it.
451 /// RewriteInstruction - Rewrite specified instruction by replacing references
452 /// to old frame index with new one.
453 void StackSlotColoring::RewriteInstruction(MachineInstr *MI, int OldFI,
454 int NewFI, MachineFunction &MF) {
455 // Update the operands.
456 for (unsigned i = 0, ee = MI->getNumOperands(); i != ee; ++i) {
457 MachineOperand &MO = MI->getOperand(i);
460 int FI = MO.getIndex();
466 // Update the memory references. This changes the MachineMemOperands
467 // directly. They may be in use by multiple instructions, however all
468 // instructions using OldFI are being rewritten to use NewFI.
469 const Value *OldSV = PseudoSourceValue::getFixedStack(OldFI);
470 const Value *NewSV = PseudoSourceValue::getFixedStack(NewFI);
471 for (MachineInstr::mmo_iterator I = MI->memoperands_begin(),
472 E = MI->memoperands_end(); I != E; ++I)
473 if ((*I)->getValue() == OldSV)
474 (*I)->setValue(NewSV);
477 /// PropagateBackward - Traverse backward and look for the definition of
478 /// OldReg. If it can successfully update all of the references with NewReg,
479 /// do so and return true.
480 bool StackSlotColoring::PropagateBackward(MachineBasicBlock::iterator MII,
481 MachineBasicBlock *MBB,
482 unsigned OldReg, unsigned NewReg) {
483 if (MII == MBB->begin())
486 SmallVector<MachineOperand*, 4> Uses;
487 SmallVector<MachineOperand*, 4> Refs;
488 while (--MII != MBB->begin()) {
489 bool FoundDef = false; // Not counting 2address def.
492 const TargetInstrDesc &TID = MII->getDesc();
493 for (unsigned i = 0, e = MII->getNumOperands(); i != e; ++i) {
494 MachineOperand &MO = MII->getOperand(i);
497 unsigned Reg = MO.getReg();
504 // Abort the use is actually a sub-register def. We don't have enough
505 // information to figure out if it is really legal.
506 if (MO.getSubReg() ||
507 TID.getOpcode() == TargetInstrInfo::EXTRACT_SUBREG ||
508 TID.getOpcode() == TargetInstrInfo::INSERT_SUBREG ||
509 TID.getOpcode() == TargetInstrInfo::SUBREG_TO_REG)
512 const TargetRegisterClass *RC = TID.OpInfo[i].getRegClass(TRI);
513 if (RC && !RC->contains(NewReg))
520 if (!MII->isRegTiedToUseOperand(i))
523 } else if (TRI->regsOverlap(Reg, NewReg)) {
525 } else if (TRI->regsOverlap(Reg, OldReg)) {
526 if (!MO.isUse() || !MO.isKill())
532 // Found non-two-address def. Stop here.
533 for (unsigned i = 0, e = Refs.size(); i != e; ++i)
534 Refs[i]->setReg(NewReg);
538 // Two-address uses must be updated as well.
539 for (unsigned i = 0, e = Uses.size(); i != e; ++i)
540 Refs.push_back(Uses[i]);
545 /// PropagateForward - Traverse forward and look for the kill of OldReg. If
546 /// it can successfully update all of the uses with NewReg, do so and
548 bool StackSlotColoring::PropagateForward(MachineBasicBlock::iterator MII,
549 MachineBasicBlock *MBB,
550 unsigned OldReg, unsigned NewReg) {
551 if (MII == MBB->end())
554 SmallVector<MachineOperand*, 4> Uses;
555 while (++MII != MBB->end()) {
556 bool FoundKill = false;
557 const TargetInstrDesc &TID = MII->getDesc();
558 for (unsigned i = 0, e = MII->getNumOperands(); i != e; ++i) {
559 MachineOperand &MO = MII->getOperand(i);
562 unsigned Reg = MO.getReg();
566 if (MO.isDef() || MO.isImplicit())
569 // Abort the use is actually a sub-register use. We don't have enough
570 // information to figure out if it is really legal.
571 if (MO.getSubReg() ||
572 TID.getOpcode() == TargetInstrInfo::EXTRACT_SUBREG)
575 const TargetRegisterClass *RC = TID.OpInfo[i].getRegClass(TRI);
576 if (RC && !RC->contains(NewReg))
582 } else if (TRI->regsOverlap(Reg, NewReg) ||
583 TRI->regsOverlap(Reg, OldReg))
587 for (unsigned i = 0, e = Uses.size(); i != e; ++i)
588 Uses[i]->setReg(NewReg);
595 /// UnfoldAndRewriteInstruction - Rewrite specified instruction by unfolding
596 /// folded memory references and replacing those references with register
597 /// references instead.
599 StackSlotColoring::UnfoldAndRewriteInstruction(MachineInstr *MI, int OldFI,
601 const TargetRegisterClass *RC,
602 SmallSet<unsigned, 4> &Defs,
603 MachineFunction &MF) {
604 MachineBasicBlock *MBB = MI->getParent();
605 if (unsigned DstReg = TII->isLoadFromStackSlot(MI, OldFI)) {
606 if (PropagateForward(MI, MBB, DstReg, Reg)) {
607 DEBUG(errs() << "Eliminated load: ");
611 TII->copyRegToReg(*MBB, MI, DstReg, Reg, RC, RC);
615 if (!Defs.count(Reg)) {
616 // If this is the first use of Reg in this MBB and it wasn't previously
617 // defined in MBB, add it to livein.
621 } else if (unsigned SrcReg = TII->isStoreToStackSlot(MI, OldFI)) {
622 if (MI->killsRegister(SrcReg) && PropagateBackward(MI, MBB, SrcReg, Reg)) {
623 DEBUG(errs() << "Eliminated store: ");
627 TII->copyRegToReg(*MBB, MI, Reg, SrcReg, RC, RC);
631 // Remember reg has been defined in MBB.
634 SmallVector<MachineInstr*, 4> NewMIs;
635 bool Success = TII->unfoldMemoryOperand(MF, MI, Reg, false, false, NewMIs);
636 Success = Success; // Silence compiler warning.
637 assert(Success && "Failed to unfold!");
638 MachineInstr *NewMI = NewMIs[0];
639 MBB->insert(MI, NewMI);
642 if (NewMI->readsRegister(Reg)) {
643 if (!Defs.count(Reg))
644 // If this is the first use of Reg in this MBB and it wasn't previously
645 // defined in MBB, add it to livein.
653 /// RemoveDeadStores - Scan through a basic block and look for loads followed
654 /// by stores. If they're both using the same stack slot, then the store is
655 /// definitely dead. This could obviously be much more aggressive (consider
656 /// pairs with instructions between them), but such extensions might have a
657 /// considerable compile time impact.
658 bool StackSlotColoring::RemoveDeadStores(MachineBasicBlock* MBB) {
659 // FIXME: This could be much more aggressive, but we need to investigate
660 // the compile time impact of doing so.
661 bool changed = false;
663 SmallVector<MachineInstr*, 4> toErase;
665 for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end();
667 if (DCELimit != -1 && (int)NumDead >= DCELimit)
670 MachineBasicBlock::iterator NextMI = next(I);
671 if (NextMI == MBB->end()) continue;
673 int FirstSS, SecondSS;
674 unsigned LoadReg = 0;
675 unsigned StoreReg = 0;
676 if (!(LoadReg = TII->isLoadFromStackSlot(I, FirstSS))) continue;
677 if (!(StoreReg = TII->isStoreToStackSlot(NextMI, SecondSS))) continue;
678 if (FirstSS != SecondSS || LoadReg != StoreReg || FirstSS == -1) continue;
683 if (NextMI->findRegisterUseOperandIdx(LoadReg, true, 0) != -1) {
685 toErase.push_back(I);
688 toErase.push_back(NextMI);
692 for (SmallVector<MachineInstr*, 4>::iterator I = toErase.begin(),
693 E = toErase.end(); I != E; ++I)
694 (*I)->eraseFromParent();
700 bool StackSlotColoring::runOnMachineFunction(MachineFunction &MF) {
701 DEBUG(errs() << "********** Stack Slot Coloring **********\n");
703 MFI = MF.getFrameInfo();
704 MRI = &MF.getRegInfo();
705 TII = MF.getTarget().getInstrInfo();
706 TRI = MF.getTarget().getRegisterInfo();
707 LS = &getAnalysis<LiveStacks>();
708 VRM = &getAnalysis<VirtRegMap>();
709 loopInfo = &getAnalysis<MachineLoopInfo>();
711 bool Changed = false;
713 unsigned NumSlots = LS->getNumIntervals();
715 if (NumSlots == 0 || !VRM->HasUnusedRegisters())
720 // Gather spill slot references
721 ScanForSpillSlotRefs(MF);
723 Changed = ColorSlots(MF);
727 for (unsigned i = 0, e = SSRefs.size(); i != e; ++i)
730 OrigAlignments.clear();
734 for (unsigned i = 0, e = Assignments.size(); i != e; ++i)
735 Assignments[i].clear();
739 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I)
740 Changed |= RemoveDeadStores(I);