1 //===-- TailDuplication.cpp - Duplicate blocks into predecessors' tails ---===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This pass duplicates basic blocks ending in unconditional branches into
11 // the tails of their predecessors.
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "tailduplication"
16 #include "llvm/CodeGen/Passes.h"
17 #include "llvm/ADT/DenseSet.h"
18 #include "llvm/ADT/OwningPtr.h"
19 #include "llvm/ADT/SetVector.h"
20 #include "llvm/ADT/SmallSet.h"
21 #include "llvm/ADT/Statistic.h"
22 #include "llvm/CodeGen/MachineFunctionPass.h"
23 #include "llvm/CodeGen/MachineInstrBuilder.h"
24 #include "llvm/CodeGen/MachineModuleInfo.h"
25 #include "llvm/CodeGen/MachineRegisterInfo.h"
26 #include "llvm/CodeGen/MachineSSAUpdater.h"
27 #include "llvm/CodeGen/RegisterScavenging.h"
28 #include "llvm/IR/Function.h"
29 #include "llvm/Support/CommandLine.h"
30 #include "llvm/Support/Debug.h"
31 #include "llvm/Support/ErrorHandling.h"
32 #include "llvm/Support/raw_ostream.h"
33 #include "llvm/Target/TargetInstrInfo.h"
34 #include "llvm/Target/TargetRegisterInfo.h"
37 STATISTIC(NumTails , "Number of tails duplicated");
38 STATISTIC(NumTailDups , "Number of tail duplicated blocks");
39 STATISTIC(NumInstrDups , "Additional instructions due to tail duplication");
40 STATISTIC(NumDeadBlocks, "Number of dead blocks removed");
41 STATISTIC(NumAddedPHIs , "Number of phis added");
43 // Heuristic for tail duplication.
44 static cl::opt<unsigned>
45 TailDuplicateSize("tail-dup-size",
46 cl::desc("Maximum instructions to consider tail duplicating"),
47 cl::init(2), cl::Hidden);
50 TailDupVerify("tail-dup-verify",
51 cl::desc("Verify sanity of PHI instructions during taildup"),
52 cl::init(false), cl::Hidden);
54 static cl::opt<unsigned>
55 TailDupLimit("tail-dup-limit", cl::init(~0U), cl::Hidden);
57 typedef std::vector<std::pair<MachineBasicBlock*,unsigned> > AvailableValsTy;
60 /// TailDuplicatePass - Perform tail duplication.
61 class TailDuplicatePass : public MachineFunctionPass {
62 const TargetInstrInfo *TII;
63 const TargetRegisterInfo *TRI;
64 MachineModuleInfo *MMI;
65 MachineRegisterInfo *MRI;
66 OwningPtr<RegScavenger> RS;
69 // SSAUpdateVRs - A list of virtual registers for which to update SSA form.
70 SmallVector<unsigned, 16> SSAUpdateVRs;
72 // SSAUpdateVals - For each virtual register in SSAUpdateVals keep a list of
73 // source virtual registers.
74 DenseMap<unsigned, AvailableValsTy> SSAUpdateVals;
78 explicit TailDuplicatePass() :
79 MachineFunctionPass(ID), PreRegAlloc(false) {}
81 virtual bool runOnMachineFunction(MachineFunction &MF);
84 void AddSSAUpdateEntry(unsigned OrigReg, unsigned NewReg,
85 MachineBasicBlock *BB);
86 void ProcessPHI(MachineInstr *MI, MachineBasicBlock *TailBB,
87 MachineBasicBlock *PredBB,
88 DenseMap<unsigned, unsigned> &LocalVRMap,
89 SmallVector<std::pair<unsigned,unsigned>, 4> &Copies,
90 const DenseSet<unsigned> &UsedByPhi,
92 void DuplicateInstruction(MachineInstr *MI,
93 MachineBasicBlock *TailBB,
94 MachineBasicBlock *PredBB,
96 DenseMap<unsigned, unsigned> &LocalVRMap,
97 const DenseSet<unsigned> &UsedByPhi);
98 void UpdateSuccessorsPHIs(MachineBasicBlock *FromBB, bool isDead,
99 SmallVector<MachineBasicBlock*, 8> &TDBBs,
100 SmallSetVector<MachineBasicBlock*, 8> &Succs);
101 bool TailDuplicateBlocks(MachineFunction &MF);
102 bool shouldTailDuplicate(const MachineFunction &MF,
103 bool IsSimple, MachineBasicBlock &TailBB);
104 bool isSimpleBB(MachineBasicBlock *TailBB);
105 bool canCompletelyDuplicateBB(MachineBasicBlock &BB);
106 bool duplicateSimpleBB(MachineBasicBlock *TailBB,
107 SmallVector<MachineBasicBlock*, 8> &TDBBs,
108 const DenseSet<unsigned> &RegsUsedByPhi,
109 SmallVector<MachineInstr*, 16> &Copies);
110 bool TailDuplicate(MachineBasicBlock *TailBB,
113 SmallVector<MachineBasicBlock*, 8> &TDBBs,
114 SmallVector<MachineInstr*, 16> &Copies);
115 bool TailDuplicateAndUpdate(MachineBasicBlock *MBB,
117 MachineFunction &MF);
119 void RemoveDeadBlock(MachineBasicBlock *MBB);
122 char TailDuplicatePass::ID = 0;
125 char &llvm::TailDuplicateID = TailDuplicatePass::ID;
127 INITIALIZE_PASS(TailDuplicatePass, "tailduplication", "Tail Duplication",
130 bool TailDuplicatePass::runOnMachineFunction(MachineFunction &MF) {
131 TII = MF.getTarget().getInstrInfo();
132 TRI = MF.getTarget().getRegisterInfo();
133 MRI = &MF.getRegInfo();
134 MMI = getAnalysisIfAvailable<MachineModuleInfo>();
135 PreRegAlloc = MRI->isSSA();
137 if (MRI->tracksLiveness() && TRI->trackLivenessAfterRegAlloc(MF))
138 RS.reset(new RegScavenger());
140 bool MadeChange = false;
141 while (TailDuplicateBlocks(MF))
147 static void VerifyPHIs(MachineFunction &MF, bool CheckExtra) {
148 for (MachineFunction::iterator I = ++MF.begin(), E = MF.end(); I != E; ++I) {
149 MachineBasicBlock *MBB = I;
150 SmallSetVector<MachineBasicBlock*, 8> Preds(MBB->pred_begin(),
152 MachineBasicBlock::iterator MI = MBB->begin();
153 while (MI != MBB->end()) {
156 for (SmallSetVector<MachineBasicBlock *, 8>::iterator PI = Preds.begin(),
157 PE = Preds.end(); PI != PE; ++PI) {
158 MachineBasicBlock *PredBB = *PI;
160 for (unsigned i = 1, e = MI->getNumOperands(); i != e; i += 2) {
161 MachineBasicBlock *PHIBB = MI->getOperand(i+1).getMBB();
162 if (PHIBB == PredBB) {
168 dbgs() << "Malformed PHI in BB#" << MBB->getNumber() << ": " << *MI;
169 dbgs() << " missing input from predecessor BB#"
170 << PredBB->getNumber() << '\n';
175 for (unsigned i = 1, e = MI->getNumOperands(); i != e; i += 2) {
176 MachineBasicBlock *PHIBB = MI->getOperand(i+1).getMBB();
177 if (CheckExtra && !Preds.count(PHIBB)) {
178 dbgs() << "Warning: malformed PHI in BB#" << MBB->getNumber()
180 dbgs() << " extra input from predecessor BB#"
181 << PHIBB->getNumber() << '\n';
184 if (PHIBB->getNumber() < 0) {
185 dbgs() << "Malformed PHI in BB#" << MBB->getNumber() << ": " << *MI;
186 dbgs() << " non-existing BB#" << PHIBB->getNumber() << '\n';
195 /// TailDuplicateAndUpdate - Tail duplicate the block and cleanup.
197 TailDuplicatePass::TailDuplicateAndUpdate(MachineBasicBlock *MBB,
199 MachineFunction &MF) {
200 // Save the successors list.
201 SmallSetVector<MachineBasicBlock*, 8> Succs(MBB->succ_begin(),
204 SmallVector<MachineBasicBlock*, 8> TDBBs;
205 SmallVector<MachineInstr*, 16> Copies;
206 if (!TailDuplicate(MBB, IsSimple, MF, TDBBs, Copies))
211 SmallVector<MachineInstr*, 8> NewPHIs;
212 MachineSSAUpdater SSAUpdate(MF, &NewPHIs);
214 // TailBB's immediate successors are now successors of those predecessors
215 // which duplicated TailBB. Add the predecessors as sources to the PHI
217 bool isDead = MBB->pred_empty() && !MBB->hasAddressTaken();
219 UpdateSuccessorsPHIs(MBB, isDead, TDBBs, Succs);
221 // If it is dead, remove it.
223 NumInstrDups -= MBB->size();
224 RemoveDeadBlock(MBB);
229 if (!SSAUpdateVRs.empty()) {
230 for (unsigned i = 0, e = SSAUpdateVRs.size(); i != e; ++i) {
231 unsigned VReg = SSAUpdateVRs[i];
232 SSAUpdate.Initialize(VReg);
234 // If the original definition is still around, add it as an available
236 MachineInstr *DefMI = MRI->getVRegDef(VReg);
237 MachineBasicBlock *DefBB = 0;
239 DefBB = DefMI->getParent();
240 SSAUpdate.AddAvailableValue(DefBB, VReg);
243 // Add the new vregs as available values.
244 DenseMap<unsigned, AvailableValsTy>::iterator LI =
245 SSAUpdateVals.find(VReg);
246 for (unsigned j = 0, ee = LI->second.size(); j != ee; ++j) {
247 MachineBasicBlock *SrcBB = LI->second[j].first;
248 unsigned SrcReg = LI->second[j].second;
249 SSAUpdate.AddAvailableValue(SrcBB, SrcReg);
252 // Rewrite uses that are outside of the original def's block.
253 MachineRegisterInfo::use_iterator UI = MRI->use_begin(VReg);
254 while (UI != MRI->use_end()) {
255 MachineOperand &UseMO = UI.getOperand();
256 MachineInstr *UseMI = &*UI;
258 if (UseMI->isDebugValue()) {
259 // SSAUpdate can replace the use with an undef. That creates
260 // a debug instruction that is a kill.
261 // FIXME: Should it SSAUpdate job to delete debug instructions
262 // instead of replacing the use with undef?
263 UseMI->eraseFromParent();
266 if (UseMI->getParent() == DefBB && !UseMI->isPHI())
268 SSAUpdate.RewriteUse(UseMO);
272 SSAUpdateVRs.clear();
273 SSAUpdateVals.clear();
276 // Eliminate some of the copies inserted by tail duplication to maintain
278 for (unsigned i = 0, e = Copies.size(); i != e; ++i) {
279 MachineInstr *Copy = Copies[i];
282 unsigned Dst = Copy->getOperand(0).getReg();
283 unsigned Src = Copy->getOperand(1).getReg();
284 if (MRI->hasOneNonDBGUse(Src) &&
285 MRI->constrainRegClass(Src, MRI->getRegClass(Dst))) {
286 // Copy is the only use. Do trivial copy propagation here.
287 MRI->replaceRegWith(Dst, Src);
288 Copy->eraseFromParent();
293 NumAddedPHIs += NewPHIs.size();
298 /// TailDuplicateBlocks - Look for small blocks that are unconditionally
299 /// branched to and do not fall through. Tail-duplicate their instructions
300 /// into their predecessors to eliminate (dynamic) branches.
301 bool TailDuplicatePass::TailDuplicateBlocks(MachineFunction &MF) {
302 bool MadeChange = false;
304 if (PreRegAlloc && TailDupVerify) {
305 DEBUG(dbgs() << "\n*** Before tail-duplicating\n");
306 VerifyPHIs(MF, true);
309 for (MachineFunction::iterator I = ++MF.begin(), E = MF.end(); I != E; ) {
310 MachineBasicBlock *MBB = I++;
312 if (NumTails == TailDupLimit)
315 bool IsSimple = isSimpleBB(MBB);
317 if (!shouldTailDuplicate(MF, IsSimple, *MBB))
320 MadeChange |= TailDuplicateAndUpdate(MBB, IsSimple, MF);
323 if (PreRegAlloc && TailDupVerify)
324 VerifyPHIs(MF, false);
329 static bool isDefLiveOut(unsigned Reg, MachineBasicBlock *BB,
330 const MachineRegisterInfo *MRI) {
331 for (MachineRegisterInfo::use_iterator UI = MRI->use_begin(Reg),
332 UE = MRI->use_end(); UI != UE; ++UI) {
333 MachineInstr *UseMI = &*UI;
334 if (UseMI->isDebugValue())
336 if (UseMI->getParent() != BB)
342 static unsigned getPHISrcRegOpIdx(MachineInstr *MI, MachineBasicBlock *SrcBB) {
343 for (unsigned i = 1, e = MI->getNumOperands(); i != e; i += 2)
344 if (MI->getOperand(i+1).getMBB() == SrcBB)
350 // Remember which registers are used by phis in this block. This is
351 // used to determine which registers are liveout while modifying the
352 // block (which is why we need to copy the information).
353 static void getRegsUsedByPHIs(const MachineBasicBlock &BB,
354 DenseSet<unsigned> *UsedByPhi) {
355 for(MachineBasicBlock::const_iterator I = BB.begin(), E = BB.end();
357 const MachineInstr &MI = *I;
360 for (unsigned i = 1, e = MI.getNumOperands(); i != e; i += 2) {
361 unsigned SrcReg = MI.getOperand(i).getReg();
362 UsedByPhi->insert(SrcReg);
367 /// AddSSAUpdateEntry - Add a definition and source virtual registers pair for
369 void TailDuplicatePass::AddSSAUpdateEntry(unsigned OrigReg, unsigned NewReg,
370 MachineBasicBlock *BB) {
371 DenseMap<unsigned, AvailableValsTy>::iterator LI= SSAUpdateVals.find(OrigReg);
372 if (LI != SSAUpdateVals.end())
373 LI->second.push_back(std::make_pair(BB, NewReg));
375 AvailableValsTy Vals;
376 Vals.push_back(std::make_pair(BB, NewReg));
377 SSAUpdateVals.insert(std::make_pair(OrigReg, Vals));
378 SSAUpdateVRs.push_back(OrigReg);
382 /// ProcessPHI - Process PHI node in TailBB by turning it into a copy in PredBB.
383 /// Remember the source register that's contributed by PredBB and update SSA
385 void TailDuplicatePass::ProcessPHI(MachineInstr *MI,
386 MachineBasicBlock *TailBB,
387 MachineBasicBlock *PredBB,
388 DenseMap<unsigned, unsigned> &LocalVRMap,
389 SmallVector<std::pair<unsigned,unsigned>, 4> &Copies,
390 const DenseSet<unsigned> &RegsUsedByPhi,
392 unsigned DefReg = MI->getOperand(0).getReg();
393 unsigned SrcOpIdx = getPHISrcRegOpIdx(MI, PredBB);
394 assert(SrcOpIdx && "Unable to find matching PHI source?");
395 unsigned SrcReg = MI->getOperand(SrcOpIdx).getReg();
396 const TargetRegisterClass *RC = MRI->getRegClass(DefReg);
397 LocalVRMap.insert(std::make_pair(DefReg, SrcReg));
399 // Insert a copy from source to the end of the block. The def register is the
400 // available value liveout of the block.
401 unsigned NewDef = MRI->createVirtualRegister(RC);
402 Copies.push_back(std::make_pair(NewDef, SrcReg));
403 if (isDefLiveOut(DefReg, TailBB, MRI) || RegsUsedByPhi.count(DefReg))
404 AddSSAUpdateEntry(DefReg, NewDef, PredBB);
409 // Remove PredBB from the PHI node.
410 MI->RemoveOperand(SrcOpIdx+1);
411 MI->RemoveOperand(SrcOpIdx);
412 if (MI->getNumOperands() == 1)
413 MI->eraseFromParent();
416 /// DuplicateInstruction - Duplicate a TailBB instruction to PredBB and update
417 /// the source operands due to earlier PHI translation.
418 void TailDuplicatePass::DuplicateInstruction(MachineInstr *MI,
419 MachineBasicBlock *TailBB,
420 MachineBasicBlock *PredBB,
422 DenseMap<unsigned, unsigned> &LocalVRMap,
423 const DenseSet<unsigned> &UsedByPhi) {
424 MachineInstr *NewMI = TII->duplicate(MI, MF);
425 for (unsigned i = 0, e = NewMI->getNumOperands(); i != e; ++i) {
426 MachineOperand &MO = NewMI->getOperand(i);
429 unsigned Reg = MO.getReg();
430 if (!TargetRegisterInfo::isVirtualRegister(Reg))
433 const TargetRegisterClass *RC = MRI->getRegClass(Reg);
434 unsigned NewReg = MRI->createVirtualRegister(RC);
436 LocalVRMap.insert(std::make_pair(Reg, NewReg));
437 if (isDefLiveOut(Reg, TailBB, MRI) || UsedByPhi.count(Reg))
438 AddSSAUpdateEntry(Reg, NewReg, PredBB);
440 DenseMap<unsigned, unsigned>::iterator VI = LocalVRMap.find(Reg);
441 if (VI != LocalVRMap.end()) {
442 MO.setReg(VI->second);
443 MRI->constrainRegClass(VI->second, MRI->getRegClass(Reg));
447 PredBB->insert(PredBB->instr_end(), NewMI);
450 /// UpdateSuccessorsPHIs - After FromBB is tail duplicated into its predecessor
451 /// blocks, the successors have gained new predecessors. Update the PHI
452 /// instructions in them accordingly.
454 TailDuplicatePass::UpdateSuccessorsPHIs(MachineBasicBlock *FromBB, bool isDead,
455 SmallVector<MachineBasicBlock*, 8> &TDBBs,
456 SmallSetVector<MachineBasicBlock*,8> &Succs) {
457 for (SmallSetVector<MachineBasicBlock*, 8>::iterator SI = Succs.begin(),
458 SE = Succs.end(); SI != SE; ++SI) {
459 MachineBasicBlock *SuccBB = *SI;
460 for (MachineBasicBlock::iterator II = SuccBB->begin(), EE = SuccBB->end();
464 MachineInstrBuilder MIB(*FromBB->getParent(), II);
466 for (unsigned i = 1, e = II->getNumOperands(); i != e; i += 2) {
467 MachineOperand &MO = II->getOperand(i+1);
468 if (MO.getMBB() == FromBB) {
475 MachineOperand &MO0 = II->getOperand(Idx);
476 unsigned Reg = MO0.getReg();
478 // Folded into the previous BB.
479 // There could be duplicate phi source entries. FIXME: Should sdisel
480 // or earlier pass fixed this?
481 for (unsigned i = II->getNumOperands()-2; i != Idx; i -= 2) {
482 MachineOperand &MO = II->getOperand(i+1);
483 if (MO.getMBB() == FromBB) {
484 II->RemoveOperand(i+1);
485 II->RemoveOperand(i);
491 // If Idx is set, the operands at Idx and Idx+1 must be removed.
492 // We reuse the location to avoid expensive RemoveOperand calls.
494 DenseMap<unsigned,AvailableValsTy>::iterator LI=SSAUpdateVals.find(Reg);
495 if (LI != SSAUpdateVals.end()) {
496 // This register is defined in the tail block.
497 for (unsigned j = 0, ee = LI->second.size(); j != ee; ++j) {
498 MachineBasicBlock *SrcBB = LI->second[j].first;
499 // If we didn't duplicate a bb into a particular predecessor, we
500 // might still have added an entry to SSAUpdateVals to correcly
501 // recompute SSA. If that case, avoid adding a dummy extra argument
503 if (!SrcBB->isSuccessor(SuccBB))
506 unsigned SrcReg = LI->second[j].second;
508 II->getOperand(Idx).setReg(SrcReg);
509 II->getOperand(Idx+1).setMBB(SrcBB);
512 MIB.addReg(SrcReg).addMBB(SrcBB);
516 // Live in tail block, must also be live in predecessors.
517 for (unsigned j = 0, ee = TDBBs.size(); j != ee; ++j) {
518 MachineBasicBlock *SrcBB = TDBBs[j];
520 II->getOperand(Idx).setReg(Reg);
521 II->getOperand(Idx+1).setMBB(SrcBB);
524 MIB.addReg(Reg).addMBB(SrcBB);
529 II->RemoveOperand(Idx+1);
530 II->RemoveOperand(Idx);
536 /// shouldTailDuplicate - Determine if it is profitable to duplicate this block.
538 TailDuplicatePass::shouldTailDuplicate(const MachineFunction &MF,
540 MachineBasicBlock &TailBB) {
541 // Only duplicate blocks that end with unconditional branches.
542 if (TailBB.canFallThrough())
545 // Don't try to tail-duplicate single-block loops.
546 if (TailBB.isSuccessor(&TailBB))
549 // Set the limit on the cost to duplicate. When optimizing for size,
550 // duplicate only one, because one branch instruction can be eliminated to
551 // compensate for the duplication.
552 unsigned MaxDuplicateCount;
553 if (TailDuplicateSize.getNumOccurrences() == 0 &&
554 MF.getFunction()->getAttributes().
555 hasAttribute(AttributeSet::FunctionIndex, Attribute::OptimizeForSize))
556 MaxDuplicateCount = 1;
558 MaxDuplicateCount = TailDuplicateSize;
560 // If the target has hardware branch prediction that can handle indirect
561 // branches, duplicating them can often make them predictable when there
562 // are common paths through the code. The limit needs to be high enough
563 // to allow undoing the effects of tail merging and other optimizations
564 // that rearrange the predecessors of the indirect branch.
566 bool HasIndirectbr = false;
568 HasIndirectbr = TailBB.back().isIndirectBranch();
570 if (HasIndirectbr && PreRegAlloc)
571 MaxDuplicateCount = 20;
573 // Check the instructions in the block to determine whether tail-duplication
574 // is invalid or unlikely to be profitable.
575 unsigned InstrCount = 0;
576 for (MachineBasicBlock::iterator I = TailBB.begin(); I != TailBB.end(); ++I) {
577 // Non-duplicable things shouldn't be tail-duplicated.
578 if (I->isNotDuplicable())
581 // Do not duplicate 'return' instructions if this is a pre-regalloc run.
582 // A return may expand into a lot more instructions (e.g. reload of callee
583 // saved registers) after PEI.
584 if (PreRegAlloc && I->isReturn())
587 // Avoid duplicating calls before register allocation. Calls presents a
588 // barrier to register allocation so duplicating them may end up increasing
590 if (PreRegAlloc && I->isCall())
593 if (!I->isPHI() && !I->isDebugValue())
596 if (InstrCount > MaxDuplicateCount)
600 if (HasIndirectbr && PreRegAlloc)
609 return canCompletelyDuplicateBB(TailBB);
612 /// isSimpleBB - True if this BB has only one unconditional jump.
614 TailDuplicatePass::isSimpleBB(MachineBasicBlock *TailBB) {
615 if (TailBB->succ_size() != 1)
617 if (TailBB->pred_empty())
619 MachineBasicBlock::iterator I = TailBB->begin();
620 MachineBasicBlock::iterator E = TailBB->end();
621 while (I != E && I->isDebugValue())
625 return I->isUnconditionalBranch();
629 bothUsedInPHI(const MachineBasicBlock &A,
630 SmallPtrSet<MachineBasicBlock*, 8> SuccsB) {
631 for (MachineBasicBlock::const_succ_iterator SI = A.succ_begin(),
632 SE = A.succ_end(); SI != SE; ++SI) {
633 MachineBasicBlock *BB = *SI;
634 if (SuccsB.count(BB) && !BB->empty() && BB->begin()->isPHI())
642 TailDuplicatePass::canCompletelyDuplicateBB(MachineBasicBlock &BB) {
643 SmallPtrSet<MachineBasicBlock*, 8> Succs(BB.succ_begin(), BB.succ_end());
645 for (MachineBasicBlock::pred_iterator PI = BB.pred_begin(),
646 PE = BB.pred_end(); PI != PE; ++PI) {
647 MachineBasicBlock *PredBB = *PI;
649 if (PredBB->succ_size() > 1)
652 MachineBasicBlock *PredTBB = NULL, *PredFBB = NULL;
653 SmallVector<MachineOperand, 4> PredCond;
654 if (TII->AnalyzeBranch(*PredBB, PredTBB, PredFBB, PredCond, true))
657 if (!PredCond.empty())
664 TailDuplicatePass::duplicateSimpleBB(MachineBasicBlock *TailBB,
665 SmallVector<MachineBasicBlock*, 8> &TDBBs,
666 const DenseSet<unsigned> &UsedByPhi,
667 SmallVector<MachineInstr*, 16> &Copies) {
668 SmallPtrSet<MachineBasicBlock*, 8> Succs(TailBB->succ_begin(),
670 SmallVector<MachineBasicBlock*, 8> Preds(TailBB->pred_begin(),
672 bool Changed = false;
673 for (SmallSetVector<MachineBasicBlock *, 8>::iterator PI = Preds.begin(),
674 PE = Preds.end(); PI != PE; ++PI) {
675 MachineBasicBlock *PredBB = *PI;
677 if (PredBB->getLandingPadSuccessor())
680 if (bothUsedInPHI(*PredBB, Succs))
683 MachineBasicBlock *PredTBB = NULL, *PredFBB = NULL;
684 SmallVector<MachineOperand, 4> PredCond;
685 if (TII->AnalyzeBranch(*PredBB, PredTBB, PredFBB, PredCond, true))
689 DEBUG(dbgs() << "\nTail-duplicating into PredBB: " << *PredBB
690 << "From simple Succ: " << *TailBB);
692 MachineBasicBlock *NewTarget = *TailBB->succ_begin();
693 MachineBasicBlock *NextBB = llvm::next(MachineFunction::iterator(PredBB));
695 // Make PredFBB explicit.
696 if (PredCond.empty())
699 // Make fall through explicit.
706 if (PredFBB == TailBB)
708 if (PredTBB == TailBB)
711 // Make the branch unconditional if possible
712 if (PredTBB == PredFBB) {
717 // Avoid adding fall through branches.
718 if (PredFBB == NextBB)
720 if (PredTBB == NextBB && PredFBB == NULL)
723 TII->RemoveBranch(*PredBB);
726 TII->InsertBranch(*PredBB, PredTBB, PredFBB, PredCond, DebugLoc());
728 PredBB->removeSuccessor(TailBB);
729 unsigned NumSuccessors = PredBB->succ_size();
730 assert(NumSuccessors <= 1);
731 if (NumSuccessors == 0 || *PredBB->succ_begin() != NewTarget)
732 PredBB->addSuccessor(NewTarget);
734 TDBBs.push_back(PredBB);
739 /// TailDuplicate - If it is profitable, duplicate TailBB's contents in each
740 /// of its predecessors.
742 TailDuplicatePass::TailDuplicate(MachineBasicBlock *TailBB,
745 SmallVector<MachineBasicBlock*, 8> &TDBBs,
746 SmallVector<MachineInstr*, 16> &Copies) {
747 DEBUG(dbgs() << "\n*** Tail-duplicating BB#" << TailBB->getNumber() << '\n');
749 DenseSet<unsigned> UsedByPhi;
750 getRegsUsedByPHIs(*TailBB, &UsedByPhi);
753 return duplicateSimpleBB(TailBB, TDBBs, UsedByPhi, Copies);
755 // Iterate through all the unique predecessors and tail-duplicate this
756 // block into them, if possible. Copying the list ahead of time also
757 // avoids trouble with the predecessor list reallocating.
758 bool Changed = false;
759 SmallSetVector<MachineBasicBlock*, 8> Preds(TailBB->pred_begin(),
761 for (SmallSetVector<MachineBasicBlock *, 8>::iterator PI = Preds.begin(),
762 PE = Preds.end(); PI != PE; ++PI) {
763 MachineBasicBlock *PredBB = *PI;
765 assert(TailBB != PredBB &&
766 "Single-block loop should have been rejected earlier!");
767 // EH edges are ignored by AnalyzeBranch.
768 if (PredBB->succ_size() > 1)
771 MachineBasicBlock *PredTBB, *PredFBB;
772 SmallVector<MachineOperand, 4> PredCond;
773 if (TII->AnalyzeBranch(*PredBB, PredTBB, PredFBB, PredCond, true))
775 if (!PredCond.empty())
777 // Don't duplicate into a fall-through predecessor (at least for now).
778 if (PredBB->isLayoutSuccessor(TailBB) && PredBB->canFallThrough())
781 DEBUG(dbgs() << "\nTail-duplicating into PredBB: " << *PredBB
782 << "From Succ: " << *TailBB);
784 TDBBs.push_back(PredBB);
786 // Remove PredBB's unconditional branch.
787 TII->RemoveBranch(*PredBB);
789 if (RS && !TailBB->livein_empty()) {
790 // Update PredBB livein.
791 RS->enterBasicBlock(PredBB);
792 if (!PredBB->empty())
793 RS->forward(prior(PredBB->end()));
794 BitVector RegsLiveAtExit(TRI->getNumRegs());
795 RS->getRegsUsed(RegsLiveAtExit, false);
796 for (MachineBasicBlock::livein_iterator I = TailBB->livein_begin(),
797 E = TailBB->livein_end(); I != E; ++I) {
798 if (!RegsLiveAtExit[*I])
799 // If a register is previously livein to the tail but it's not live
800 // at the end of predecessor BB, then it should be added to its
802 PredBB->addLiveIn(*I);
806 // Clone the contents of TailBB into PredBB.
807 DenseMap<unsigned, unsigned> LocalVRMap;
808 SmallVector<std::pair<unsigned,unsigned>, 4> CopyInfos;
809 // Use instr_iterator here to properly handle bundles, e.g.
810 // ARM Thumb2 IT block.
811 MachineBasicBlock::instr_iterator I = TailBB->instr_begin();
812 while (I != TailBB->instr_end()) {
813 MachineInstr *MI = &*I;
816 // Replace the uses of the def of the PHI with the register coming
818 ProcessPHI(MI, TailBB, PredBB, LocalVRMap, CopyInfos, UsedByPhi, true);
820 // Replace def of virtual registers with new registers, and update
821 // uses with PHI source register or the new registers.
822 DuplicateInstruction(MI, TailBB, PredBB, MF, LocalVRMap, UsedByPhi);
825 MachineBasicBlock::iterator Loc = PredBB->getFirstTerminator();
826 for (unsigned i = 0, e = CopyInfos.size(); i != e; ++i) {
827 Copies.push_back(BuildMI(*PredBB, Loc, DebugLoc(),
828 TII->get(TargetOpcode::COPY),
829 CopyInfos[i].first).addReg(CopyInfos[i].second));
833 TII->AnalyzeBranch(*PredBB, PredTBB, PredFBB, PredCond, true);
835 NumInstrDups += TailBB->size() - 1; // subtract one for removed branch
838 PredBB->removeSuccessor(PredBB->succ_begin());
839 assert(PredBB->succ_empty() &&
840 "TailDuplicate called on block with multiple successors!");
841 for (MachineBasicBlock::succ_iterator I = TailBB->succ_begin(),
842 E = TailBB->succ_end(); I != E; ++I)
843 PredBB->addSuccessor(*I);
849 // If TailBB was duplicated into all its predecessors except for the prior
850 // block, which falls through unconditionally, move the contents of this
851 // block into the prior block.
852 MachineBasicBlock *PrevBB = prior(MachineFunction::iterator(TailBB));
853 MachineBasicBlock *PriorTBB = 0, *PriorFBB = 0;
854 SmallVector<MachineOperand, 4> PriorCond;
855 // This has to check PrevBB->succ_size() because EH edges are ignored by
857 if (PrevBB->succ_size() == 1 &&
858 !TII->AnalyzeBranch(*PrevBB, PriorTBB, PriorFBB, PriorCond, true) &&
859 PriorCond.empty() && !PriorTBB && TailBB->pred_size() == 1 &&
860 !TailBB->hasAddressTaken()) {
861 DEBUG(dbgs() << "\nMerging into block: " << *PrevBB
862 << "From MBB: " << *TailBB);
864 DenseMap<unsigned, unsigned> LocalVRMap;
865 SmallVector<std::pair<unsigned,unsigned>, 4> CopyInfos;
866 MachineBasicBlock::iterator I = TailBB->begin();
867 // Process PHI instructions first.
868 while (I != TailBB->end() && I->isPHI()) {
869 // Replace the uses of the def of the PHI with the register coming
871 MachineInstr *MI = &*I++;
872 ProcessPHI(MI, TailBB, PrevBB, LocalVRMap, CopyInfos, UsedByPhi, true);
874 MI->eraseFromParent();
877 // Now copy the non-PHI instructions.
878 while (I != TailBB->end()) {
879 // Replace def of virtual registers with new registers, and update
880 // uses with PHI source register or the new registers.
881 MachineInstr *MI = &*I++;
882 assert(!MI->isBundle() && "Not expecting bundles before regalloc!");
883 DuplicateInstruction(MI, TailBB, PrevBB, MF, LocalVRMap, UsedByPhi);
884 MI->eraseFromParent();
886 MachineBasicBlock::iterator Loc = PrevBB->getFirstTerminator();
887 for (unsigned i = 0, e = CopyInfos.size(); i != e; ++i) {
888 Copies.push_back(BuildMI(*PrevBB, Loc, DebugLoc(),
889 TII->get(TargetOpcode::COPY),
891 .addReg(CopyInfos[i].second));
894 // No PHIs to worry about, just splice the instructions over.
895 PrevBB->splice(PrevBB->end(), TailBB, TailBB->begin(), TailBB->end());
897 PrevBB->removeSuccessor(PrevBB->succ_begin());
898 assert(PrevBB->succ_empty());
899 PrevBB->transferSuccessors(TailBB);
900 TDBBs.push_back(PrevBB);
904 // If this is after register allocation, there are no phis to fix.
908 // If we made no changes so far, we are safe.
913 // Handle the nasty case in that we duplicated a block that is part of a loop
914 // into some but not all of its predecessors. For example:
918 // if we duplicate 2 into 1 but not into 3, we end up with
919 // 12 -> 3 <-> 2 -> rest |
922 // If there was a "var = phi(1, 3)" in 2, it has to be ultimately replaced
923 // with a phi in 3 (which now dominates 2).
924 // What we do here is introduce a copy in 3 of the register defined by the
925 // phi, just like when we are duplicating 2 into 3, but we don't copy any
926 // real instructions or remove the 3 -> 2 edge from the phi in 2.
927 for (SmallSetVector<MachineBasicBlock *, 8>::iterator PI = Preds.begin(),
928 PE = Preds.end(); PI != PE; ++PI) {
929 MachineBasicBlock *PredBB = *PI;
930 if (std::find(TDBBs.begin(), TDBBs.end(), PredBB) != TDBBs.end())
934 if (PredBB->succ_size() != 1)
937 DenseMap<unsigned, unsigned> LocalVRMap;
938 SmallVector<std::pair<unsigned,unsigned>, 4> CopyInfos;
939 MachineBasicBlock::iterator I = TailBB->begin();
940 // Process PHI instructions first.
941 while (I != TailBB->end() && I->isPHI()) {
942 // Replace the uses of the def of the PHI with the register coming
944 MachineInstr *MI = &*I++;
945 ProcessPHI(MI, TailBB, PredBB, LocalVRMap, CopyInfos, UsedByPhi, false);
947 MachineBasicBlock::iterator Loc = PredBB->getFirstTerminator();
948 for (unsigned i = 0, e = CopyInfos.size(); i != e; ++i) {
949 Copies.push_back(BuildMI(*PredBB, Loc, DebugLoc(),
950 TII->get(TargetOpcode::COPY),
951 CopyInfos[i].first).addReg(CopyInfos[i].second));
958 /// RemoveDeadBlock - Remove the specified dead machine basic block from the
959 /// function, updating the CFG.
960 void TailDuplicatePass::RemoveDeadBlock(MachineBasicBlock *MBB) {
961 assert(MBB->pred_empty() && "MBB must be dead!");
962 DEBUG(dbgs() << "\nRemoving MBB: " << *MBB);
964 // Remove all successors.
965 while (!MBB->succ_empty())
966 MBB->removeSuccessor(MBB->succ_end()-1);
969 MBB->eraseFromParent();