1 //===-- TailDuplication.cpp - Duplicate blocks into predecessors' tails ---===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This pass duplicates basic blocks ending in unconditional branches into
11 // the tails of their predecessors.
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "tailduplication"
16 #include "llvm/Function.h"
17 #include "llvm/CodeGen/Passes.h"
18 #include "llvm/CodeGen/MachineModuleInfo.h"
19 #include "llvm/CodeGen/MachineFunctionPass.h"
20 #include "llvm/CodeGen/MachineRegisterInfo.h"
21 #include "llvm/CodeGen/MachineSSAUpdater.h"
22 #include "llvm/Target/TargetInstrInfo.h"
23 #include "llvm/Support/CommandLine.h"
24 #include "llvm/Support/Debug.h"
25 #include "llvm/Support/ErrorHandling.h"
26 #include "llvm/Support/raw_ostream.h"
27 #include "llvm/ADT/SmallSet.h"
28 #include "llvm/ADT/SetVector.h"
29 #include "llvm/ADT/Statistic.h"
32 STATISTIC(NumTails , "Number of tails duplicated");
33 STATISTIC(NumTailDups , "Number of tail duplicated blocks");
34 STATISTIC(NumInstrDups , "Additional instructions due to tail duplication");
35 STATISTIC(NumDeadBlocks, "Number of dead blocks removed");
37 // Heuristic for tail duplication.
38 static cl::opt<unsigned>
39 TailDuplicateSize("tail-dup-size",
40 cl::desc("Maximum instructions to consider tail duplicating"),
41 cl::init(2), cl::Hidden);
44 TailDupVerify("tail-dup-verify",
45 cl::desc("Verify sanity of PHI instructions during taildup"),
46 cl::init(false), cl::Hidden);
48 static cl::opt<unsigned>
49 TailDupLimit("tail-dup-limit", cl::init(~0U), cl::Hidden);
51 typedef std::vector<std::pair<MachineBasicBlock*,unsigned> > AvailableValsTy;
54 /// TailDuplicatePass - Perform tail duplication.
55 class TailDuplicatePass : public MachineFunctionPass {
57 const TargetInstrInfo *TII;
58 MachineModuleInfo *MMI;
59 MachineRegisterInfo *MRI;
61 // SSAUpdateVRs - A list of virtual registers for which to update SSA form.
62 SmallVector<unsigned, 16> SSAUpdateVRs;
64 // SSAUpdateVals - For each virtual register in SSAUpdateVals keep a list of
65 // source virtual registers.
66 DenseMap<unsigned, AvailableValsTy> SSAUpdateVals;
70 explicit TailDuplicatePass(bool PreRA) :
71 MachineFunctionPass(&ID), PreRegAlloc(PreRA) {}
73 virtual bool runOnMachineFunction(MachineFunction &MF);
74 virtual const char *getPassName() const { return "Tail Duplication"; }
77 void AddSSAUpdateEntry(unsigned OrigReg, unsigned NewReg,
78 MachineBasicBlock *BB);
79 void ProcessPHI(MachineInstr *MI, MachineBasicBlock *TailBB,
80 MachineBasicBlock *PredBB,
81 DenseMap<unsigned, unsigned> &LocalVRMap,
82 SmallVector<std::pair<unsigned,unsigned>, 4> &Copies);
83 void DuplicateInstruction(MachineInstr *MI,
84 MachineBasicBlock *TailBB,
85 MachineBasicBlock *PredBB,
87 DenseMap<unsigned, unsigned> &LocalVRMap);
88 void UpdateSuccessorsPHIs(MachineBasicBlock *FromBB, bool isDead,
89 SmallVector<MachineBasicBlock*, 8> &TDBBs,
90 SmallSetVector<MachineBasicBlock*, 8> &Succs);
91 bool TailDuplicateBlocks(MachineFunction &MF);
92 bool TailDuplicate(MachineBasicBlock *TailBB, MachineFunction &MF,
93 SmallVector<MachineBasicBlock*, 8> &TDBBs);
94 void RemoveDeadBlock(MachineBasicBlock *MBB);
97 char TailDuplicatePass::ID = 0;
100 FunctionPass *llvm::createTailDuplicatePass(bool PreRegAlloc) {
101 return new TailDuplicatePass(PreRegAlloc);
104 bool TailDuplicatePass::runOnMachineFunction(MachineFunction &MF) {
105 TII = MF.getTarget().getInstrInfo();
106 MRI = &MF.getRegInfo();
107 MMI = getAnalysisIfAvailable<MachineModuleInfo>();
109 bool MadeChange = false;
110 bool MadeChangeThisIteration = true;
111 while (MadeChangeThisIteration) {
112 MadeChangeThisIteration = false;
113 MadeChangeThisIteration |= TailDuplicateBlocks(MF);
114 MadeChange |= MadeChangeThisIteration;
120 static void VerifyPHIs(MachineFunction &MF, bool CheckExtra) {
121 for (MachineFunction::iterator I = ++MF.begin(), E = MF.end(); I != E; ++I) {
122 MachineBasicBlock *MBB = I;
123 SmallSetVector<MachineBasicBlock*, 8> Preds(MBB->pred_begin(),
125 MachineBasicBlock::iterator MI = MBB->begin();
126 while (MI != MBB->end()) {
127 if (MI->getOpcode() != TargetInstrInfo::PHI)
129 for (SmallSetVector<MachineBasicBlock *, 8>::iterator PI = Preds.begin(),
130 PE = Preds.end(); PI != PE; ++PI) {
131 MachineBasicBlock *PredBB = *PI;
133 for (unsigned i = 1, e = MI->getNumOperands(); i != e; i += 2) {
134 MachineBasicBlock *PHIBB = MI->getOperand(i+1).getMBB();
135 if (PHIBB == PredBB) {
141 errs() << "Malformed PHI in BB#" << MBB->getNumber() << ": " << *MI;
142 errs() << " missing input from predecessor BB#"
143 << PredBB->getNumber() << '\n';
148 for (unsigned i = 1, e = MI->getNumOperands(); i != e; i += 2) {
149 MachineBasicBlock *PHIBB = MI->getOperand(i+1).getMBB();
150 if (CheckExtra && !Preds.count(PHIBB)) {
151 // This is not a hard error.
152 errs() << "Warning: malformed PHI in BB#" << MBB->getNumber()
154 errs() << " extra input from predecessor BB#"
155 << PHIBB->getNumber() << '\n';
157 if (PHIBB->getNumber() < 0) {
158 errs() << "Malformed PHI in BB#" << MBB->getNumber() << ": " << *MI;
159 errs() << " non-existing BB#" << PHIBB->getNumber() << '\n';
168 /// TailDuplicateBlocks - Look for small blocks that are unconditionally
169 /// branched to and do not fall through. Tail-duplicate their instructions
170 /// into their predecessors to eliminate (dynamic) branches.
171 bool TailDuplicatePass::TailDuplicateBlocks(MachineFunction &MF) {
172 bool MadeChange = false;
174 if (PreRegAlloc && TailDupVerify) {
175 DEBUG(errs() << "\n*** Before tail-duplicating\n");
176 VerifyPHIs(MF, true);
179 SmallVector<MachineInstr*, 8> NewPHIs;
180 MachineSSAUpdater SSAUpdate(MF, &NewPHIs);
182 for (MachineFunction::iterator I = ++MF.begin(), E = MF.end(); I != E; ) {
183 MachineBasicBlock *MBB = I++;
185 if (NumTails == TailDupLimit)
188 // Only duplicate blocks that end with unconditional branches.
189 if (MBB->canFallThrough())
192 // Save the successors list.
193 SmallSetVector<MachineBasicBlock*, 8> Succs(MBB->succ_begin(),
196 SmallVector<MachineBasicBlock*, 8> TDBBs;
197 if (TailDuplicate(MBB, MF, TDBBs)) {
200 // TailBB's immediate successors are now successors of those predecessors
201 // which duplicated TailBB. Add the predecessors as sources to the PHI
203 bool isDead = MBB->pred_empty();
205 UpdateSuccessorsPHIs(MBB, isDead, TDBBs, Succs);
207 // If it is dead, remove it.
209 NumInstrDups -= MBB->size();
210 RemoveDeadBlock(MBB);
215 if (!SSAUpdateVRs.empty()) {
216 for (unsigned i = 0, e = SSAUpdateVRs.size(); i != e; ++i) {
217 unsigned VReg = SSAUpdateVRs[i];
218 SSAUpdate.Initialize(VReg);
220 // If the original definition is still around, add it as an available
222 MachineInstr *DefMI = MRI->getVRegDef(VReg);
223 MachineBasicBlock *DefBB = 0;
225 DefBB = DefMI->getParent();
226 SSAUpdate.AddAvailableValue(DefBB, VReg);
229 // Add the new vregs as available values.
230 DenseMap<unsigned, AvailableValsTy>::iterator LI =
231 SSAUpdateVals.find(VReg);
232 for (unsigned j = 0, ee = LI->second.size(); j != ee; ++j) {
233 MachineBasicBlock *SrcBB = LI->second[j].first;
234 unsigned SrcReg = LI->second[j].second;
235 SSAUpdate.AddAvailableValue(SrcBB, SrcReg);
238 // Rewrite uses that are outside of the original def's block.
239 MachineRegisterInfo::use_iterator UI = MRI->use_begin(VReg);
240 while (UI != MRI->use_end()) {
241 MachineOperand &UseMO = UI.getOperand();
242 MachineInstr *UseMI = &*UI;
244 if (UseMI->getParent() == DefBB)
246 SSAUpdate.RewriteUse(UseMO);
250 SSAUpdateVRs.clear();
251 SSAUpdateVals.clear();
254 if (PreRegAlloc && TailDupVerify)
255 VerifyPHIs(MF, false);
263 static bool isDefLiveOut(unsigned Reg, MachineBasicBlock *BB,
264 const MachineRegisterInfo *MRI) {
265 for (MachineRegisterInfo::use_iterator UI = MRI->use_begin(Reg),
266 UE = MRI->use_end(); UI != UE; ++UI) {
267 MachineInstr *UseMI = &*UI;
268 if (UseMI->getParent() != BB)
274 static unsigned getPHISrcRegOpIdx(MachineInstr *MI, MachineBasicBlock *SrcBB) {
275 for (unsigned i = 1, e = MI->getNumOperands(); i != e; i += 2)
276 if (MI->getOperand(i+1).getMBB() == SrcBB)
281 /// AddSSAUpdateEntry - Add a definition and source virtual registers pair for
283 void TailDuplicatePass::AddSSAUpdateEntry(unsigned OrigReg, unsigned NewReg,
284 MachineBasicBlock *BB) {
285 DenseMap<unsigned, AvailableValsTy>::iterator LI= SSAUpdateVals.find(OrigReg);
286 if (LI != SSAUpdateVals.end())
287 LI->second.push_back(std::make_pair(BB, NewReg));
289 AvailableValsTy Vals;
290 Vals.push_back(std::make_pair(BB, NewReg));
291 SSAUpdateVals.insert(std::make_pair(OrigReg, Vals));
292 SSAUpdateVRs.push_back(OrigReg);
296 /// ProcessPHI - Process PHI node in TailBB by turning it into a copy in PredBB.
297 /// Remember the source register that's contributed by PredBB and update SSA
299 void TailDuplicatePass::ProcessPHI(MachineInstr *MI,
300 MachineBasicBlock *TailBB,
301 MachineBasicBlock *PredBB,
302 DenseMap<unsigned, unsigned> &LocalVRMap,
303 SmallVector<std::pair<unsigned,unsigned>, 4> &Copies) {
304 unsigned DefReg = MI->getOperand(0).getReg();
305 unsigned SrcOpIdx = getPHISrcRegOpIdx(MI, PredBB);
306 assert(SrcOpIdx && "Unable to find matching PHI source?");
307 unsigned SrcReg = MI->getOperand(SrcOpIdx).getReg();
308 const TargetRegisterClass *RC = MRI->getRegClass(DefReg);
309 LocalVRMap.insert(std::make_pair(DefReg, SrcReg));
311 // Insert a copy from source to the end of the block. The def register is the
312 // available value liveout of the block.
313 unsigned NewDef = MRI->createVirtualRegister(RC);
314 Copies.push_back(std::make_pair(NewDef, SrcReg));
315 if (isDefLiveOut(DefReg, TailBB, MRI))
316 AddSSAUpdateEntry(DefReg, NewDef, PredBB);
318 // Remove PredBB from the PHI node.
319 MI->RemoveOperand(SrcOpIdx+1);
320 MI->RemoveOperand(SrcOpIdx);
321 if (MI->getNumOperands() == 1)
322 MI->eraseFromParent();
325 /// DuplicateInstruction - Duplicate a TailBB instruction to PredBB and update
326 /// the source operands due to earlier PHI translation.
327 void TailDuplicatePass::DuplicateInstruction(MachineInstr *MI,
328 MachineBasicBlock *TailBB,
329 MachineBasicBlock *PredBB,
331 DenseMap<unsigned, unsigned> &LocalVRMap) {
332 MachineInstr *NewMI = MF.CloneMachineInstr(MI);
333 for (unsigned i = 0, e = NewMI->getNumOperands(); i != e; ++i) {
334 MachineOperand &MO = NewMI->getOperand(i);
337 unsigned Reg = MO.getReg();
338 if (!Reg || TargetRegisterInfo::isPhysicalRegister(Reg))
341 const TargetRegisterClass *RC = MRI->getRegClass(Reg);
342 unsigned NewReg = MRI->createVirtualRegister(RC);
344 LocalVRMap.insert(std::make_pair(Reg, NewReg));
345 if (isDefLiveOut(Reg, TailBB, MRI))
346 AddSSAUpdateEntry(Reg, NewReg, PredBB);
348 DenseMap<unsigned, unsigned>::iterator VI = LocalVRMap.find(Reg);
349 if (VI != LocalVRMap.end())
350 MO.setReg(VI->second);
353 PredBB->insert(PredBB->end(), NewMI);
356 /// UpdateSuccessorsPHIs - After FromBB is tail duplicated into its predecessor
357 /// blocks, the successors have gained new predecessors. Update the PHI
358 /// instructions in them accordingly.
360 TailDuplicatePass::UpdateSuccessorsPHIs(MachineBasicBlock *FromBB, bool isDead,
361 SmallVector<MachineBasicBlock*, 8> &TDBBs,
362 SmallSetVector<MachineBasicBlock*,8> &Succs) {
363 for (SmallSetVector<MachineBasicBlock*, 8>::iterator SI = Succs.begin(),
364 SE = Succs.end(); SI != SE; ++SI) {
365 MachineBasicBlock *SuccBB = *SI;
366 for (MachineBasicBlock::iterator II = SuccBB->begin(), EE = SuccBB->end();
368 if (II->getOpcode() != TargetInstrInfo::PHI)
371 for (unsigned i = 1, e = II->getNumOperands(); i != e; i += 2) {
372 MachineOperand &MO = II->getOperand(i+1);
373 if (MO.getMBB() == FromBB) {
380 MachineOperand &MO0 = II->getOperand(Idx);
381 unsigned Reg = MO0.getReg();
383 // Folded into the previous BB.
384 // There could be duplicate phi source entries. FIXME: Should sdisel
385 // or earlier pass fixed this?
386 for (unsigned i = II->getNumOperands()-2; i != Idx; i -= 2) {
387 MachineOperand &MO = II->getOperand(i+1);
388 if (MO.getMBB() == FromBB) {
389 II->RemoveOperand(i+1);
390 II->RemoveOperand(i);
393 II->RemoveOperand(Idx+1);
394 II->RemoveOperand(Idx);
396 DenseMap<unsigned,AvailableValsTy>::iterator LI=SSAUpdateVals.find(Reg);
397 if (LI != SSAUpdateVals.end()) {
398 // This register is defined in the tail block.
399 for (unsigned j = 0, ee = LI->second.size(); j != ee; ++j) {
400 MachineBasicBlock *SrcBB = LI->second[j].first;
401 unsigned SrcReg = LI->second[j].second;
402 II->addOperand(MachineOperand::CreateReg(SrcReg, false));
403 II->addOperand(MachineOperand::CreateMBB(SrcBB));
406 // Live in tail block, must also be live in predecessors.
407 for (unsigned j = 0, ee = TDBBs.size(); j != ee; ++j) {
408 MachineBasicBlock *SrcBB = TDBBs[j];
409 II->addOperand(MachineOperand::CreateReg(Reg, false));
410 II->addOperand(MachineOperand::CreateMBB(SrcBB));
417 /// TailDuplicate - If it is profitable, duplicate TailBB's contents in each
418 /// of its predecessors.
420 TailDuplicatePass::TailDuplicate(MachineBasicBlock *TailBB, MachineFunction &MF,
421 SmallVector<MachineBasicBlock*, 8> &TDBBs) {
422 // Don't try to tail-duplicate single-block loops.
423 if (TailBB->isSuccessor(TailBB))
426 // Set the limit on the number of instructions to duplicate, with a default
427 // of one less than the tail-merge threshold. When optimizing for size,
428 // duplicate only one, because one branch instruction can be eliminated to
429 // compensate for the duplication.
430 unsigned MaxDuplicateCount;
431 if (!TailBB->empty() && TailBB->back().getDesc().isIndirectBranch())
432 // If the target has hardware branch prediction that can handle indirect
433 // branches, duplicating them can often make them predictable when there
434 // are common paths through the code. The limit needs to be high enough
435 // to allow undoing the effects of tail merging.
436 MaxDuplicateCount = 20;
437 else if (MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize))
438 MaxDuplicateCount = 1;
440 MaxDuplicateCount = TailDuplicateSize;
442 // Check the instructions in the block to determine whether tail-duplication
443 // is invalid or unlikely to be profitable.
444 unsigned InstrCount = 0;
445 bool HasCall = false;
446 for (MachineBasicBlock::iterator I = TailBB->begin();
447 I != TailBB->end(); ++I) {
448 // Non-duplicable things shouldn't be tail-duplicated.
449 if (I->getDesc().isNotDuplicable()) return false;
450 // Do not duplicate 'return' instructions if this is a pre-regalloc run.
451 // A return may expand into a lot more instructions (e.g. reload of callee
452 // saved registers) after PEI.
453 if (PreRegAlloc && I->getDesc().isReturn()) return false;
454 // Don't duplicate more than the threshold.
455 if (InstrCount == MaxDuplicateCount) return false;
456 // Remember if we saw a call.
457 if (I->getDesc().isCall()) HasCall = true;
458 if (I->getOpcode() != TargetInstrInfo::PHI)
461 // Heuristically, don't tail-duplicate calls if it would expand code size,
462 // as it's less likely to be worth the extra cost.
463 if (InstrCount > 1 && HasCall)
466 DEBUG(errs() << "\n*** Tail-duplicating BB#" << TailBB->getNumber() << '\n');
468 // Iterate through all the unique predecessors and tail-duplicate this
469 // block into them, if possible. Copying the list ahead of time also
470 // avoids trouble with the predecessor list reallocating.
471 bool Changed = false;
472 SmallSetVector<MachineBasicBlock*, 8> Preds(TailBB->pred_begin(),
474 for (SmallSetVector<MachineBasicBlock *, 8>::iterator PI = Preds.begin(),
475 PE = Preds.end(); PI != PE; ++PI) {
476 MachineBasicBlock *PredBB = *PI;
478 assert(TailBB != PredBB &&
479 "Single-block loop should have been rejected earlier!");
480 if (PredBB->succ_size() > 1) continue;
482 MachineBasicBlock *PredTBB, *PredFBB;
483 SmallVector<MachineOperand, 4> PredCond;
484 if (TII->AnalyzeBranch(*PredBB, PredTBB, PredFBB, PredCond, true))
486 if (!PredCond.empty())
488 // EH edges are ignored by AnalyzeBranch.
489 if (PredBB->succ_size() != 1)
491 // Don't duplicate into a fall-through predecessor (at least for now).
492 if (PredBB->isLayoutSuccessor(TailBB) && PredBB->canFallThrough())
495 DEBUG(errs() << "\nTail-duplicating into PredBB: " << *PredBB
496 << "From Succ: " << *TailBB);
498 TDBBs.push_back(PredBB);
500 // Remove PredBB's unconditional branch.
501 TII->RemoveBranch(*PredBB);
503 // Clone the contents of TailBB into PredBB.
504 DenseMap<unsigned, unsigned> LocalVRMap;
505 SmallVector<std::pair<unsigned,unsigned>, 4> Copies;
506 MachineBasicBlock::iterator I = TailBB->begin();
507 while (I != TailBB->end()) {
508 MachineInstr *MI = &*I;
510 if (MI->getOpcode() == TargetInstrInfo::PHI) {
511 // Replace the uses of the def of the PHI with the register coming
513 ProcessPHI(MI, TailBB, PredBB, LocalVRMap, Copies);
515 // Replace def of virtual registers with new registers, and update
516 // uses with PHI source register or the new registers.
517 DuplicateInstruction(MI, TailBB, PredBB, MF, LocalVRMap);
520 MachineBasicBlock::iterator Loc = PredBB->getFirstTerminator();
521 for (unsigned i = 0, e = Copies.size(); i != e; ++i) {
522 const TargetRegisterClass *RC = MRI->getRegClass(Copies[i].first);
523 TII->copyRegToReg(*PredBB, Loc, Copies[i].first, Copies[i].second, RC, RC);
525 NumInstrDups += TailBB->size() - 1; // subtract one for removed branch
528 PredBB->removeSuccessor(PredBB->succ_begin());
529 assert(PredBB->succ_empty() &&
530 "TailDuplicate called on block with multiple successors!");
531 for (MachineBasicBlock::succ_iterator I = TailBB->succ_begin(),
532 E = TailBB->succ_end(); I != E; ++I)
533 PredBB->addSuccessor(*I);
539 // If TailBB was duplicated into all its predecessors except for the prior
540 // block, which falls through unconditionally, move the contents of this
541 // block into the prior block.
542 MachineBasicBlock *PrevBB = prior(MachineFunction::iterator(TailBB));
543 MachineBasicBlock *PriorTBB = 0, *PriorFBB = 0;
544 SmallVector<MachineOperand, 4> PriorCond;
545 bool PriorUnAnalyzable =
546 TII->AnalyzeBranch(*PrevBB, PriorTBB, PriorFBB, PriorCond, true);
547 // This has to check PrevBB->succ_size() because EH edges are ignored by
549 if (!PriorUnAnalyzable && PriorCond.empty() && !PriorTBB &&
550 TailBB->pred_size() == 1 && PrevBB->succ_size() == 1 &&
551 !TailBB->hasAddressTaken()) {
552 DEBUG(errs() << "\nMerging into block: " << *PrevBB
553 << "From MBB: " << *TailBB);
555 DenseMap<unsigned, unsigned> LocalVRMap;
556 SmallVector<std::pair<unsigned,unsigned>, 4> Copies;
557 MachineBasicBlock::iterator I = TailBB->begin();
558 // Process PHI instructions first.
559 while (I != TailBB->end() && I->getOpcode() == TargetInstrInfo::PHI) {
560 // Replace the uses of the def of the PHI with the register coming
562 MachineInstr *MI = &*I++;
563 ProcessPHI(MI, TailBB, PrevBB, LocalVRMap, Copies);
565 MI->eraseFromParent();
568 // Now copy the non-PHI instructions.
569 while (I != TailBB->end()) {
570 // Replace def of virtual registers with new registers, and update
571 // uses with PHI source register or the new registers.
572 MachineInstr *MI = &*I++;
573 DuplicateInstruction(MI, TailBB, PrevBB, MF, LocalVRMap);
574 MI->eraseFromParent();
576 MachineBasicBlock::iterator Loc = PrevBB->getFirstTerminator();
577 for (unsigned i = 0, e = Copies.size(); i != e; ++i) {
578 const TargetRegisterClass *RC = MRI->getRegClass(Copies[i].first);
579 TII->copyRegToReg(*PrevBB, Loc, Copies[i].first, Copies[i].second, RC, RC);
582 // No PHIs to worry about, just splice the instructions over.
583 PrevBB->splice(PrevBB->end(), TailBB, TailBB->begin(), TailBB->end());
585 PrevBB->removeSuccessor(PrevBB->succ_begin());
586 assert(PrevBB->succ_empty());
587 PrevBB->transferSuccessors(TailBB);
588 TDBBs.push_back(PrevBB);
595 /// RemoveDeadBlock - Remove the specified dead machine basic block from the
596 /// function, updating the CFG.
597 void TailDuplicatePass::RemoveDeadBlock(MachineBasicBlock *MBB) {
598 assert(MBB->pred_empty() && "MBB must be dead!");
599 DEBUG(errs() << "\nRemoving MBB: " << *MBB);
601 // Remove all successors.
602 while (!MBB->succ_empty())
603 MBB->removeSuccessor(MBB->succ_end()-1);
605 // If there are any labels in the basic block, unregister them from
606 // MachineModuleInfo.
607 if (MMI && !MBB->empty()) {
608 for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end();
611 // The label ID # is always operand #0, an immediate.
612 MMI->InvalidateLabel(I->getOperand(0).getImm());
617 MBB->eraseFromParent();