1 //===-- TailDuplication.cpp - Duplicate blocks into predecessors' tails ---===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This pass duplicates basic blocks ending in unconditional branches into
11 // the tails of their predecessors.
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "tailduplication"
16 #include "llvm/Function.h"
17 #include "llvm/CodeGen/Passes.h"
18 #include "llvm/CodeGen/MachineModuleInfo.h"
19 #include "llvm/CodeGen/MachineFunctionPass.h"
20 #include "llvm/CodeGen/MachineInstrBuilder.h"
21 #include "llvm/CodeGen/MachineRegisterInfo.h"
22 #include "llvm/CodeGen/MachineSSAUpdater.h"
23 #include "llvm/Target/TargetInstrInfo.h"
24 #include "llvm/Support/CommandLine.h"
25 #include "llvm/Support/Debug.h"
26 #include "llvm/Support/ErrorHandling.h"
27 #include "llvm/Support/raw_ostream.h"
28 #include "llvm/ADT/SmallSet.h"
29 #include "llvm/ADT/SetVector.h"
30 #include "llvm/ADT/Statistic.h"
33 STATISTIC(NumTails , "Number of tails duplicated");
34 STATISTIC(NumTailDups , "Number of tail duplicated blocks");
35 STATISTIC(NumInstrDups , "Additional instructions due to tail duplication");
36 STATISTIC(NumDeadBlocks, "Number of dead blocks removed");
37 STATISTIC(NumAddedPHIs , "Number of phis added");
39 // Heuristic for tail duplication.
40 static cl::opt<unsigned>
41 TailDuplicateSize("tail-dup-size",
42 cl::desc("Maximum instructions to consider tail duplicating"),
43 cl::init(2), cl::Hidden);
46 TailDupVerify("tail-dup-verify",
47 cl::desc("Verify sanity of PHI instructions during taildup"),
48 cl::init(false), cl::Hidden);
50 static cl::opt<unsigned>
51 TailDupLimit("tail-dup-limit", cl::init(~0U), cl::Hidden);
53 typedef std::vector<std::pair<MachineBasicBlock*,unsigned> > AvailableValsTy;
56 /// TailDuplicatePass - Perform tail duplication.
57 class TailDuplicatePass : public MachineFunctionPass {
59 const TargetInstrInfo *TII;
60 MachineModuleInfo *MMI;
61 MachineRegisterInfo *MRI;
63 // SSAUpdateVRs - A list of virtual registers for which to update SSA form.
64 SmallVector<unsigned, 16> SSAUpdateVRs;
66 // SSAUpdateVals - For each virtual register in SSAUpdateVals keep a list of
67 // source virtual registers.
68 DenseMap<unsigned, AvailableValsTy> SSAUpdateVals;
72 explicit TailDuplicatePass(bool PreRA) :
73 MachineFunctionPass(ID), PreRegAlloc(PreRA) {}
75 virtual bool runOnMachineFunction(MachineFunction &MF);
76 virtual const char *getPassName() const { return "Tail Duplication"; }
79 void AddSSAUpdateEntry(unsigned OrigReg, unsigned NewReg,
80 MachineBasicBlock *BB);
81 void ProcessPHI(MachineInstr *MI, MachineBasicBlock *TailBB,
82 MachineBasicBlock *PredBB,
83 DenseMap<unsigned, unsigned> &LocalVRMap,
84 SmallVector<std::pair<unsigned,unsigned>, 4> &Copies,
85 const DenseSet<unsigned> &UsedByPhi,
87 void DuplicateInstruction(MachineInstr *MI,
88 MachineBasicBlock *TailBB,
89 MachineBasicBlock *PredBB,
91 DenseMap<unsigned, unsigned> &LocalVRMap,
92 const DenseSet<unsigned> &UsedByPhi);
93 void UpdateSuccessorsPHIs(MachineBasicBlock *FromBB, bool isDead,
94 SmallVector<MachineBasicBlock*, 8> &TDBBs,
95 SmallSetVector<MachineBasicBlock*, 8> &Succs);
96 bool TailDuplicateBlocks(MachineFunction &MF);
97 bool shouldTailDuplicate(const MachineFunction &MF,
98 bool IsSimple, MachineBasicBlock &TailBB);
99 bool isSimpleBB(MachineBasicBlock *TailBB);
100 bool canCompletelyDuplicateBB(MachineBasicBlock &BB, bool IsSimple);
101 void duplicateSimpleBB(MachineBasicBlock *TailBB,
102 SmallVector<MachineBasicBlock*, 8> &TDBBs,
103 const DenseSet<unsigned> &RegsUsedByPhi,
104 SmallVector<MachineInstr*, 16> &Copies);
105 bool TailDuplicate(MachineBasicBlock *TailBB, MachineFunction &MF,
106 SmallVector<MachineBasicBlock*, 8> &TDBBs,
107 SmallVector<MachineInstr*, 16> &Copies);
108 void RemoveDeadBlock(MachineBasicBlock *MBB);
111 char TailDuplicatePass::ID = 0;
114 FunctionPass *llvm::createTailDuplicatePass(bool PreRegAlloc) {
115 return new TailDuplicatePass(PreRegAlloc);
118 bool TailDuplicatePass::runOnMachineFunction(MachineFunction &MF) {
119 TII = MF.getTarget().getInstrInfo();
120 MRI = &MF.getRegInfo();
121 MMI = getAnalysisIfAvailable<MachineModuleInfo>();
123 bool MadeChange = false;
124 while (TailDuplicateBlocks(MF))
130 static void VerifyPHIs(MachineFunction &MF, bool CheckExtra) {
131 for (MachineFunction::iterator I = ++MF.begin(), E = MF.end(); I != E; ++I) {
132 MachineBasicBlock *MBB = I;
133 SmallSetVector<MachineBasicBlock*, 8> Preds(MBB->pred_begin(),
135 MachineBasicBlock::iterator MI = MBB->begin();
136 while (MI != MBB->end()) {
139 for (SmallSetVector<MachineBasicBlock *, 8>::iterator PI = Preds.begin(),
140 PE = Preds.end(); PI != PE; ++PI) {
141 MachineBasicBlock *PredBB = *PI;
143 for (unsigned i = 1, e = MI->getNumOperands(); i != e; i += 2) {
144 MachineBasicBlock *PHIBB = MI->getOperand(i+1).getMBB();
145 if (PHIBB == PredBB) {
151 dbgs() << "Malformed PHI in BB#" << MBB->getNumber() << ": " << *MI;
152 dbgs() << " missing input from predecessor BB#"
153 << PredBB->getNumber() << '\n';
158 for (unsigned i = 1, e = MI->getNumOperands(); i != e; i += 2) {
159 MachineBasicBlock *PHIBB = MI->getOperand(i+1).getMBB();
160 if (CheckExtra && !Preds.count(PHIBB)) {
161 dbgs() << "Warning: malformed PHI in BB#" << MBB->getNumber()
163 dbgs() << " extra input from predecessor BB#"
164 << PHIBB->getNumber() << '\n';
167 if (PHIBB->getNumber() < 0) {
168 dbgs() << "Malformed PHI in BB#" << MBB->getNumber() << ": " << *MI;
169 dbgs() << " non-existing BB#" << PHIBB->getNumber() << '\n';
178 /// TailDuplicateBlocks - Look for small blocks that are unconditionally
179 /// branched to and do not fall through. Tail-duplicate their instructions
180 /// into their predecessors to eliminate (dynamic) branches.
181 bool TailDuplicatePass::TailDuplicateBlocks(MachineFunction &MF) {
182 bool MadeChange = false;
184 if (PreRegAlloc && TailDupVerify) {
185 DEBUG(dbgs() << "\n*** Before tail-duplicating\n");
186 VerifyPHIs(MF, true);
189 SmallVector<MachineInstr*, 8> NewPHIs;
190 MachineSSAUpdater SSAUpdate(MF, &NewPHIs);
192 for (MachineFunction::iterator I = ++MF.begin(), E = MF.end(); I != E; ) {
193 MachineBasicBlock *MBB = I++;
195 if (NumTails == TailDupLimit)
198 // Save the successors list.
199 SmallSetVector<MachineBasicBlock*, 8> Succs(MBB->succ_begin(),
202 SmallVector<MachineBasicBlock*, 8> TDBBs;
203 SmallVector<MachineInstr*, 16> Copies;
204 if (TailDuplicate(MBB, MF, TDBBs, Copies)) {
207 // TailBB's immediate successors are now successors of those predecessors
208 // which duplicated TailBB. Add the predecessors as sources to the PHI
210 bool isDead = MBB->pred_empty() && !MBB->hasAddressTaken();
212 UpdateSuccessorsPHIs(MBB, isDead, TDBBs, Succs);
214 // If it is dead, remove it.
216 NumInstrDups -= MBB->size();
217 RemoveDeadBlock(MBB);
222 if (!SSAUpdateVRs.empty()) {
223 for (unsigned i = 0, e = SSAUpdateVRs.size(); i != e; ++i) {
224 unsigned VReg = SSAUpdateVRs[i];
225 SSAUpdate.Initialize(VReg);
227 // If the original definition is still around, add it as an available
229 MachineInstr *DefMI = MRI->getVRegDef(VReg);
230 MachineBasicBlock *DefBB = 0;
232 DefBB = DefMI->getParent();
233 SSAUpdate.AddAvailableValue(DefBB, VReg);
236 // Add the new vregs as available values.
237 DenseMap<unsigned, AvailableValsTy>::iterator LI =
238 SSAUpdateVals.find(VReg);
239 for (unsigned j = 0, ee = LI->second.size(); j != ee; ++j) {
240 MachineBasicBlock *SrcBB = LI->second[j].first;
241 unsigned SrcReg = LI->second[j].second;
242 SSAUpdate.AddAvailableValue(SrcBB, SrcReg);
245 // Rewrite uses that are outside of the original def's block.
246 MachineRegisterInfo::use_iterator UI = MRI->use_begin(VReg);
247 while (UI != MRI->use_end()) {
248 MachineOperand &UseMO = UI.getOperand();
249 MachineInstr *UseMI = &*UI;
251 if (UseMI->isDebugValue()) {
252 // SSAUpdate can replace the use with an undef. That creates
253 // a debug instruction that is a kill.
254 // FIXME: Should it SSAUpdate job to delete debug instructions
255 // instead of replacing the use with undef?
256 UseMI->eraseFromParent();
259 if (UseMI->getParent() == DefBB && !UseMI->isPHI())
261 SSAUpdate.RewriteUse(UseMO);
265 SSAUpdateVRs.clear();
266 SSAUpdateVals.clear();
269 // Eliminate some of the copies inserted by tail duplication to maintain
271 for (unsigned i = 0, e = Copies.size(); i != e; ++i) {
272 MachineInstr *Copy = Copies[i];
275 unsigned Dst = Copy->getOperand(0).getReg();
276 unsigned Src = Copy->getOperand(1).getReg();
277 MachineRegisterInfo::use_iterator UI = MRI->use_begin(Src);
278 if (++UI == MRI->use_end()) {
279 // Copy is the only use. Do trivial copy propagation here.
280 MRI->replaceRegWith(Dst, Src);
281 Copy->eraseFromParent();
285 if (PreRegAlloc && TailDupVerify)
286 VerifyPHIs(MF, false);
290 NumAddedPHIs += NewPHIs.size();
295 static bool isDefLiveOut(unsigned Reg, MachineBasicBlock *BB,
296 const MachineRegisterInfo *MRI) {
297 for (MachineRegisterInfo::use_iterator UI = MRI->use_begin(Reg),
298 UE = MRI->use_end(); UI != UE; ++UI) {
299 MachineInstr *UseMI = &*UI;
300 if (UseMI->isDebugValue())
302 if (UseMI->getParent() != BB)
308 static unsigned getPHISrcRegOpIdx(MachineInstr *MI, MachineBasicBlock *SrcBB) {
309 for (unsigned i = 1, e = MI->getNumOperands(); i != e; i += 2)
310 if (MI->getOperand(i+1).getMBB() == SrcBB)
316 // Remember which registers are used by phis in this block. This is
317 // used to determine which registers are liveout while modifying the
318 // block (which is why we need to copy the information).
319 static void getRegsUsedByPHIs(const MachineBasicBlock &BB,
320 DenseSet<unsigned> *UsedByPhi) {
321 for(MachineBasicBlock::const_iterator I = BB.begin(), E = BB.end();
323 const MachineInstr &MI = *I;
326 for (unsigned i = 1, e = MI.getNumOperands(); i != e; i += 2) {
327 unsigned SrcReg = MI.getOperand(i).getReg();
328 UsedByPhi->insert(SrcReg);
333 /// AddSSAUpdateEntry - Add a definition and source virtual registers pair for
335 void TailDuplicatePass::AddSSAUpdateEntry(unsigned OrigReg, unsigned NewReg,
336 MachineBasicBlock *BB) {
337 DenseMap<unsigned, AvailableValsTy>::iterator LI= SSAUpdateVals.find(OrigReg);
338 if (LI != SSAUpdateVals.end())
339 LI->second.push_back(std::make_pair(BB, NewReg));
341 AvailableValsTy Vals;
342 Vals.push_back(std::make_pair(BB, NewReg));
343 SSAUpdateVals.insert(std::make_pair(OrigReg, Vals));
344 SSAUpdateVRs.push_back(OrigReg);
348 /// ProcessPHI - Process PHI node in TailBB by turning it into a copy in PredBB.
349 /// Remember the source register that's contributed by PredBB and update SSA
351 void TailDuplicatePass::ProcessPHI(MachineInstr *MI,
352 MachineBasicBlock *TailBB,
353 MachineBasicBlock *PredBB,
354 DenseMap<unsigned, unsigned> &LocalVRMap,
355 SmallVector<std::pair<unsigned,unsigned>, 4> &Copies,
356 const DenseSet<unsigned> &RegsUsedByPhi,
358 unsigned DefReg = MI->getOperand(0).getReg();
359 unsigned SrcOpIdx = getPHISrcRegOpIdx(MI, PredBB);
360 assert(SrcOpIdx && "Unable to find matching PHI source?");
361 unsigned SrcReg = MI->getOperand(SrcOpIdx).getReg();
362 const TargetRegisterClass *RC = MRI->getRegClass(DefReg);
363 LocalVRMap.insert(std::make_pair(DefReg, SrcReg));
365 // Insert a copy from source to the end of the block. The def register is the
366 // available value liveout of the block.
367 unsigned NewDef = MRI->createVirtualRegister(RC);
368 Copies.push_back(std::make_pair(NewDef, SrcReg));
369 if (isDefLiveOut(DefReg, TailBB, MRI) || RegsUsedByPhi.count(DefReg))
370 AddSSAUpdateEntry(DefReg, NewDef, PredBB);
375 // Remove PredBB from the PHI node.
376 MI->RemoveOperand(SrcOpIdx+1);
377 MI->RemoveOperand(SrcOpIdx);
378 if (MI->getNumOperands() == 1)
379 MI->eraseFromParent();
382 /// DuplicateInstruction - Duplicate a TailBB instruction to PredBB and update
383 /// the source operands due to earlier PHI translation.
384 void TailDuplicatePass::DuplicateInstruction(MachineInstr *MI,
385 MachineBasicBlock *TailBB,
386 MachineBasicBlock *PredBB,
388 DenseMap<unsigned, unsigned> &LocalVRMap,
389 const DenseSet<unsigned> &UsedByPhi) {
390 MachineInstr *NewMI = TII->duplicate(MI, MF);
391 for (unsigned i = 0, e = NewMI->getNumOperands(); i != e; ++i) {
392 MachineOperand &MO = NewMI->getOperand(i);
395 unsigned Reg = MO.getReg();
396 if (!TargetRegisterInfo::isVirtualRegister(Reg))
399 const TargetRegisterClass *RC = MRI->getRegClass(Reg);
400 unsigned NewReg = MRI->createVirtualRegister(RC);
402 LocalVRMap.insert(std::make_pair(Reg, NewReg));
403 if (isDefLiveOut(Reg, TailBB, MRI) || UsedByPhi.count(Reg))
404 AddSSAUpdateEntry(Reg, NewReg, PredBB);
406 DenseMap<unsigned, unsigned>::iterator VI = LocalVRMap.find(Reg);
407 if (VI != LocalVRMap.end())
408 MO.setReg(VI->second);
411 PredBB->insert(PredBB->end(), NewMI);
414 /// UpdateSuccessorsPHIs - After FromBB is tail duplicated into its predecessor
415 /// blocks, the successors have gained new predecessors. Update the PHI
416 /// instructions in them accordingly.
418 TailDuplicatePass::UpdateSuccessorsPHIs(MachineBasicBlock *FromBB, bool isDead,
419 SmallVector<MachineBasicBlock*, 8> &TDBBs,
420 SmallSetVector<MachineBasicBlock*,8> &Succs) {
421 for (SmallSetVector<MachineBasicBlock*, 8>::iterator SI = Succs.begin(),
422 SE = Succs.end(); SI != SE; ++SI) {
423 MachineBasicBlock *SuccBB = *SI;
424 for (MachineBasicBlock::iterator II = SuccBB->begin(), EE = SuccBB->end();
429 for (unsigned i = 1, e = II->getNumOperands(); i != e; i += 2) {
430 MachineOperand &MO = II->getOperand(i+1);
431 if (MO.getMBB() == FromBB) {
438 MachineOperand &MO0 = II->getOperand(Idx);
439 unsigned Reg = MO0.getReg();
441 // Folded into the previous BB.
442 // There could be duplicate phi source entries. FIXME: Should sdisel
443 // or earlier pass fixed this?
444 for (unsigned i = II->getNumOperands()-2; i != Idx; i -= 2) {
445 MachineOperand &MO = II->getOperand(i+1);
446 if (MO.getMBB() == FromBB) {
447 II->RemoveOperand(i+1);
448 II->RemoveOperand(i);
454 // If Idx is set, the operands at Idx and Idx+1 must be removed.
455 // We reuse the location to avoid expensive RemoveOperand calls.
457 DenseMap<unsigned,AvailableValsTy>::iterator LI=SSAUpdateVals.find(Reg);
458 if (LI != SSAUpdateVals.end()) {
459 // This register is defined in the tail block.
460 for (unsigned j = 0, ee = LI->second.size(); j != ee; ++j) {
461 MachineBasicBlock *SrcBB = LI->second[j].first;
462 // If we didn't duplicate a bb into a particular predecessor, we
463 // might still have added an entry to SSAUpdateVals to correcly
464 // recompute SSA. If that case, avoid adding a dummy extra argument
466 if (!SrcBB->isSuccessor(SuccBB))
469 unsigned SrcReg = LI->second[j].second;
471 II->getOperand(Idx).setReg(SrcReg);
472 II->getOperand(Idx+1).setMBB(SrcBB);
475 II->addOperand(MachineOperand::CreateReg(SrcReg, false));
476 II->addOperand(MachineOperand::CreateMBB(SrcBB));
480 // Live in tail block, must also be live in predecessors.
481 for (unsigned j = 0, ee = TDBBs.size(); j != ee; ++j) {
482 MachineBasicBlock *SrcBB = TDBBs[j];
484 II->getOperand(Idx).setReg(Reg);
485 II->getOperand(Idx+1).setMBB(SrcBB);
488 II->addOperand(MachineOperand::CreateReg(Reg, false));
489 II->addOperand(MachineOperand::CreateMBB(SrcBB));
494 II->RemoveOperand(Idx+1);
495 II->RemoveOperand(Idx);
501 /// shouldTailDuplicate - Determine if it is profitable to duplicate this block.
503 TailDuplicatePass::shouldTailDuplicate(const MachineFunction &MF,
505 MachineBasicBlock &TailBB) {
506 // Only duplicate blocks that end with unconditional branches.
507 if (TailBB.canFallThrough())
510 // Don't try to tail-duplicate single-block loops.
511 if (TailBB.isSuccessor(&TailBB))
514 // Set the limit on the cost to duplicate. When optimizing for size,
515 // duplicate only one, because one branch instruction can be eliminated to
516 // compensate for the duplication.
517 unsigned MaxDuplicateCount;
518 if (TailDuplicateSize.getNumOccurrences() == 0 &&
519 MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize))
520 MaxDuplicateCount = 1;
522 MaxDuplicateCount = TailDuplicateSize;
524 // If the target has hardware branch prediction that can handle indirect
525 // branches, duplicating them can often make them predictable when there
526 // are common paths through the code. The limit needs to be high enough
527 // to allow undoing the effects of tail merging and other optimizations
528 // that rearrange the predecessors of the indirect branch.
530 bool hasIndirectBR = false;
531 if (PreRegAlloc && !TailBB.empty()) {
532 const TargetInstrDesc &TID = TailBB.back().getDesc();
533 if (TID.isIndirectBranch()) {
534 MaxDuplicateCount = 20;
535 hasIndirectBR = true;
539 // Check the instructions in the block to determine whether tail-duplication
540 // is invalid or unlikely to be profitable.
541 unsigned InstrCount = 0;
542 for (MachineBasicBlock::const_iterator I = TailBB.begin(); I != TailBB.end();
544 // Non-duplicable things shouldn't be tail-duplicated.
545 if (I->getDesc().isNotDuplicable())
548 // Do not duplicate 'return' instructions if this is a pre-regalloc run.
549 // A return may expand into a lot more instructions (e.g. reload of callee
550 // saved registers) after PEI.
551 if (PreRegAlloc && I->getDesc().isReturn())
554 // Avoid duplicating calls before register allocation. Calls presents a
555 // barrier to register allocation so duplicating them may end up increasing
557 if (PreRegAlloc && I->getDesc().isCall())
560 if (!I->isPHI() && !I->isDebugValue())
563 if (InstrCount > MaxDuplicateCount)
571 return canCompletelyDuplicateBB(TailBB, IsSimple);
576 return canCompletelyDuplicateBB(TailBB, IsSimple);
579 /// isSimpleBB - True if this BB has only one unconditional jump.
581 TailDuplicatePass::isSimpleBB(MachineBasicBlock *TailBB) {
582 if (TailBB->succ_size() != 1)
584 if (TailBB->pred_empty())
586 MachineBasicBlock::iterator I = TailBB->begin();
587 MachineBasicBlock::iterator E = TailBB->end();
588 while (I != E && I->isDebugValue())
592 return I->getDesc().isUnconditionalBranch();
596 bothUsedInPHI(const MachineBasicBlock &A,
597 SmallPtrSet<MachineBasicBlock*, 8> SuccsB) {
598 for (MachineBasicBlock::const_succ_iterator SI = A.succ_begin(),
599 SE = A.succ_end(); SI != SE; ++SI) {
600 MachineBasicBlock *BB = *SI;
601 if (SuccsB.count(BB) && !BB->empty() && BB->begin()->isPHI())
609 TailDuplicatePass::canCompletelyDuplicateBB(MachineBasicBlock &BB,
611 SmallPtrSet<MachineBasicBlock*, 8> Succs(BB.succ_begin(), BB.succ_end());
613 for (MachineBasicBlock::pred_iterator PI = BB.pred_begin(),
614 PE = BB.pred_end(); PI != PE; ++PI) {
615 MachineBasicBlock *PredBB = *PI;
618 if (PredBB->getLandingPadSuccessor())
620 if (bothUsedInPHI(*PredBB, Succs))
623 if (PredBB->succ_size() > 1)
627 MachineBasicBlock *PredTBB = NULL, *PredFBB = NULL;
628 SmallVector<MachineOperand, 4> PredCond;
629 if (TII->AnalyzeBranch(*PredBB, PredTBB, PredFBB, PredCond, true))
632 if (!isSimple && !PredCond.empty())
639 TailDuplicatePass::duplicateSimpleBB(MachineBasicBlock *TailBB,
640 SmallVector<MachineBasicBlock*, 8> &TDBBs,
641 const DenseSet<unsigned> &UsedByPhi,
642 SmallVector<MachineInstr*, 16> &Copies) {
643 SmallVector<MachineBasicBlock*, 8> Preds(TailBB->pred_begin(),
645 for (SmallSetVector<MachineBasicBlock *, 8>::iterator PI = Preds.begin(),
646 PE = Preds.end(); PI != PE; ++PI) {
647 MachineBasicBlock *PredBB = *PI;
649 MachineBasicBlock *PredTBB = NULL, *PredFBB = NULL;
650 SmallVector<MachineOperand, 4> PredCond;
652 TII->AnalyzeBranch(*PredBB, PredTBB, PredFBB, PredCond, true);
654 assert(!NotAnalyzable && "Cannot duplicate this!");
656 DEBUG(dbgs() << "\nTail-duplicating into PredBB: " << *PredBB
657 << "From simple Succ: " << *TailBB);
659 MachineBasicBlock *NewTarget = *TailBB->succ_begin();
660 MachineBasicBlock *NextBB = llvm::next(MachineFunction::iterator(PredBB));
662 DenseMap<unsigned, unsigned> LocalVRMap;
663 SmallVector<std::pair<unsigned,unsigned>, 4> CopyInfos;
664 for (MachineBasicBlock::iterator I = TailBB->begin();
665 I != TailBB->end() && I->isPHI();) {
666 MachineInstr *MI = &*I;
668 ProcessPHI(MI, TailBB, PredBB, LocalVRMap, CopyInfos, UsedByPhi, true);
670 MachineBasicBlock::iterator Loc = PredBB->getFirstTerminator();
671 for (unsigned i = 0, e = CopyInfos.size(); i != e; ++i) {
672 Copies.push_back(BuildMI(*PredBB, Loc, DebugLoc(),
673 TII->get(TargetOpcode::COPY),
674 CopyInfos[i].first).addReg(CopyInfos[i].second));
677 // Make PredFBB explicit.
678 if (PredCond.empty())
681 // Make fall through explicit.
688 if (PredFBB == TailBB)
690 if (PredTBB == TailBB)
693 // Make the branch unconditional if possible
694 if (PredTBB == PredFBB) {
699 // Avoid adding fall through branches.
700 if (PredFBB == NextBB)
702 if (PredTBB == NextBB && PredFBB == NULL)
705 TII->RemoveBranch(*PredBB);
708 TII->InsertBranch(*PredBB, PredTBB, PredFBB, PredCond, DebugLoc());
710 PredBB->removeSuccessor(TailBB);
711 unsigned NumSuccessors = PredBB->succ_size();
712 assert(NumSuccessors <= 1);
713 if (NumSuccessors == 0 || *PredBB->succ_begin() != NewTarget)
714 PredBB->addSuccessor(NewTarget);
716 TDBBs.push_back(PredBB);
720 /// TailDuplicate - If it is profitable, duplicate TailBB's contents in each
721 /// of its predecessors.
723 TailDuplicatePass::TailDuplicate(MachineBasicBlock *TailBB, MachineFunction &MF,
724 SmallVector<MachineBasicBlock*, 8> &TDBBs,
725 SmallVector<MachineInstr*, 16> &Copies) {
726 bool IsSimple = isSimpleBB(TailBB);
728 if (!shouldTailDuplicate(MF, IsSimple, *TailBB))
731 DEBUG(dbgs() << "\n*** Tail-duplicating BB#" << TailBB->getNumber() << '\n');
733 DenseSet<unsigned> UsedByPhi;
734 getRegsUsedByPHIs(*TailBB, &UsedByPhi);
737 duplicateSimpleBB(TailBB, TDBBs, UsedByPhi, Copies);
742 // Iterate through all the unique predecessors and tail-duplicate this
743 // block into them, if possible. Copying the list ahead of time also
744 // avoids trouble with the predecessor list reallocating.
745 bool Changed = false;
746 SmallSetVector<MachineBasicBlock*, 8> Preds(TailBB->pred_begin(),
748 for (SmallSetVector<MachineBasicBlock *, 8>::iterator PI = Preds.begin(),
749 PE = Preds.end(); PI != PE; ++PI) {
750 MachineBasicBlock *PredBB = *PI;
752 assert(TailBB != PredBB &&
753 "Single-block loop should have been rejected earlier!");
754 // EH edges are ignored by AnalyzeBranch.
755 if (PredBB->succ_size() > 1)
758 MachineBasicBlock *PredTBB, *PredFBB;
759 SmallVector<MachineOperand, 4> PredCond;
760 if (TII->AnalyzeBranch(*PredBB, PredTBB, PredFBB, PredCond, true))
762 if (!PredCond.empty())
764 // Don't duplicate into a fall-through predecessor (at least for now).
765 if (PredBB->isLayoutSuccessor(TailBB) && PredBB->canFallThrough())
768 DEBUG(dbgs() << "\nTail-duplicating into PredBB: " << *PredBB
769 << "From Succ: " << *TailBB);
771 TDBBs.push_back(PredBB);
773 // Remove PredBB's unconditional branch.
774 TII->RemoveBranch(*PredBB);
776 // Clone the contents of TailBB into PredBB.
777 DenseMap<unsigned, unsigned> LocalVRMap;
778 SmallVector<std::pair<unsigned,unsigned>, 4> CopyInfos;
779 MachineBasicBlock::iterator I = TailBB->begin();
780 while (I != TailBB->end()) {
781 MachineInstr *MI = &*I;
784 // Replace the uses of the def of the PHI with the register coming
786 ProcessPHI(MI, TailBB, PredBB, LocalVRMap, CopyInfos, UsedByPhi, true);
788 // Replace def of virtual registers with new registers, and update
789 // uses with PHI source register or the new registers.
790 DuplicateInstruction(MI, TailBB, PredBB, MF, LocalVRMap, UsedByPhi);
793 MachineBasicBlock::iterator Loc = PredBB->getFirstTerminator();
794 for (unsigned i = 0, e = CopyInfos.size(); i != e; ++i) {
795 Copies.push_back(BuildMI(*PredBB, Loc, DebugLoc(),
796 TII->get(TargetOpcode::COPY),
797 CopyInfos[i].first).addReg(CopyInfos[i].second));
801 TII->AnalyzeBranch(*PredBB, PredTBB, PredFBB, PredCond, true);
803 NumInstrDups += TailBB->size() - 1; // subtract one for removed branch
806 PredBB->removeSuccessor(PredBB->succ_begin());
807 assert(PredBB->succ_empty() &&
808 "TailDuplicate called on block with multiple successors!");
809 for (MachineBasicBlock::succ_iterator I = TailBB->succ_begin(),
810 E = TailBB->succ_end(); I != E; ++I)
811 PredBB->addSuccessor(*I);
817 // If TailBB was duplicated into all its predecessors except for the prior
818 // block, which falls through unconditionally, move the contents of this
819 // block into the prior block.
820 MachineBasicBlock *PrevBB = prior(MachineFunction::iterator(TailBB));
821 MachineBasicBlock *PriorTBB = 0, *PriorFBB = 0;
822 SmallVector<MachineOperand, 4> PriorCond;
823 // This has to check PrevBB->succ_size() because EH edges are ignored by
825 if (PrevBB->succ_size() == 1 &&
826 !TII->AnalyzeBranch(*PrevBB, PriorTBB, PriorFBB, PriorCond, true) &&
827 PriorCond.empty() && !PriorTBB && TailBB->pred_size() == 1 &&
828 !TailBB->hasAddressTaken()) {
829 DEBUG(dbgs() << "\nMerging into block: " << *PrevBB
830 << "From MBB: " << *TailBB);
832 DenseMap<unsigned, unsigned> LocalVRMap;
833 SmallVector<std::pair<unsigned,unsigned>, 4> CopyInfos;
834 MachineBasicBlock::iterator I = TailBB->begin();
835 // Process PHI instructions first.
836 while (I != TailBB->end() && I->isPHI()) {
837 // Replace the uses of the def of the PHI with the register coming
839 MachineInstr *MI = &*I++;
840 ProcessPHI(MI, TailBB, PrevBB, LocalVRMap, CopyInfos, UsedByPhi, true);
842 MI->eraseFromParent();
845 // Now copy the non-PHI instructions.
846 while (I != TailBB->end()) {
847 // Replace def of virtual registers with new registers, and update
848 // uses with PHI source register or the new registers.
849 MachineInstr *MI = &*I++;
850 DuplicateInstruction(MI, TailBB, PrevBB, MF, LocalVRMap, UsedByPhi);
851 MI->eraseFromParent();
853 MachineBasicBlock::iterator Loc = PrevBB->getFirstTerminator();
854 for (unsigned i = 0, e = CopyInfos.size(); i != e; ++i) {
855 Copies.push_back(BuildMI(*PrevBB, Loc, DebugLoc(),
856 TII->get(TargetOpcode::COPY),
858 .addReg(CopyInfos[i].second));
861 // No PHIs to worry about, just splice the instructions over.
862 PrevBB->splice(PrevBB->end(), TailBB, TailBB->begin(), TailBB->end());
864 PrevBB->removeSuccessor(PrevBB->succ_begin());
865 assert(PrevBB->succ_empty());
866 PrevBB->transferSuccessors(TailBB);
867 TDBBs.push_back(PrevBB);
871 // If this is after register allocation, there are no phis to fix.
875 // If we made no changes so far, we are safe.
880 // Handle the nasty case in that we duplicated a block that is part of a loop
881 // into some but not all of its predecessors. For example:
885 // if we duplicate 2 into 1 but not into 3, we end up with
886 // 12 -> 3 <-> 2 -> rest |
889 // If there was a "var = phi(1, 3)" in 2, it has to be ultimately replaced
890 // with a phi in 3 (which now dominates 2).
891 // What we do here is introduce a copy in 3 of the register defined by the
892 // phi, just like when we are duplicating 2 into 3, but we don't copy any
893 // real instructions or remove the 3 -> 2 edge from the phi in 2.
894 for (SmallSetVector<MachineBasicBlock *, 8>::iterator PI = Preds.begin(),
895 PE = Preds.end(); PI != PE; ++PI) {
896 MachineBasicBlock *PredBB = *PI;
897 if (std::find(TDBBs.begin(), TDBBs.end(), PredBB) != TDBBs.end())
901 if (PredBB->succ_size() != 1)
904 DenseMap<unsigned, unsigned> LocalVRMap;
905 SmallVector<std::pair<unsigned,unsigned>, 4> CopyInfos;
906 MachineBasicBlock::iterator I = TailBB->begin();
907 // Process PHI instructions first.
908 while (I != TailBB->end() && I->isPHI()) {
909 // Replace the uses of the def of the PHI with the register coming
911 MachineInstr *MI = &*I++;
912 ProcessPHI(MI, TailBB, PredBB, LocalVRMap, CopyInfos, UsedByPhi, false);
914 MachineBasicBlock::iterator Loc = PredBB->getFirstTerminator();
915 for (unsigned i = 0, e = CopyInfos.size(); i != e; ++i) {
916 Copies.push_back(BuildMI(*PredBB, Loc, DebugLoc(),
917 TII->get(TargetOpcode::COPY),
918 CopyInfos[i].first).addReg(CopyInfos[i].second));
925 /// RemoveDeadBlock - Remove the specified dead machine basic block from the
926 /// function, updating the CFG.
927 void TailDuplicatePass::RemoveDeadBlock(MachineBasicBlock *MBB) {
928 assert(MBB->pred_empty() && "MBB must be dead!");
929 DEBUG(dbgs() << "\nRemoving MBB: " << *MBB);
931 // Remove all successors.
932 while (!MBB->succ_empty())
933 MBB->removeSuccessor(MBB->succ_end()-1);
936 MBB->eraseFromParent();