1 //===-- TargetInstrInfoImpl.cpp - Target Instruction Information ----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the TargetInstrInfoImpl class, it just provides default
11 // implementations of various methods.
13 //===----------------------------------------------------------------------===//
15 #include "llvm/Target/TargetInstrInfo.h"
16 #include "llvm/ADT/SmallVector.h"
17 #include "llvm/CodeGen/MachineFrameInfo.h"
18 #include "llvm/CodeGen/MachineInstr.h"
19 #include "llvm/CodeGen/MachineInstrBuilder.h"
20 #include "llvm/CodeGen/PseudoSourceValue.h"
23 // commuteInstruction - The default implementation of this method just exchanges
25 MachineInstr *TargetInstrInfoImpl::commuteInstruction(MachineInstr *MI,
27 const TargetInstrDesc &TID = MI->getDesc();
28 bool HasDef = TID.getNumDefs();
29 unsigned Idx1 = HasDef ? 1 : 0;
30 unsigned Idx2 = HasDef ? 2 : 1;
32 assert(MI->getOperand(Idx1).isReg() && MI->getOperand(Idx2).isReg() &&
33 "This only knows how to commute register operands so far");
34 unsigned Reg1 = MI->getOperand(Idx1).getReg();
35 unsigned Reg2 = MI->getOperand(Idx2).getReg();
36 bool Reg1IsKill = MI->getOperand(Idx1).isKill();
37 bool Reg2IsKill = MI->getOperand(Idx2).isKill();
38 bool ChangeReg0 = false;
39 if (HasDef && MI->getOperand(0).getReg() == Reg1) {
40 // Must be two address instruction!
41 assert(MI->getDesc().getOperandConstraint(0, TOI::TIED_TO) &&
42 "Expecting a two-address instruction!");
48 // Create a new instruction.
49 unsigned Reg0 = HasDef
50 ? (ChangeReg0 ? Reg2 : MI->getOperand(0).getReg()) : 0;
51 bool Reg0IsDead = HasDef ? MI->getOperand(0).isDead() : false;
52 MachineFunction &MF = *MI->getParent()->getParent();
54 return BuildMI(MF, MI->getDebugLoc(), MI->getDesc())
55 .addReg(Reg0, RegState::Define | getDeadRegState(Reg0IsDead))
56 .addReg(Reg2, getKillRegState(Reg2IsKill))
57 .addReg(Reg1, getKillRegState(Reg2IsKill));
59 return BuildMI(MF, MI->getDebugLoc(), MI->getDesc())
60 .addReg(Reg2, getKillRegState(Reg2IsKill))
61 .addReg(Reg1, getKillRegState(Reg2IsKill));
65 MI->getOperand(0).setReg(Reg2);
66 MI->getOperand(Idx2).setReg(Reg1);
67 MI->getOperand(Idx1).setReg(Reg2);
68 MI->getOperand(Idx2).setIsKill(Reg1IsKill);
69 MI->getOperand(Idx1).setIsKill(Reg2IsKill);
73 /// CommuteChangesDestination - Return true if commuting the specified
74 /// instruction will also changes the destination operand. Also return the
75 /// current operand index of the would be new destination register by
76 /// reference. This can happen when the commutable instruction is also a
77 /// two-address instruction.
78 bool TargetInstrInfoImpl::CommuteChangesDestination(MachineInstr *MI,
79 unsigned &OpIdx) const{
80 const TargetInstrDesc &TID = MI->getDesc();
81 if (!TID.getNumDefs())
83 assert(MI->getOperand(1).isReg() && MI->getOperand(2).isReg() &&
84 "This only knows how to commute register operands so far");
85 if (MI->getOperand(0).getReg() == MI->getOperand(1).getReg()) {
86 // Must be two address instruction!
87 assert(MI->getDesc().getOperandConstraint(0, TOI::TIED_TO) &&
88 "Expecting a two-address instruction!");
96 bool TargetInstrInfoImpl::PredicateInstruction(MachineInstr *MI,
97 const SmallVectorImpl<MachineOperand> &Pred) const {
98 bool MadeChange = false;
99 const TargetInstrDesc &TID = MI->getDesc();
100 if (!TID.isPredicable())
103 for (unsigned j = 0, i = 0, e = MI->getNumOperands(); i != e; ++i) {
104 if (TID.OpInfo[i].isPredicate()) {
105 MachineOperand &MO = MI->getOperand(i);
107 MO.setReg(Pred[j].getReg());
109 } else if (MO.isImm()) {
110 MO.setImm(Pred[j].getImm());
112 } else if (MO.isMBB()) {
113 MO.setMBB(Pred[j].getMBB());
122 void TargetInstrInfoImpl::reMaterialize(MachineBasicBlock &MBB,
123 MachineBasicBlock::iterator I,
125 const MachineInstr *Orig) const {
126 MachineInstr *MI = MBB.getParent()->CloneMachineInstr(Orig);
127 MI->getOperand(0).setReg(DestReg);
132 TargetInstrInfoImpl::GetFunctionSizeInBytes(const MachineFunction &MF) const {
134 for (MachineFunction::const_iterator MBBI = MF.begin(), E = MF.end();
136 const MachineBasicBlock &MBB = *MBBI;
137 for (MachineBasicBlock::const_iterator I = MBB.begin(),E = MBB.end();
139 FnSize += GetInstSizeInBytes(I);
144 /// foldMemoryOperand - Attempt to fold a load or store of the specified stack
145 /// slot into the specified machine instruction for the specified operand(s).
146 /// If this is possible, a new instruction is returned with the specified
147 /// operand folded, otherwise NULL is returned. The client is responsible for
148 /// removing the old instruction and adding the new one in the instruction
151 TargetInstrInfo::foldMemoryOperand(MachineFunction &MF,
153 const SmallVectorImpl<unsigned> &Ops,
154 int FrameIndex) const {
156 for (unsigned i = 0, e = Ops.size(); i != e; ++i)
157 if (MI->getOperand(Ops[i]).isDef())
158 Flags |= MachineMemOperand::MOStore;
160 Flags |= MachineMemOperand::MOLoad;
162 // Ask the target to do the actual folding.
163 MachineInstr *NewMI = foldMemoryOperandImpl(MF, MI, Ops, FrameIndex);
164 if (!NewMI) return 0;
166 assert((!(Flags & MachineMemOperand::MOStore) ||
167 NewMI->getDesc().mayStore()) &&
168 "Folded a def to a non-store!");
169 assert((!(Flags & MachineMemOperand::MOLoad) ||
170 NewMI->getDesc().mayLoad()) &&
171 "Folded a use to a non-load!");
172 const MachineFrameInfo &MFI = *MF.getFrameInfo();
173 assert(MFI.getObjectOffset(FrameIndex) != -1);
174 MachineMemOperand MMO(PseudoSourceValue::getFixedStack(FrameIndex),
176 MFI.getObjectOffset(FrameIndex),
177 MFI.getObjectSize(FrameIndex),
178 MFI.getObjectAlignment(FrameIndex));
179 NewMI->addMemOperand(MF, MMO);
184 /// foldMemoryOperand - Same as the previous version except it allows folding
185 /// of any load and store from / to any address, not just from a specific
188 TargetInstrInfo::foldMemoryOperand(MachineFunction &MF,
190 const SmallVectorImpl<unsigned> &Ops,
191 MachineInstr* LoadMI) const {
192 assert(LoadMI->getDesc().canFoldAsLoad() && "LoadMI isn't foldable!");
194 for (unsigned i = 0, e = Ops.size(); i != e; ++i)
195 assert(MI->getOperand(Ops[i]).isUse() && "Folding load into def!");
198 // Ask the target to do the actual folding.
199 MachineInstr *NewMI = foldMemoryOperandImpl(MF, MI, Ops, LoadMI);
200 if (!NewMI) return 0;
202 // Copy the memoperands from the load to the folded instruction.
203 for (std::list<MachineMemOperand>::iterator I = LoadMI->memoperands_begin(),
204 E = LoadMI->memoperands_end(); I != E; ++I)
205 NewMI->addMemOperand(MF, *I);