1 //===-- TargetInstrInfoImpl.cpp - Target Instruction Information ----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the TargetInstrInfoImpl class, it just provides default
11 // implementations of various methods.
13 //===----------------------------------------------------------------------===//
15 #include "llvm/Target/TargetInstrInfo.h"
16 #include "llvm/ADT/SmallVector.h"
17 #include "llvm/CodeGen/MachineFrameInfo.h"
18 #include "llvm/CodeGen/MachineInstr.h"
19 #include "llvm/CodeGen/MachineInstrBuilder.h"
20 #include "llvm/CodeGen/PseudoSourceValue.h"
23 // commuteInstruction - The default implementation of this method just exchanges
25 MachineInstr *TargetInstrInfoImpl::commuteInstruction(MachineInstr *MI,
27 const TargetInstrDesc &TID = MI->getDesc();
28 bool HasDef = TID.getNumDefs();
29 unsigned Idx1 = HasDef ? 1 : 0;
30 unsigned Idx2 = HasDef ? 2 : 1;
32 assert(MI->getOperand(Idx1).isReg() && MI->getOperand(Idx2).isReg() &&
33 "This only knows how to commute register operands so far");
34 unsigned Reg1 = MI->getOperand(Idx1).getReg();
35 unsigned Reg2 = MI->getOperand(Idx2).getReg();
36 bool Reg1IsKill = MI->getOperand(Idx1).isKill();
37 bool Reg2IsKill = MI->getOperand(Idx2).isKill();
38 bool ChangeReg0 = false;
39 if (HasDef && MI->getOperand(0).getReg() == Reg1) {
40 // Must be two address instruction!
41 assert(MI->getDesc().getOperandConstraint(0, TOI::TIED_TO) &&
42 "Expecting a two-address instruction!");
48 // Create a new instruction.
49 unsigned Reg0 = HasDef
50 ? (ChangeReg0 ? Reg2 : MI->getOperand(0).getReg()) : 0;
51 bool Reg0IsDead = HasDef ? MI->getOperand(0).isDead() : false;
52 MachineFunction &MF = *MI->getParent()->getParent();
54 return BuildMI(MF, MI->getDebugLoc(), MI->getDesc())
55 .addReg(Reg0, RegState::Define | getDeadRegState(Reg0IsDead))
56 .addReg(Reg2, getKillRegState(Reg2IsKill))
57 .addReg(Reg1, getKillRegState(Reg2IsKill));
59 return BuildMI(MF, MI->getDebugLoc(), MI->getDesc())
60 .addReg(Reg2, getKillRegState(Reg2IsKill))
61 .addReg(Reg1, getKillRegState(Reg2IsKill));
65 MI->getOperand(0).setReg(Reg2);
66 MI->getOperand(Idx2).setReg(Reg1);
67 MI->getOperand(Idx1).setReg(Reg2);
68 MI->getOperand(Idx2).setIsKill(Reg1IsKill);
69 MI->getOperand(Idx1).setIsKill(Reg2IsKill);
73 /// findCommutedOpIndices - If specified MI is commutable, return the two
74 /// operand indices that would swap value. Return true if the instruction
75 /// is not in a form which this routine understands.
76 bool TargetInstrInfoImpl::findCommutedOpIndices(MachineInstr *MI,
78 unsigned &SrcOpIdx2) const {
79 const TargetInstrDesc &TID = MI->getDesc();
80 if (!TID.isCommutable())
82 // This assumes v0 = op v1, v2 and commuting would swap v1 and v2. If this
83 // is not true, then the target must implement this.
84 SrcOpIdx1 = TID.getNumDefs();
85 SrcOpIdx2 = SrcOpIdx1 + 1;
86 if (!MI->getOperand(SrcOpIdx1).isReg() ||
87 !MI->getOperand(SrcOpIdx2).isReg())
94 bool TargetInstrInfoImpl::PredicateInstruction(MachineInstr *MI,
95 const SmallVectorImpl<MachineOperand> &Pred) const {
96 bool MadeChange = false;
97 const TargetInstrDesc &TID = MI->getDesc();
98 if (!TID.isPredicable())
101 for (unsigned j = 0, i = 0, e = MI->getNumOperands(); i != e; ++i) {
102 if (TID.OpInfo[i].isPredicate()) {
103 MachineOperand &MO = MI->getOperand(i);
105 MO.setReg(Pred[j].getReg());
107 } else if (MO.isImm()) {
108 MO.setImm(Pred[j].getImm());
110 } else if (MO.isMBB()) {
111 MO.setMBB(Pred[j].getMBB());
120 void TargetInstrInfoImpl::reMaterialize(MachineBasicBlock &MBB,
121 MachineBasicBlock::iterator I,
123 const MachineInstr *Orig) const {
124 MachineInstr *MI = MBB.getParent()->CloneMachineInstr(Orig);
125 MI->getOperand(0).setReg(DestReg);
130 TargetInstrInfoImpl::GetFunctionSizeInBytes(const MachineFunction &MF) const {
132 for (MachineFunction::const_iterator MBBI = MF.begin(), E = MF.end();
134 const MachineBasicBlock &MBB = *MBBI;
135 for (MachineBasicBlock::const_iterator I = MBB.begin(),E = MBB.end();
137 FnSize += GetInstSizeInBytes(I);
142 /// foldMemoryOperand - Attempt to fold a load or store of the specified stack
143 /// slot into the specified machine instruction for the specified operand(s).
144 /// If this is possible, a new instruction is returned with the specified
145 /// operand folded, otherwise NULL is returned. The client is responsible for
146 /// removing the old instruction and adding the new one in the instruction
149 TargetInstrInfo::foldMemoryOperand(MachineFunction &MF,
151 const SmallVectorImpl<unsigned> &Ops,
152 int FrameIndex) const {
154 for (unsigned i = 0, e = Ops.size(); i != e; ++i)
155 if (MI->getOperand(Ops[i]).isDef())
156 Flags |= MachineMemOperand::MOStore;
158 Flags |= MachineMemOperand::MOLoad;
160 // Ask the target to do the actual folding.
161 MachineInstr *NewMI = foldMemoryOperandImpl(MF, MI, Ops, FrameIndex);
162 if (!NewMI) return 0;
164 assert((!(Flags & MachineMemOperand::MOStore) ||
165 NewMI->getDesc().mayStore()) &&
166 "Folded a def to a non-store!");
167 assert((!(Flags & MachineMemOperand::MOLoad) ||
168 NewMI->getDesc().mayLoad()) &&
169 "Folded a use to a non-load!");
170 const MachineFrameInfo &MFI = *MF.getFrameInfo();
171 assert(MFI.getObjectOffset(FrameIndex) != -1);
172 MachineMemOperand MMO(PseudoSourceValue::getFixedStack(FrameIndex),
174 MFI.getObjectOffset(FrameIndex),
175 MFI.getObjectSize(FrameIndex),
176 MFI.getObjectAlignment(FrameIndex));
177 NewMI->addMemOperand(MF, MMO);
182 /// foldMemoryOperand - Same as the previous version except it allows folding
183 /// of any load and store from / to any address, not just from a specific
186 TargetInstrInfo::foldMemoryOperand(MachineFunction &MF,
188 const SmallVectorImpl<unsigned> &Ops,
189 MachineInstr* LoadMI) const {
190 assert(LoadMI->getDesc().canFoldAsLoad() && "LoadMI isn't foldable!");
192 for (unsigned i = 0, e = Ops.size(); i != e; ++i)
193 assert(MI->getOperand(Ops[i]).isUse() && "Folding load into def!");
196 // Ask the target to do the actual folding.
197 MachineInstr *NewMI = foldMemoryOperandImpl(MF, MI, Ops, LoadMI);
198 if (!NewMI) return 0;
200 // Copy the memoperands from the load to the folded instruction.
201 for (std::list<MachineMemOperand>::iterator I = LoadMI->memoperands_begin(),
202 E = LoadMI->memoperands_end(); I != E; ++I)
203 NewMI->addMemOperand(MF, *I);