1 //===-- TwoAddressInstructionPass.cpp - Two-Address instruction pass ------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the TwoAddress instruction pass which is used
11 // by most register allocators. Two-Address instructions are rewritten
21 // Note that if a register allocator chooses to use this pass, that it
22 // has to be capable of handling the non-SSA nature of these rewritten
25 // It is also worth noting that the duplicate operand of the two
26 // address instruction is removed.
28 //===----------------------------------------------------------------------===//
30 #define DEBUG_TYPE "twoaddrinstr"
31 #include "llvm/CodeGen/Passes.h"
32 #include "llvm/CodeGen/LiveVariables.h"
33 #include "llvm/CodeGen/MachineFunctionPass.h"
34 #include "llvm/CodeGen/MachineInstr.h"
35 #include "llvm/CodeGen/SSARegMap.h"
36 #include "llvm/Target/MRegisterInfo.h"
37 #include "llvm/Target/TargetInstrInfo.h"
38 #include "llvm/Target/TargetMachine.h"
39 #include "Support/Debug.h"
40 #include "Support/Statistic.h"
45 Statistic<> numTwoAddressInstrs("twoaddressinstruction",
46 "Number of two-address instructions");
47 Statistic<> numInstrsAdded("twoaddressinstruction",
48 "Number of instructions added");
50 struct TwoAddressInstructionPass : public MachineFunctionPass
52 virtual void getAnalysisUsage(AnalysisUsage &AU) const;
54 /// runOnMachineFunction - pass entry point
55 bool runOnMachineFunction(MachineFunction&);
58 RegisterPass<TwoAddressInstructionPass> X(
59 "twoaddressinstruction", "Two-Address instruction pass");
62 const PassInfo *llvm::TwoAddressInstructionPassID = X.getPassInfo();
64 void TwoAddressInstructionPass::getAnalysisUsage(AnalysisUsage &AU) const
66 AU.addPreserved<LiveVariables>();
67 AU.addRequired<LiveVariables>();
68 AU.addPreservedID(PHIEliminationID);
69 AU.addRequiredID(PHIEliminationID);
70 MachineFunctionPass::getAnalysisUsage(AU);
73 /// runOnMachineFunction - Reduce two-address instructions to two
76 bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
77 DEBUG(std::cerr << "Machine Function\n");
78 const TargetMachine &TM = MF.getTarget();
79 const MRegisterInfo &MRI = *TM.getRegisterInfo();
80 const TargetInstrInfo &TII = TM.getInstrInfo();
81 LiveVariables &LV = getAnalysis<LiveVariables>();
83 bool MadeChange = false;
85 for (MachineFunction::iterator mbbi = MF.begin(), mbbe = MF.end();
86 mbbi != mbbe; ++mbbi) {
87 for (MachineBasicBlock::iterator mi = mbbi->begin(), me = mbbi->end();
89 unsigned opcode = mi->getOpcode();
91 // ignore if it is not a two-address instruction
92 if (!TII.isTwoAddrInstr(opcode))
95 ++numTwoAddressInstrs;
97 DEBUG(std::cerr << "\tinstruction: "; mi->print(std::cerr, TM));
99 assert(mi->getOperand(1).isRegister() &&
100 mi->getOperand(1).getAllocatedRegNum() &&
101 mi->getOperand(1).isUse() &&
102 "two address instruction invalid");
104 // if the two operands are the same we just remove the use
105 // and mark the def as def&use
106 if (mi->getOperand(0).getAllocatedRegNum() ==
107 mi->getOperand(1).getAllocatedRegNum()) {
117 unsigned regA = mi->getOperand(0).getAllocatedRegNum();
118 unsigned regB = mi->getOperand(1).getAllocatedRegNum();
120 assert(MRegisterInfo::isVirtualRegister(regA) &&
121 MRegisterInfo::isVirtualRegister(regB) &&
122 "cannot update physical register live information");
124 // first make sure we do not have a use of a in the
125 // instruction (a = b + a for example) because our
126 // transformation will not work. This should never occur
127 // because we are in SSA form.
128 for (unsigned i = 1; i != mi->getNumOperands(); ++i)
129 assert(!mi->getOperand(i).isRegister() ||
130 mi->getOperand(i).getAllocatedRegNum() != (int)regA);
132 const TargetRegisterClass* rc =
133 MF.getSSARegMap()->getRegClass(regA);
134 unsigned Added = MRI.copyRegToReg(*mbbi, mi, regA, regB, rc);
135 numInstrsAdded += Added;
137 MachineBasicBlock::iterator prevMi = mi;
139 DEBUG(std::cerr << "\t\tadded instruction: ";
140 prevMi->print(std::cerr, TM));
142 // update live variables for regA
144 "Cannot handle multi-instruction copies yet!");
145 LiveVariables::VarInfo& varInfo = LV.getVarInfo(regA);
146 varInfo.DefInst = prevMi;
148 // update live variables for regB
149 if (LV.removeVirtualRegisterKilled(regB, &*mbbi, mi))
150 LV.addVirtualRegisterKilled(regB, &*mbbi, prevMi);
152 if (LV.removeVirtualRegisterDead(regB, &*mbbi, mi))
153 LV.addVirtualRegisterDead(regB, &*mbbi, prevMi);
155 // replace all occurences of regB with regA
156 for (unsigned i = 1, e = mi->getNumOperands(); i != e; ++i) {
157 if (mi->getOperand(i).isRegister() &&
158 mi->getOperand(i).getReg() == regB)
159 mi->SetMachineOperandReg(i, regA);
163 assert(mi->getOperand(0).isDef());
164 mi->getOperand(0).setUse();
165 mi->RemoveOperand(1);
167 DEBUG(std::cerr << "\t\tmodified original to: ";
168 mi->print(std::cerr, TM));