1 //===-- TwoAddressInstructionPass.cpp - Two-Address instruction pass ------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the TwoAddress instruction pass which is used
11 // by most register allocators. Two-Address instructions are rewritten
21 // Note that if a register allocator chooses to use this pass, that it has to
22 // be capable of handling the non-SSA nature of these rewritten virtual
25 //===----------------------------------------------------------------------===//
27 #define DEBUG_TYPE "twoaddrinstr"
28 #include "llvm/CodeGen/Passes.h"
29 #include "llvm/CodeGen/LiveVariables.h"
30 #include "llvm/CodeGen/MachineFunctionPass.h"
31 #include "llvm/CodeGen/MachineInstr.h"
32 #include "llvm/CodeGen/SSARegMap.h"
33 #include "llvm/Target/MRegisterInfo.h"
34 #include "llvm/Target/TargetInstrInfo.h"
35 #include "llvm/Target/TargetMachine.h"
36 #include "Support/Debug.h"
37 #include "Support/Statistic.h"
41 Statistic<> numTwoAddressInstrs("twoaddressinstruction",
42 "Number of two-address instructions");
43 Statistic<> numInstrsAdded("twoaddressinstruction",
44 "Number of instructions added");
46 class TwoAddressInstructionPass : public MachineFunctionPass
50 const TargetMachine* tm_;
51 const MRegisterInfo* mri_;
55 virtual void getAnalysisUsage(AnalysisUsage &AU) const;
58 /// runOnMachineFunction - pass entry point
59 bool runOnMachineFunction(MachineFunction&);
62 RegisterPass<TwoAddressInstructionPass> X(
63 "twoaddressinstruction", "Two-Address instruction pass");
66 const PassInfo *llvm::TwoAddressInstructionPassID = X.getPassInfo();
68 void TwoAddressInstructionPass::getAnalysisUsage(AnalysisUsage &AU) const
70 AU.addPreserved<LiveVariables>();
71 AU.addRequired<LiveVariables>();
72 AU.addPreservedID(PHIEliminationID);
73 AU.addRequiredID(PHIEliminationID);
74 MachineFunctionPass::getAnalysisUsage(AU);
77 /// runOnMachineFunction - Reduce two-address instructions to two
80 bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &fn) {
81 DEBUG(std::cerr << "Machine Function\n");
83 tm_ = &fn.getTarget();
84 mri_ = tm_->getRegisterInfo();
85 lv_ = &getAnalysis<LiveVariables>();
87 const TargetInstrInfo& tii = tm_->getInstrInfo();
89 for (MachineFunction::iterator mbbi = mf_->begin(), mbbe = mf_->end();
90 mbbi != mbbe; ++mbbi) {
91 for (MachineBasicBlock::iterator mii = mbbi->begin();
92 mii != mbbi->end(); ++mii) {
93 MachineInstr* mi = *mii;
95 unsigned opcode = mi->getOpcode();
96 // ignore if it is not a two-address instruction
97 if (!tii.isTwoAddrInstr(opcode))
100 ++numTwoAddressInstrs;
102 DEBUG(std::cerr << "\tinstruction: "; mi->print(std::cerr, *tm_));
104 // we have nothing to do if the two operands are the same
105 if (mi->getOperand(0).getAllocatedRegNum() ==
106 mi->getOperand(1).getAllocatedRegNum())
109 assert(mi->getOperand(1).isRegister() &&
110 mi->getOperand(1).getAllocatedRegNum() &&
111 mi->getOperand(1).isUse() &&
112 "two address instruction invalid");
119 unsigned regA = mi->getOperand(0).getAllocatedRegNum();
120 unsigned regB = mi->getOperand(1).getAllocatedRegNum();
122 assert(regA >= MRegisterInfo::FirstVirtualRegister &&
123 regB >= MRegisterInfo::FirstVirtualRegister &&
124 "cannot update physical register live information");
126 // first make sure we do not have a use of a in the
127 // instruction (a = b + a for example) because our
128 // transofrmation will not work. This should never occur
130 for (unsigned i = 1; i < mi->getNumOperands(); ++i) {
131 assert(!mi->getOperand(i).isRegister() ||
132 mi->getOperand(i).getAllocatedRegNum() != (int)regA);
135 const TargetRegisterClass* rc =
136 mf_->getSSARegMap()->getRegClass(regA);
137 numInstrsAdded += mri_->copyRegToReg(*mbbi, mii, regA, regB, rc);
139 MachineInstr* prevMi = *(mii - 1);
140 DEBUG(std::cerr << "\t\tadded instruction: ";
141 prevMi->print(std::cerr, *tm_));
143 // update live variables for regA
144 LiveVariables::VarInfo& varInfo = lv_->getVarInfo(regA);
145 varInfo.DefInst = prevMi;
147 // update live variables for regB
148 if (lv_->removeVirtualRegisterKilled(regB, &*mbbi, mi))
149 lv_->addVirtualRegisterKilled(regB, &*mbbi, prevMi);
151 if (lv_->removeVirtualRegisterDead(regB, &*mbbi, mi))
152 lv_->addVirtualRegisterDead(regB, &*mbbi, prevMi);
154 // replace all occurences of regB with regA
155 for (unsigned i = 1; i < mi->getNumOperands(); ++i) {
156 if (mi->getOperand(i).isRegister() &&
157 mi->getOperand(i).getReg() == regB)
158 mi->SetMachineOperandReg(i, regA);
160 DEBUG(std::cerr << "\t\tmodified original to: ";
161 mi->print(std::cerr, *tm_));
162 assert(mi->getOperand(0).getAllocatedRegNum() ==
163 mi->getOperand(1).getAllocatedRegNum());
167 return numInstrsAdded != 0;