1 //===-- llvm/CodeGen/VirtRegMap.cpp - Virtual Register Map ----------------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the VirtRegMap class.
12 // It also contains implementations of the the Spiller interface, which, given a
13 // virtual register map and a machine function, eliminates all virtual
14 // references by replacing them with physical register references - adding spill
17 //===----------------------------------------------------------------------===//
19 #define DEBUG_TYPE "spiller"
20 #include "VirtRegMap.h"
21 #include "llvm/Function.h"
22 #include "llvm/CodeGen/MachineFrameInfo.h"
23 #include "llvm/CodeGen/MachineFunction.h"
24 #include "llvm/CodeGen/SSARegMap.h"
25 #include "llvm/Target/TargetMachine.h"
26 #include "llvm/Target/TargetInstrInfo.h"
27 #include "llvm/Support/CommandLine.h"
28 #include "llvm/Support/Debug.h"
29 #include "llvm/Support/Compiler.h"
30 #include "llvm/ADT/BitVector.h"
31 #include "llvm/ADT/Statistic.h"
32 #include "llvm/ADT/STLExtras.h"
33 #include "llvm/ADT/SmallSet.h"
37 STATISTIC(NumSpills, "Number of register spills");
38 STATISTIC(NumReMats, "Number of re-materialization");
39 STATISTIC(NumDRM , "Number of re-materializable defs elided");
40 STATISTIC(NumStores, "Number of stores added");
41 STATISTIC(NumLoads , "Number of loads added");
42 STATISTIC(NumReused, "Number of values reused");
43 STATISTIC(NumDSE , "Number of dead stores elided");
44 STATISTIC(NumDCE , "Number of copies elided");
47 enum SpillerName { simple, local };
49 static cl::opt<SpillerName>
51 cl::desc("Spiller to use: (default: local)"),
53 cl::values(clEnumVal(simple, " simple spiller"),
54 clEnumVal(local, " local spiller"),
59 //===----------------------------------------------------------------------===//
60 // VirtRegMap implementation
61 //===----------------------------------------------------------------------===//
63 VirtRegMap::VirtRegMap(MachineFunction &mf)
64 : TII(*mf.getTarget().getInstrInfo()), MF(mf),
65 Virt2PhysMap(NO_PHYS_REG), Virt2StackSlotMap(NO_STACK_SLOT),
66 Virt2ReMatIdMap(NO_STACK_SLOT), Virt2SplitMap(0),
67 ReMatMap(NULL), ReMatId(MAX_STACK_SLOT+1) {
71 void VirtRegMap::grow() {
72 unsigned LastVirtReg = MF.getSSARegMap()->getLastVirtReg();
73 Virt2PhysMap.grow(LastVirtReg);
74 Virt2StackSlotMap.grow(LastVirtReg);
75 Virt2ReMatIdMap.grow(LastVirtReg);
76 Virt2SplitMap.grow(LastVirtReg);
77 ReMatMap.grow(LastVirtReg);
80 int VirtRegMap::assignVirt2StackSlot(unsigned virtReg) {
81 assert(MRegisterInfo::isVirtualRegister(virtReg));
82 assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT &&
83 "attempt to assign stack slot to already spilled register");
84 const TargetRegisterClass* RC = MF.getSSARegMap()->getRegClass(virtReg);
85 int frameIndex = MF.getFrameInfo()->CreateStackObject(RC->getSize(),
87 Virt2StackSlotMap[virtReg] = frameIndex;
92 void VirtRegMap::assignVirt2StackSlot(unsigned virtReg, int frameIndex) {
93 assert(MRegisterInfo::isVirtualRegister(virtReg));
94 assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT &&
95 "attempt to assign stack slot to already spilled register");
96 assert((frameIndex >= 0 ||
97 (frameIndex >= MF.getFrameInfo()->getObjectIndexBegin())) &&
98 "illegal fixed frame index");
99 Virt2StackSlotMap[virtReg] = frameIndex;
102 int VirtRegMap::assignVirtReMatId(unsigned virtReg) {
103 assert(MRegisterInfo::isVirtualRegister(virtReg));
104 assert(Virt2ReMatIdMap[virtReg] == NO_STACK_SLOT &&
105 "attempt to assign re-mat id to already spilled register");
106 Virt2ReMatIdMap[virtReg] = ReMatId;
110 void VirtRegMap::assignVirtReMatId(unsigned virtReg, int id) {
111 assert(MRegisterInfo::isVirtualRegister(virtReg));
112 assert(Virt2ReMatIdMap[virtReg] == NO_STACK_SLOT &&
113 "attempt to assign re-mat id to already spilled register");
114 Virt2ReMatIdMap[virtReg] = id;
117 void VirtRegMap::virtFolded(unsigned VirtReg, MachineInstr *OldMI,
118 unsigned OpNo, MachineInstr *NewMI) {
119 // Move previous memory references folded to new instruction.
120 MI2VirtMapTy::iterator IP = MI2VirtMap.lower_bound(NewMI);
121 for (MI2VirtMapTy::iterator I = MI2VirtMap.lower_bound(OldMI),
122 E = MI2VirtMap.end(); I != E && I->first == OldMI; ) {
123 MI2VirtMap.insert(IP, std::make_pair(NewMI, I->second));
124 MI2VirtMap.erase(I++);
128 const TargetInstrDescriptor *TID = OldMI->getInstrDescriptor();
129 if (TID->getOperandConstraint(OpNo, TOI::TIED_TO) != -1 ||
130 TID->findTiedToSrcOperand(OpNo) != -1) {
131 // Folded a two-address operand.
133 } else if (OldMI->getOperand(OpNo).isDef()) {
139 // add new memory reference
140 MI2VirtMap.insert(IP, std::make_pair(NewMI, std::make_pair(VirtReg, MRInfo)));
143 void VirtRegMap::virtFolded(unsigned VirtReg, MachineInstr *MI, ModRef MRInfo) {
144 MI2VirtMapTy::iterator IP = MI2VirtMap.lower_bound(MI);
145 MI2VirtMap.insert(IP, std::make_pair(MI, std::make_pair(VirtReg, MRInfo)));
148 void VirtRegMap::print(std::ostream &OS) const {
149 const MRegisterInfo* MRI = MF.getTarget().getRegisterInfo();
151 OS << "********** REGISTER MAP **********\n";
152 for (unsigned i = MRegisterInfo::FirstVirtualRegister,
153 e = MF.getSSARegMap()->getLastVirtReg(); i <= e; ++i) {
154 if (Virt2PhysMap[i] != (unsigned)VirtRegMap::NO_PHYS_REG)
155 OS << "[reg" << i << " -> " << MRI->getName(Virt2PhysMap[i]) << "]\n";
159 for (unsigned i = MRegisterInfo::FirstVirtualRegister,
160 e = MF.getSSARegMap()->getLastVirtReg(); i <= e; ++i)
161 if (Virt2StackSlotMap[i] != VirtRegMap::NO_STACK_SLOT)
162 OS << "[reg" << i << " -> fi#" << Virt2StackSlotMap[i] << "]\n";
166 void VirtRegMap::dump() const {
171 //===----------------------------------------------------------------------===//
172 // Simple Spiller Implementation
173 //===----------------------------------------------------------------------===//
175 Spiller::~Spiller() {}
178 struct VISIBILITY_HIDDEN SimpleSpiller : public Spiller {
179 bool runOnMachineFunction(MachineFunction& mf, VirtRegMap &VRM);
183 bool SimpleSpiller::runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM) {
184 DOUT << "********** REWRITE MACHINE CODE **********\n";
185 DOUT << "********** Function: " << MF.getFunction()->getName() << '\n';
186 const TargetMachine &TM = MF.getTarget();
187 const MRegisterInfo &MRI = *TM.getRegisterInfo();
189 // LoadedRegs - Keep track of which vregs are loaded, so that we only load
190 // each vreg once (in the case where a spilled vreg is used by multiple
191 // operands). This is always smaller than the number of operands to the
192 // current machine instr, so it should be small.
193 std::vector<unsigned> LoadedRegs;
195 for (MachineFunction::iterator MBBI = MF.begin(), E = MF.end();
197 DOUT << MBBI->getBasicBlock()->getName() << ":\n";
198 MachineBasicBlock &MBB = *MBBI;
199 for (MachineBasicBlock::iterator MII = MBB.begin(),
200 E = MBB.end(); MII != E; ++MII) {
201 MachineInstr &MI = *MII;
202 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
203 MachineOperand &MO = MI.getOperand(i);
204 if (MO.isRegister() && MO.getReg())
205 if (MRegisterInfo::isVirtualRegister(MO.getReg())) {
206 unsigned VirtReg = MO.getReg();
207 unsigned PhysReg = VRM.getPhys(VirtReg);
208 if (!VRM.isAssignedReg(VirtReg)) {
209 int StackSlot = VRM.getStackSlot(VirtReg);
210 const TargetRegisterClass* RC =
211 MF.getSSARegMap()->getRegClass(VirtReg);
214 std::find(LoadedRegs.begin(), LoadedRegs.end(), VirtReg)
215 == LoadedRegs.end()) {
216 MRI.loadRegFromStackSlot(MBB, &MI, PhysReg, StackSlot, RC);
217 LoadedRegs.push_back(VirtReg);
219 DOUT << '\t' << *prior(MII);
223 MRI.storeRegToStackSlot(MBB, next(MII), PhysReg, StackSlot, RC);
227 MF.setPhysRegUsed(PhysReg);
228 MI.getOperand(i).setReg(PhysReg);
230 MF.setPhysRegUsed(MO.getReg());
241 //===----------------------------------------------------------------------===//
242 // Local Spiller Implementation
243 //===----------------------------------------------------------------------===//
246 class AvailableSpills;
248 /// LocalSpiller - This spiller does a simple pass over the machine basic
249 /// block to attempt to keep spills in registers as much as possible for
250 /// blocks that have low register pressure (the vreg may be spilled due to
251 /// register pressure in other blocks).
252 class VISIBILITY_HIDDEN LocalSpiller : public Spiller {
254 const MRegisterInfo *MRI;
255 const TargetInstrInfo *TII;
257 bool runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM) {
258 RegMap = MF.getSSARegMap();
259 MRI = MF.getTarget().getRegisterInfo();
260 TII = MF.getTarget().getInstrInfo();
261 DOUT << "\n**** Local spiller rewriting function '"
262 << MF.getFunction()->getName() << "':\n";
263 DOUT << "**** Machine Instrs (NOTE! Does not include spills and reloads!) ****\n";
266 for (MachineFunction::iterator MBB = MF.begin(), E = MF.end();
268 RewriteMBB(*MBB, VRM);
270 DOUT << "**** Post Machine Instrs ****\n";
276 bool PrepForUnfoldOpti(MachineBasicBlock &MBB,
277 MachineBasicBlock::iterator &MII,
278 std::vector<MachineInstr*> &MaybeDeadStores,
279 AvailableSpills &Spills, BitVector &RegKills,
280 std::vector<MachineOperand*> &KillOps,
282 void SpillRegToStackSlot(MachineBasicBlock &MBB,
283 MachineBasicBlock::iterator &MII,
284 int Idx, unsigned PhysReg, int StackSlot,
285 const TargetRegisterClass *RC,
286 MachineInstr *&LastStore,
287 AvailableSpills &Spills,
288 SmallSet<MachineInstr*, 4> &ReMatDefs,
290 std::vector<MachineOperand*> &KillOps,
292 void RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM);
296 /// AvailableSpills - As the local spiller is scanning and rewriting an MBB from
297 /// top down, keep track of which spills slots or remat are available in each
300 /// Note that not all physregs are created equal here. In particular, some
301 /// physregs are reloads that we are allowed to clobber or ignore at any time.
302 /// Other physregs are values that the register allocated program is using that
303 /// we cannot CHANGE, but we can read if we like. We keep track of this on a
304 /// per-stack-slot / remat id basis as the low bit in the value of the
305 /// SpillSlotsAvailable entries. The predicate 'canClobberPhysReg()' checks
306 /// this bit and addAvailable sets it if.
308 class VISIBILITY_HIDDEN AvailableSpills {
309 const MRegisterInfo *MRI;
310 const TargetInstrInfo *TII;
312 // SpillSlotsOrReMatsAvailable - This map keeps track of all of the spilled
313 // or remat'ed virtual register values that are still available, due to being
314 // loaded or stored to, but not invalidated yet.
315 std::map<int, unsigned> SpillSlotsOrReMatsAvailable;
317 // PhysRegsAvailable - This is the inverse of SpillSlotsOrReMatsAvailable,
318 // indicating which stack slot values are currently held by a physreg. This
319 // is used to invalidate entries in SpillSlotsOrReMatsAvailable when a
320 // physreg is modified.
321 std::multimap<unsigned, int> PhysRegsAvailable;
323 void disallowClobberPhysRegOnly(unsigned PhysReg);
325 void ClobberPhysRegOnly(unsigned PhysReg);
327 AvailableSpills(const MRegisterInfo *mri, const TargetInstrInfo *tii)
328 : MRI(mri), TII(tii) {
331 const MRegisterInfo *getRegInfo() const { return MRI; }
333 /// getSpillSlotOrReMatPhysReg - If the specified stack slot or remat is
334 /// available in a physical register, return that PhysReg, otherwise
336 unsigned getSpillSlotOrReMatPhysReg(int Slot) const {
337 std::map<int, unsigned>::const_iterator I =
338 SpillSlotsOrReMatsAvailable.find(Slot);
339 if (I != SpillSlotsOrReMatsAvailable.end()) {
340 return I->second >> 1; // Remove the CanClobber bit.
345 /// addAvailable - Mark that the specified stack slot / remat is available in
346 /// the specified physreg. If CanClobber is true, the physreg can be modified
347 /// at any time without changing the semantics of the program.
348 void addAvailable(int SlotOrReMat, MachineInstr *MI, unsigned Reg,
349 bool CanClobber = true) {
350 // If this stack slot is thought to be available in some other physreg,
351 // remove its record.
352 ModifyStackSlotOrReMat(SlotOrReMat);
354 PhysRegsAvailable.insert(std::make_pair(Reg, SlotOrReMat));
355 SpillSlotsOrReMatsAvailable[SlotOrReMat]= (Reg << 1) | (unsigned)CanClobber;
357 if (SlotOrReMat > VirtRegMap::MAX_STACK_SLOT)
358 DOUT << "Remembering RM#" << SlotOrReMat-VirtRegMap::MAX_STACK_SLOT-1;
360 DOUT << "Remembering SS#" << SlotOrReMat;
361 DOUT << " in physreg " << MRI->getName(Reg) << "\n";
364 /// canClobberPhysReg - Return true if the spiller is allowed to change the
365 /// value of the specified stackslot register if it desires. The specified
366 /// stack slot must be available in a physreg for this query to make sense.
367 bool canClobberPhysReg(int SlotOrReMat) const {
368 assert(SpillSlotsOrReMatsAvailable.count(SlotOrReMat) &&
369 "Value not available!");
370 return SpillSlotsOrReMatsAvailable.find(SlotOrReMat)->second & 1;
373 /// disallowClobberPhysReg - Unset the CanClobber bit of the specified
374 /// stackslot register. The register is still available but is no longer
375 /// allowed to be modifed.
376 void disallowClobberPhysReg(unsigned PhysReg);
378 /// ClobberPhysReg - This is called when the specified physreg changes
379 /// value. We use this to invalidate any info about stuff that lives in
380 /// it and any of its aliases.
381 void ClobberPhysReg(unsigned PhysReg);
383 /// ModifyStackSlotOrReMat - This method is called when the value in a stack
384 /// slot changes. This removes information about which register the previous
385 /// value for this slot lives in (as the previous value is dead now).
386 void ModifyStackSlotOrReMat(int SlotOrReMat);
390 /// disallowClobberPhysRegOnly - Unset the CanClobber bit of the specified
391 /// stackslot register. The register is still available but is no longer
392 /// allowed to be modifed.
393 void AvailableSpills::disallowClobberPhysRegOnly(unsigned PhysReg) {
394 std::multimap<unsigned, int>::iterator I =
395 PhysRegsAvailable.lower_bound(PhysReg);
396 while (I != PhysRegsAvailable.end() && I->first == PhysReg) {
397 int SlotOrReMat = I->second;
399 assert((SpillSlotsOrReMatsAvailable[SlotOrReMat] >> 1) == PhysReg &&
400 "Bidirectional map mismatch!");
401 SpillSlotsOrReMatsAvailable[SlotOrReMat] &= ~1;
402 DOUT << "PhysReg " << MRI->getName(PhysReg)
403 << " copied, it is available for use but can no longer be modified\n";
407 /// disallowClobberPhysReg - Unset the CanClobber bit of the specified
408 /// stackslot register and its aliases. The register and its aliases may
409 /// still available but is no longer allowed to be modifed.
410 void AvailableSpills::disallowClobberPhysReg(unsigned PhysReg) {
411 for (const unsigned *AS = MRI->getAliasSet(PhysReg); *AS; ++AS)
412 disallowClobberPhysRegOnly(*AS);
413 disallowClobberPhysRegOnly(PhysReg);
416 /// ClobberPhysRegOnly - This is called when the specified physreg changes
417 /// value. We use this to invalidate any info about stuff we thing lives in it.
418 void AvailableSpills::ClobberPhysRegOnly(unsigned PhysReg) {
419 std::multimap<unsigned, int>::iterator I =
420 PhysRegsAvailable.lower_bound(PhysReg);
421 while (I != PhysRegsAvailable.end() && I->first == PhysReg) {
422 int SlotOrReMat = I->second;
423 PhysRegsAvailable.erase(I++);
424 assert((SpillSlotsOrReMatsAvailable[SlotOrReMat] >> 1) == PhysReg &&
425 "Bidirectional map mismatch!");
426 SpillSlotsOrReMatsAvailable.erase(SlotOrReMat);
427 DOUT << "PhysReg " << MRI->getName(PhysReg)
428 << " clobbered, invalidating ";
429 if (SlotOrReMat > VirtRegMap::MAX_STACK_SLOT)
430 DOUT << "RM#" << SlotOrReMat-VirtRegMap::MAX_STACK_SLOT-1 << "\n";
432 DOUT << "SS#" << SlotOrReMat << "\n";
436 /// ClobberPhysReg - This is called when the specified physreg changes
437 /// value. We use this to invalidate any info about stuff we thing lives in
438 /// it and any of its aliases.
439 void AvailableSpills::ClobberPhysReg(unsigned PhysReg) {
440 for (const unsigned *AS = MRI->getAliasSet(PhysReg); *AS; ++AS)
441 ClobberPhysRegOnly(*AS);
442 ClobberPhysRegOnly(PhysReg);
445 /// ModifyStackSlotOrReMat - This method is called when the value in a stack
446 /// slot changes. This removes information about which register the previous
447 /// value for this slot lives in (as the previous value is dead now).
448 void AvailableSpills::ModifyStackSlotOrReMat(int SlotOrReMat) {
449 std::map<int, unsigned>::iterator It =
450 SpillSlotsOrReMatsAvailable.find(SlotOrReMat);
451 if (It == SpillSlotsOrReMatsAvailable.end()) return;
452 unsigned Reg = It->second >> 1;
453 SpillSlotsOrReMatsAvailable.erase(It);
455 // This register may hold the value of multiple stack slots, only remove this
456 // stack slot from the set of values the register contains.
457 std::multimap<unsigned, int>::iterator I = PhysRegsAvailable.lower_bound(Reg);
459 assert(I != PhysRegsAvailable.end() && I->first == Reg &&
460 "Map inverse broken!");
461 if (I->second == SlotOrReMat) break;
463 PhysRegsAvailable.erase(I);
468 /// InvalidateKills - MI is going to be deleted. If any of its operands are
469 /// marked kill, then invalidate the information.
470 static void InvalidateKills(MachineInstr &MI, BitVector &RegKills,
471 std::vector<MachineOperand*> &KillOps,
472 SmallVector<unsigned, 2> *KillRegs = NULL) {
473 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
474 MachineOperand &MO = MI.getOperand(i);
475 if (!MO.isRegister() || !MO.isUse() || !MO.isKill())
477 unsigned Reg = MO.getReg();
479 KillRegs->push_back(Reg);
480 if (KillOps[Reg] == &MO) {
487 /// InvalidateRegDef - If the def operand of the specified def MI is now dead
488 /// (since it's spill instruction is removed), mark it isDead. Also checks if
489 /// the def MI has other definition operands that are not dead. Returns it by
491 static bool InvalidateRegDef(MachineBasicBlock::iterator I,
492 MachineInstr &NewDef, unsigned Reg,
494 // Due to remat, it's possible this reg isn't being reused. That is,
495 // the def of this reg (by prev MI) is now dead.
496 MachineInstr *DefMI = I;
497 MachineOperand *DefOp = NULL;
498 for (unsigned i = 0, e = DefMI->getNumOperands(); i != e; ++i) {
499 MachineOperand &MO = DefMI->getOperand(i);
500 if (MO.isRegister() && MO.isDef()) {
501 if (MO.getReg() == Reg)
503 else if (!MO.isDead())
510 bool FoundUse = false, Done = false;
511 MachineBasicBlock::iterator E = NewDef;
513 for (; !Done && I != E; ++I) {
514 MachineInstr *NMI = I;
515 for (unsigned j = 0, ee = NMI->getNumOperands(); j != ee; ++j) {
516 MachineOperand &MO = NMI->getOperand(j);
517 if (!MO.isRegister() || MO.getReg() != Reg)
521 Done = true; // Stop after scanning all the operands of this MI.
532 /// UpdateKills - Track and update kill info. If a MI reads a register that is
533 /// marked kill, then it must be due to register reuse. Transfer the kill info
535 static void UpdateKills(MachineInstr &MI, BitVector &RegKills,
536 std::vector<MachineOperand*> &KillOps) {
537 const TargetInstrDescriptor *TID = MI.getInstrDescriptor();
538 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
539 MachineOperand &MO = MI.getOperand(i);
540 if (!MO.isRegister() || !MO.isUse())
542 unsigned Reg = MO.getReg();
547 // That can't be right. Register is killed but not re-defined and it's
548 // being reused. Let's fix that.
549 KillOps[Reg]->unsetIsKill();
550 if (i < TID->numOperands &&
551 TID->getOperandConstraint(i, TOI::TIED_TO) == -1)
552 // Unless it's a two-address operand, this is the new kill.
562 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
563 const MachineOperand &MO = MI.getOperand(i);
564 if (!MO.isRegister() || !MO.isDef())
566 unsigned Reg = MO.getReg();
573 // ReusedOp - For each reused operand, we keep track of a bit of information, in
574 // case we need to rollback upon processing a new operand. See comments below.
577 // The MachineInstr operand that reused an available value.
580 // StackSlotOrReMat - The spill slot or remat id of the value being reused.
581 unsigned StackSlotOrReMat;
583 // PhysRegReused - The physical register the value was available in.
584 unsigned PhysRegReused;
586 // AssignedPhysReg - The physreg that was assigned for use by the reload.
587 unsigned AssignedPhysReg;
589 // VirtReg - The virtual register itself.
592 ReusedOp(unsigned o, unsigned ss, unsigned prr, unsigned apr,
594 : Operand(o), StackSlotOrReMat(ss), PhysRegReused(prr),
595 AssignedPhysReg(apr), VirtReg(vreg) {}
598 /// ReuseInfo - This maintains a collection of ReuseOp's for each operand that
599 /// is reused instead of reloaded.
600 class VISIBILITY_HIDDEN ReuseInfo {
602 std::vector<ReusedOp> Reuses;
603 BitVector PhysRegsClobbered;
605 ReuseInfo(MachineInstr &mi, const MRegisterInfo *mri) : MI(mi) {
606 PhysRegsClobbered.resize(mri->getNumRegs());
609 bool hasReuses() const {
610 return !Reuses.empty();
613 /// addReuse - If we choose to reuse a virtual register that is already
614 /// available instead of reloading it, remember that we did so.
615 void addReuse(unsigned OpNo, unsigned StackSlotOrReMat,
616 unsigned PhysRegReused, unsigned AssignedPhysReg,
618 // If the reload is to the assigned register anyway, no undo will be
620 if (PhysRegReused == AssignedPhysReg) return;
622 // Otherwise, remember this.
623 Reuses.push_back(ReusedOp(OpNo, StackSlotOrReMat, PhysRegReused,
624 AssignedPhysReg, VirtReg));
627 void markClobbered(unsigned PhysReg) {
628 PhysRegsClobbered.set(PhysReg);
631 bool isClobbered(unsigned PhysReg) const {
632 return PhysRegsClobbered.test(PhysReg);
635 /// GetRegForReload - We are about to emit a reload into PhysReg. If there
636 /// is some other operand that is using the specified register, either pick
637 /// a new register to use, or evict the previous reload and use this reg.
638 unsigned GetRegForReload(unsigned PhysReg, MachineInstr *MI,
639 AvailableSpills &Spills,
640 std::vector<MachineInstr*> &MaybeDeadStores,
641 SmallSet<unsigned, 8> &Rejected,
643 std::vector<MachineOperand*> &KillOps,
645 if (Reuses.empty()) return PhysReg; // This is most often empty.
647 for (unsigned ro = 0, e = Reuses.size(); ro != e; ++ro) {
648 ReusedOp &Op = Reuses[ro];
649 // If we find some other reuse that was supposed to use this register
650 // exactly for its reload, we can change this reload to use ITS reload
651 // register. That is, unless its reload register has already been
652 // considered and subsequently rejected because it has also been reused
653 // by another operand.
654 if (Op.PhysRegReused == PhysReg &&
655 Rejected.count(Op.AssignedPhysReg) == 0) {
656 // Yup, use the reload register that we didn't use before.
657 unsigned NewReg = Op.AssignedPhysReg;
658 Rejected.insert(PhysReg);
659 return GetRegForReload(NewReg, MI, Spills, MaybeDeadStores, Rejected,
660 RegKills, KillOps, VRM);
662 // Otherwise, we might also have a problem if a previously reused
663 // value aliases the new register. If so, codegen the previous reload
665 unsigned PRRU = Op.PhysRegReused;
666 const MRegisterInfo *MRI = Spills.getRegInfo();
667 if (MRI->areAliases(PRRU, PhysReg)) {
668 // Okay, we found out that an alias of a reused register
669 // was used. This isn't good because it means we have
670 // to undo a previous reuse.
671 MachineBasicBlock *MBB = MI->getParent();
672 const TargetRegisterClass *AliasRC =
673 MBB->getParent()->getSSARegMap()->getRegClass(Op.VirtReg);
675 // Copy Op out of the vector and remove it, we're going to insert an
676 // explicit load for it.
678 Reuses.erase(Reuses.begin()+ro);
680 // Ok, we're going to try to reload the assigned physreg into the
681 // slot that we were supposed to in the first place. However, that
682 // register could hold a reuse. Check to see if it conflicts or
683 // would prefer us to use a different register.
684 unsigned NewPhysReg = GetRegForReload(NewOp.AssignedPhysReg,
685 MI, Spills, MaybeDeadStores,
686 Rejected, RegKills, KillOps, VRM);
688 if (NewOp.StackSlotOrReMat > VirtRegMap::MAX_STACK_SLOT) {
689 MRI->reMaterialize(*MBB, MI, NewPhysReg,
690 VRM.getReMaterializedMI(NewOp.VirtReg));
693 MRI->loadRegFromStackSlot(*MBB, MI, NewPhysReg,
694 NewOp.StackSlotOrReMat, AliasRC);
695 // Any stores to this stack slot are not dead anymore.
696 MaybeDeadStores[NewOp.StackSlotOrReMat] = NULL;
699 Spills.ClobberPhysReg(NewPhysReg);
700 Spills.ClobberPhysReg(NewOp.PhysRegReused);
702 MI->getOperand(NewOp.Operand).setReg(NewPhysReg);
704 Spills.addAvailable(NewOp.StackSlotOrReMat, MI, NewPhysReg);
705 MachineBasicBlock::iterator MII = MI;
707 UpdateKills(*MII, RegKills, KillOps);
708 DOUT << '\t' << *MII;
710 DOUT << "Reuse undone!\n";
713 // Finally, PhysReg is now available, go ahead and use it.
721 /// GetRegForReload - Helper for the above GetRegForReload(). Add a
722 /// 'Rejected' set to remember which registers have been considered and
723 /// rejected for the reload. This avoids infinite looping in case like
726 /// t2 <- assigned r0 for use by the reload but ended up reuse r1
727 /// t3 <- assigned r1 for use by the reload but ended up reuse r0
729 /// sees r1 is taken by t2, tries t2's reload register r0
730 /// sees r0 is taken by t3, tries t3's reload register r1
731 /// sees r1 is taken by t2, tries t2's reload register r0 ...
732 unsigned GetRegForReload(unsigned PhysReg, MachineInstr *MI,
733 AvailableSpills &Spills,
734 std::vector<MachineInstr*> &MaybeDeadStores,
736 std::vector<MachineOperand*> &KillOps,
738 SmallSet<unsigned, 8> Rejected;
739 return GetRegForReload(PhysReg, MI, Spills, MaybeDeadStores, Rejected,
740 RegKills, KillOps, VRM);
745 /// PrepForUnfoldOpti - Turn a store folding instruction into a load folding
746 /// instruction. e.g.
748 /// movl %eax, -32(%ebp)
749 /// movl -36(%ebp), %eax
750 /// orl %eax, -32(%ebp)
753 /// orl -36(%ebp), %eax
754 /// mov %eax, -32(%ebp)
755 /// This enables unfolding optimization for a subsequent instruction which will
756 /// also eliminate the newly introduced store instruction.
757 bool LocalSpiller::PrepForUnfoldOpti(MachineBasicBlock &MBB,
758 MachineBasicBlock::iterator &MII,
759 std::vector<MachineInstr*> &MaybeDeadStores,
760 AvailableSpills &Spills,
762 std::vector<MachineOperand*> &KillOps,
764 MachineFunction &MF = *MBB.getParent();
765 MachineInstr &MI = *MII;
766 unsigned UnfoldedOpc = 0;
767 unsigned UnfoldPR = 0;
768 unsigned UnfoldVR = 0;
769 int FoldedSS = VirtRegMap::NO_STACK_SLOT;
770 VirtRegMap::MI2VirtMapTy::const_iterator I, End;
771 for (tie(I, End) = VRM.getFoldedVirts(&MI); I != End; ++I) {
772 // Only transform a MI that folds a single register.
775 UnfoldVR = I->second.first;
776 VirtRegMap::ModRef MR = I->second.second;
777 if (VRM.isAssignedReg(UnfoldVR))
779 // If this reference is not a use, any previous store is now dead.
780 // Otherwise, the store to this stack slot is not dead anymore.
781 FoldedSS = VRM.getStackSlot(UnfoldVR);
782 MachineInstr* DeadStore = MaybeDeadStores[FoldedSS];
783 if (DeadStore && (MR & VirtRegMap::isModRef)) {
784 unsigned PhysReg = Spills.getSpillSlotOrReMatPhysReg(FoldedSS);
786 DeadStore->findRegisterUseOperandIdx(PhysReg, true) == -1)
789 UnfoldedOpc = MRI->getOpcodeAfterMemoryUnfold(MI.getOpcode(),
797 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
798 MachineOperand &MO = MI.getOperand(i);
799 if (!MO.isRegister() || MO.getReg() == 0 || !MO.isUse())
801 unsigned VirtReg = MO.getReg();
802 if (MRegisterInfo::isPhysicalRegister(VirtReg) || MO.getSubReg())
804 if (VRM.isAssignedReg(VirtReg)) {
805 unsigned PhysReg = VRM.getPhys(VirtReg);
806 if (PhysReg && MRI->regsOverlap(PhysReg, UnfoldPR))
808 } else if (VRM.isReMaterialized(VirtReg))
810 int SS = VRM.getStackSlot(VirtReg);
811 unsigned PhysReg = Spills.getSpillSlotOrReMatPhysReg(SS);
813 if (MRI->regsOverlap(PhysReg, UnfoldPR))
817 PhysReg = VRM.getPhys(VirtReg);
818 if (!MRI->regsOverlap(PhysReg, UnfoldPR))
821 // Ok, we'll need to reload the value into a register which makes
822 // it impossible to perform the store unfolding optimization later.
823 // Let's see if it is possible to fold the load if the store is
824 // unfolded. This allows us to perform the store unfolding
826 SmallVector<MachineInstr*, 4> NewMIs;
827 if (MRI->unfoldMemoryOperand(MF, &MI, UnfoldVR, false, false, NewMIs)) {
828 assert(NewMIs.size() == 1);
829 MachineInstr *NewMI = NewMIs.back();
831 int Idx = NewMI->findRegisterUseOperandIdx(VirtReg);
833 MachineInstr *FoldedMI = MRI->foldMemoryOperand(NewMI, Idx, SS);
835 if (!VRM.hasPhys(UnfoldVR))
836 VRM.assignVirt2Phys(UnfoldVR, UnfoldPR);
837 VRM.virtFolded(VirtReg, FoldedMI, VirtRegMap::isRef);
838 MII = MBB.insert(MII, FoldedMI);
839 VRM.RemoveMachineInstrFromMaps(&MI);
849 /// findSuperReg - Find the SubReg's super-register of given register class
850 /// where its SubIdx sub-register is SubReg.
851 static unsigned findSuperReg(const TargetRegisterClass *RC, unsigned SubReg,
852 unsigned SubIdx, const MRegisterInfo *MRI) {
853 for (TargetRegisterClass::iterator I = RC->begin(), E = RC->end();
856 if (MRI->getSubReg(Reg, SubIdx) == SubReg)
862 /// SpillRegToStackSlot - Spill a register to a specified stack slot. Check if
863 /// the last store to the same slot is now dead. If so, remove the last store.
864 void LocalSpiller::SpillRegToStackSlot(MachineBasicBlock &MBB,
865 MachineBasicBlock::iterator &MII,
866 int Idx, unsigned PhysReg, int StackSlot,
867 const TargetRegisterClass *RC,
868 MachineInstr *&LastStore,
869 AvailableSpills &Spills,
870 SmallSet<MachineInstr*, 4> &ReMatDefs,
872 std::vector<MachineOperand*> &KillOps,
874 MRI->storeRegToStackSlot(MBB, next(MII), PhysReg, StackSlot, RC);
875 DOUT << "Store:\t" << *next(MII);
877 // If there is a dead store to this stack slot, nuke it now.
879 DOUT << "Removed dead store:\t" << *LastStore;
881 SmallVector<unsigned, 2> KillRegs;
882 InvalidateKills(*LastStore, RegKills, KillOps, &KillRegs);
883 MachineBasicBlock::iterator PrevMII = LastStore;
884 bool CheckDef = PrevMII != MBB.begin();
887 MBB.erase(LastStore);
888 VRM.RemoveMachineInstrFromMaps(LastStore);
890 // Look at defs of killed registers on the store. Mark the defs
891 // as dead since the store has been deleted and they aren't
893 for (unsigned j = 0, ee = KillRegs.size(); j != ee; ++j) {
894 bool HasOtherDef = false;
895 if (InvalidateRegDef(PrevMII, *MII, KillRegs[j], HasOtherDef)) {
896 MachineInstr *DeadDef = PrevMII;
897 if (ReMatDefs.count(DeadDef) && !HasOtherDef) {
898 // FIXME: This assumes a remat def does not have side
901 VRM.RemoveMachineInstrFromMaps(DeadDef);
909 LastStore = next(MII);
911 // If the stack slot value was previously available in some other
912 // register, change it now. Otherwise, make the register available,
914 Spills.ModifyStackSlotOrReMat(StackSlot);
915 Spills.ClobberPhysReg(PhysReg);
916 Spills.addAvailable(StackSlot, LastStore, PhysReg);
920 /// rewriteMBB - Keep track of which spills are available even after the
921 /// register allocator is done with them. If possible, avid reloading vregs.
922 void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM) {
923 DOUT << MBB.getBasicBlock()->getName() << ":\n";
925 MachineFunction &MF = *MBB.getParent();
927 // Spills - Keep track of which spilled values are available in physregs so
928 // that we can choose to reuse the physregs instead of emitting reloads.
929 AvailableSpills Spills(MRI, TII);
931 // MaybeDeadStores - When we need to write a value back into a stack slot,
932 // keep track of the inserted store. If the stack slot value is never read
933 // (because the value was used from some available register, for example), and
934 // subsequently stored to, the original store is dead. This map keeps track
935 // of inserted stores that are not used. If we see a subsequent store to the
936 // same stack slot, the original store is deleted.
937 std::vector<MachineInstr*> MaybeDeadStores;
938 MaybeDeadStores.resize(MF.getFrameInfo()->getObjectIndexEnd(), NULL);
940 // ReMatDefs - These are rematerializable def MIs which are not deleted.
941 SmallSet<MachineInstr*, 4> ReMatDefs;
943 // Keep track of kill information.
944 BitVector RegKills(MRI->getNumRegs());
945 std::vector<MachineOperand*> KillOps;
946 KillOps.resize(MRI->getNumRegs(), NULL);
948 for (MachineBasicBlock::iterator MII = MBB.begin(), E = MBB.end();
950 MachineBasicBlock::iterator NextMII = MII; ++NextMII;
952 VirtRegMap::MI2VirtMapTy::const_iterator I, End;
954 bool BackTracked = false;
955 if (PrepForUnfoldOpti(MBB, MII,
956 MaybeDeadStores, Spills, RegKills, KillOps, VRM))
959 MachineInstr &MI = *MII;
960 const TargetInstrDescriptor *TID = MI.getInstrDescriptor();
962 // Insert restores here if asked to.
963 if (VRM.isRestorePt(&MI)) {
964 std::vector<unsigned> &RestoreRegs = VRM.getRestorePtRestores(&MI);
965 for (unsigned i = 0, e = RestoreRegs.size(); i != e; ++i) {
966 unsigned VirtReg = RestoreRegs[i];
967 if (!VRM.getPreSplitReg(VirtReg))
968 continue; // Split interval spilled again.
969 unsigned Phys = VRM.getPhys(VirtReg);
970 MF.setPhysRegUsed(Phys);
971 if (VRM.isReMaterialized(VirtReg)) {
972 MRI->reMaterialize(MBB, &MI, Phys,
973 VRM.getReMaterializedMI(VirtReg));
976 const TargetRegisterClass* RC = RegMap->getRegClass(VirtReg);
977 MRI->loadRegFromStackSlot(MBB, &MI, Phys, VRM.getStackSlot(VirtReg), RC);
980 // This invalidates Phys.
981 Spills.ClobberPhysReg(Phys);
982 UpdateKills(*prior(MII), RegKills, KillOps);
983 DOUT << '\t' << *prior(MII);
987 // Insert spills here if asked to.
988 if (VRM.isSpillPt(&MI)) {
989 std::vector<unsigned> &SpillRegs = VRM.getSpillPtSpills(&MI);
990 for (unsigned i = 0, e = SpillRegs.size(); i != e; ++i) {
991 unsigned VirtReg = SpillRegs[i];
992 if (!VRM.getPreSplitReg(VirtReg))
993 continue; // Split interval spilled again.
994 const TargetRegisterClass *RC = RegMap->getRegClass(VirtReg);
995 unsigned Phys = VRM.getPhys(VirtReg);
996 int StackSlot = VRM.getStackSlot(VirtReg);
997 MachineInstr *&LastStore = MaybeDeadStores[StackSlot];
998 SpillRegToStackSlot(MBB, MII, i, Phys, StackSlot, RC,
999 LastStore, Spills, ReMatDefs, RegKills, KillOps, VRM);
1003 /// ReusedOperands - Keep track of operand reuse in case we need to undo
1005 ReuseInfo ReusedOperands(MI, MRI);
1006 // Process all of the spilled uses and all non spilled reg references.
1007 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
1008 MachineOperand &MO = MI.getOperand(i);
1009 if (!MO.isRegister() || MO.getReg() == 0)
1010 continue; // Ignore non-register operands.
1012 unsigned VirtReg = MO.getReg();
1013 if (MRegisterInfo::isPhysicalRegister(VirtReg)) {
1014 // Ignore physregs for spilling, but remember that it is used by this
1016 MF.setPhysRegUsed(VirtReg);
1020 assert(MRegisterInfo::isVirtualRegister(VirtReg) &&
1021 "Not a virtual or a physical register?");
1023 unsigned SubIdx = MO.getSubReg();
1024 if (VRM.isAssignedReg(VirtReg)) {
1025 // This virtual register was assigned a physreg!
1026 unsigned Phys = VRM.getPhys(VirtReg);
1027 MF.setPhysRegUsed(Phys);
1029 ReusedOperands.markClobbered(Phys);
1030 unsigned RReg = SubIdx ? MRI->getSubReg(Phys, SubIdx) : Phys;
1031 MI.getOperand(i).setReg(RReg);
1035 // This virtual register is now known to be a spilled value.
1037 continue; // Handle defs in the loop below (handle use&def here though)
1039 bool DoReMat = VRM.isReMaterialized(VirtReg);
1040 int SSorRMId = DoReMat
1041 ? VRM.getReMatId(VirtReg) : VRM.getStackSlot(VirtReg);
1042 int ReuseSlot = SSorRMId;
1044 // Check to see if this stack slot is available.
1045 unsigned PhysReg = Spills.getSpillSlotOrReMatPhysReg(SSorRMId);
1046 if (!PhysReg && DoReMat) {
1047 // This use is rematerializable. But perhaps the value is available in
1048 // a register if the definition is not deleted. If so, check if we can
1050 ReuseSlot = VRM.getStackSlot(VirtReg);
1051 if (ReuseSlot != VirtRegMap::NO_STACK_SLOT)
1052 PhysReg = Spills.getSpillSlotOrReMatPhysReg(ReuseSlot);
1055 // If this is a sub-register use, make sure the reuse register is in the
1056 // right register class. For example, for x86 not all of the 32-bit
1057 // registers have accessible sub-registers.
1058 // Similarly so for EXTRACT_SUBREG. Consider this:
1060 // MOV32_mr fi#1, EDI
1062 // = EXTRACT_SUBREG fi#1
1063 // fi#1 is available in EDI, but it cannot be reused because it's not in
1064 // the right register file.
1066 (SubIdx || MI.getOpcode() == TargetInstrInfo::EXTRACT_SUBREG)) {
1067 const TargetRegisterClass* RC = RegMap->getRegClass(VirtReg);
1068 if (!RC->contains(PhysReg))
1073 // This spilled operand might be part of a two-address operand. If this
1074 // is the case, then changing it will necessarily require changing the
1075 // def part of the instruction as well. However, in some cases, we
1076 // aren't allowed to modify the reused register. If none of these cases
1078 bool CanReuse = true;
1079 int ti = TID->getOperandConstraint(i, TOI::TIED_TO);
1081 MI.getOperand(ti).isRegister() &&
1082 MI.getOperand(ti).getReg() == VirtReg) {
1083 // Okay, we have a two address operand. We can reuse this physreg as
1084 // long as we are allowed to clobber the value and there isn't an
1085 // earlier def that has already clobbered the physreg.
1086 CanReuse = Spills.canClobberPhysReg(ReuseSlot) &&
1087 !ReusedOperands.isClobbered(PhysReg);
1091 // If this stack slot value is already available, reuse it!
1092 if (ReuseSlot > VirtRegMap::MAX_STACK_SLOT)
1093 DOUT << "Reusing RM#" << ReuseSlot-VirtRegMap::MAX_STACK_SLOT-1;
1095 DOUT << "Reusing SS#" << ReuseSlot;
1096 DOUT << " from physreg "
1097 << MRI->getName(PhysReg) << " for vreg"
1098 << VirtReg <<" instead of reloading into physreg "
1099 << MRI->getName(VRM.getPhys(VirtReg)) << "\n";
1100 unsigned RReg = SubIdx ? MRI->getSubReg(PhysReg, SubIdx) : PhysReg;
1101 MI.getOperand(i).setReg(RReg);
1103 // The only technical detail we have is that we don't know that
1104 // PhysReg won't be clobbered by a reloaded stack slot that occurs
1105 // later in the instruction. In particular, consider 'op V1, V2'.
1106 // If V1 is available in physreg R0, we would choose to reuse it
1107 // here, instead of reloading it into the register the allocator
1108 // indicated (say R1). However, V2 might have to be reloaded
1109 // later, and it might indicate that it needs to live in R0. When
1110 // this occurs, we need to have information available that
1111 // indicates it is safe to use R1 for the reload instead of R0.
1113 // To further complicate matters, we might conflict with an alias,
1114 // or R0 and R1 might not be compatible with each other. In this
1115 // case, we actually insert a reload for V1 in R1, ensuring that
1116 // we can get at R0 or its alias.
1117 ReusedOperands.addReuse(i, ReuseSlot, PhysReg,
1118 VRM.getPhys(VirtReg), VirtReg);
1120 // Only mark it clobbered if this is a use&def operand.
1121 ReusedOperands.markClobbered(PhysReg);
1124 if (MI.getOperand(i).isKill() &&
1125 ReuseSlot <= VirtRegMap::MAX_STACK_SLOT) {
1126 // This was the last use and the spilled value is still available
1127 // for reuse. That means the spill was unnecessary!
1128 MachineInstr* DeadStore = MaybeDeadStores[ReuseSlot];
1130 DOUT << "Removed dead store:\t" << *DeadStore;
1131 InvalidateKills(*DeadStore, RegKills, KillOps);
1132 VRM.RemoveMachineInstrFromMaps(DeadStore);
1133 MBB.erase(DeadStore);
1134 MaybeDeadStores[ReuseSlot] = NULL;
1141 // Otherwise we have a situation where we have a two-address instruction
1142 // whose mod/ref operand needs to be reloaded. This reload is already
1143 // available in some register "PhysReg", but if we used PhysReg as the
1144 // operand to our 2-addr instruction, the instruction would modify
1145 // PhysReg. This isn't cool if something later uses PhysReg and expects
1146 // to get its initial value.
1148 // To avoid this problem, and to avoid doing a load right after a store,
1149 // we emit a copy from PhysReg into the designated register for this
1151 unsigned DesignatedReg = VRM.getPhys(VirtReg);
1152 assert(DesignatedReg && "Must map virtreg to physreg!");
1154 // Note that, if we reused a register for a previous operand, the
1155 // register we want to reload into might not actually be
1156 // available. If this occurs, use the register indicated by the
1158 if (ReusedOperands.hasReuses())
1159 DesignatedReg = ReusedOperands.GetRegForReload(DesignatedReg, &MI,
1160 Spills, MaybeDeadStores, RegKills, KillOps, VRM);
1162 // If the mapped designated register is actually the physreg we have
1163 // incoming, we don't need to inserted a dead copy.
1164 if (DesignatedReg == PhysReg) {
1165 // If this stack slot value is already available, reuse it!
1166 if (ReuseSlot > VirtRegMap::MAX_STACK_SLOT)
1167 DOUT << "Reusing RM#" << ReuseSlot-VirtRegMap::MAX_STACK_SLOT-1;
1169 DOUT << "Reusing SS#" << ReuseSlot;
1170 DOUT << " from physreg " << MRI->getName(PhysReg) << " for vreg"
1172 << " instead of reloading into same physreg.\n";
1173 unsigned RReg = SubIdx ? MRI->getSubReg(PhysReg, SubIdx) : PhysReg;
1174 MI.getOperand(i).setReg(RReg);
1175 ReusedOperands.markClobbered(RReg);
1180 const TargetRegisterClass* RC = RegMap->getRegClass(VirtReg);
1181 MF.setPhysRegUsed(DesignatedReg);
1182 ReusedOperands.markClobbered(DesignatedReg);
1183 MRI->copyRegToReg(MBB, &MI, DesignatedReg, PhysReg, RC, RC);
1185 MachineInstr *CopyMI = prior(MII);
1186 UpdateKills(*CopyMI, RegKills, KillOps);
1188 // This invalidates DesignatedReg.
1189 Spills.ClobberPhysReg(DesignatedReg);
1191 Spills.addAvailable(ReuseSlot, &MI, DesignatedReg);
1193 SubIdx ? MRI->getSubReg(DesignatedReg, SubIdx) : DesignatedReg;
1194 MI.getOperand(i).setReg(RReg);
1195 DOUT << '\t' << *prior(MII);
1200 // Otherwise, reload it and remember that we have it.
1201 PhysReg = VRM.getPhys(VirtReg);
1202 assert(PhysReg && "Must map virtreg to physreg!");
1204 // Note that, if we reused a register for a previous operand, the
1205 // register we want to reload into might not actually be
1206 // available. If this occurs, use the register indicated by the
1208 if (ReusedOperands.hasReuses())
1209 PhysReg = ReusedOperands.GetRegForReload(PhysReg, &MI,
1210 Spills, MaybeDeadStores, RegKills, KillOps, VRM);
1212 MF.setPhysRegUsed(PhysReg);
1213 ReusedOperands.markClobbered(PhysReg);
1215 MRI->reMaterialize(MBB, &MI, PhysReg, VRM.getReMaterializedMI(VirtReg));
1218 const TargetRegisterClass* RC = RegMap->getRegClass(VirtReg);
1219 MRI->loadRegFromStackSlot(MBB, &MI, PhysReg, SSorRMId, RC);
1222 // This invalidates PhysReg.
1223 Spills.ClobberPhysReg(PhysReg);
1225 // Any stores to this stack slot are not dead anymore.
1227 MaybeDeadStores[SSorRMId] = NULL;
1228 Spills.addAvailable(SSorRMId, &MI, PhysReg);
1229 // Assumes this is the last use. IsKill will be unset if reg is reused
1230 // unless it's a two-address operand.
1231 if (TID->getOperandConstraint(i, TOI::TIED_TO) == -1)
1232 MI.getOperand(i).setIsKill();
1233 unsigned RReg = SubIdx ? MRI->getSubReg(PhysReg, SubIdx) : PhysReg;
1234 MI.getOperand(i).setReg(RReg);
1235 UpdateKills(*prior(MII), RegKills, KillOps);
1236 DOUT << '\t' << *prior(MII);
1242 // If we have folded references to memory operands, make sure we clear all
1243 // physical registers that may contain the value of the spilled virtual
1245 SmallSet<int, 2> FoldedSS;
1246 for (tie(I, End) = VRM.getFoldedVirts(&MI); I != End; ++I) {
1247 unsigned VirtReg = I->second.first;
1248 VirtRegMap::ModRef MR = I->second.second;
1249 DOUT << "Folded vreg: " << VirtReg << " MR: " << MR;
1251 int SS = VRM.getStackSlot(VirtReg);
1252 if (SS == VirtRegMap::NO_STACK_SLOT)
1254 FoldedSS.insert(SS);
1255 DOUT << " - StackSlot: " << SS << "\n";
1257 // If this folded instruction is just a use, check to see if it's a
1258 // straight load from the virt reg slot.
1259 if ((MR & VirtRegMap::isRef) && !(MR & VirtRegMap::isMod)) {
1261 unsigned DestReg = TII->isLoadFromStackSlot(&MI, FrameIdx);
1262 if (DestReg && FrameIdx == SS) {
1263 // If this spill slot is available, turn it into a copy (or nothing)
1264 // instead of leaving it as a load!
1265 if (unsigned InReg = Spills.getSpillSlotOrReMatPhysReg(SS)) {
1266 DOUT << "Promoted Load To Copy: " << MI;
1267 if (DestReg != InReg) {
1268 const TargetRegisterClass *RC = RegMap->getRegClass(VirtReg);
1269 MRI->copyRegToReg(MBB, &MI, DestReg, InReg, RC, RC);
1270 // Revisit the copy so we make sure to notice the effects of the
1271 // operation on the destreg (either needing to RA it if it's
1272 // virtual or needing to clobber any values if it's physical).
1274 --NextMII; // backtrack to the copy.
1277 DOUT << "Removing now-noop copy: " << MI;
1279 VRM.RemoveMachineInstrFromMaps(&MI);
1282 goto ProcessNextInst;
1285 unsigned PhysReg = Spills.getSpillSlotOrReMatPhysReg(SS);
1286 SmallVector<MachineInstr*, 4> NewMIs;
1288 MRI->unfoldMemoryOperand(MF, &MI, PhysReg, false, false, NewMIs)) {
1289 MBB.insert(MII, NewMIs[0]);
1290 VRM.RemoveMachineInstrFromMaps(&MI);
1293 --NextMII; // backtrack to the unfolded instruction.
1295 goto ProcessNextInst;
1300 // If this reference is not a use, any previous store is now dead.
1301 // Otherwise, the store to this stack slot is not dead anymore.
1302 MachineInstr* DeadStore = MaybeDeadStores[SS];
1304 bool isDead = !(MR & VirtRegMap::isRef);
1305 MachineInstr *NewStore = NULL;
1306 if (MR & VirtRegMap::isModRef) {
1307 unsigned PhysReg = Spills.getSpillSlotOrReMatPhysReg(SS);
1308 SmallVector<MachineInstr*, 4> NewMIs;
1310 DeadStore->findRegisterUseOperandIdx(PhysReg, true) != -1 &&
1311 MRI->unfoldMemoryOperand(MF, &MI, PhysReg, false, true, NewMIs)) {
1312 MBB.insert(MII, NewMIs[0]);
1313 NewStore = NewMIs[1];
1314 MBB.insert(MII, NewStore);
1315 VRM.RemoveMachineInstrFromMaps(&MI);
1319 --NextMII; // backtrack to the unfolded instruction.
1325 if (isDead) { // Previous store is dead.
1326 // If we get here, the store is dead, nuke it now.
1327 DOUT << "Removed dead store:\t" << *DeadStore;
1328 InvalidateKills(*DeadStore, RegKills, KillOps);
1329 VRM.RemoveMachineInstrFromMaps(DeadStore);
1330 MBB.erase(DeadStore);
1335 MaybeDeadStores[SS] = NULL;
1337 // Treat this store as a spill merged into a copy. That makes the
1338 // stack slot value available.
1339 VRM.virtFolded(VirtReg, NewStore, VirtRegMap::isMod);
1340 goto ProcessNextInst;
1344 // If the spill slot value is available, and this is a new definition of
1345 // the value, the value is not available anymore.
1346 if (MR & VirtRegMap::isMod) {
1347 // Notice that the value in this stack slot has been modified.
1348 Spills.ModifyStackSlotOrReMat(SS);
1350 // If this is *just* a mod of the value, check to see if this is just a
1351 // store to the spill slot (i.e. the spill got merged into the copy). If
1352 // so, realize that the vreg is available now, and add the store to the
1353 // MaybeDeadStore info.
1355 if (!(MR & VirtRegMap::isRef)) {
1356 if (unsigned SrcReg = TII->isStoreToStackSlot(&MI, StackSlot)) {
1357 assert(MRegisterInfo::isPhysicalRegister(SrcReg) &&
1358 "Src hasn't been allocated yet?");
1359 // Okay, this is certainly a store of SrcReg to [StackSlot]. Mark
1360 // this as a potentially dead store in case there is a subsequent
1361 // store into the stack slot without a read from it.
1362 MaybeDeadStores[StackSlot] = &MI;
1364 // If the stack slot value was previously available in some other
1365 // register, change it now. Otherwise, make the register available,
1367 Spills.addAvailable(StackSlot, &MI, SrcReg, false/*don't clobber*/);
1373 // Process all of the spilled defs.
1374 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
1375 MachineOperand &MO = MI.getOperand(i);
1376 if (!(MO.isRegister() && MO.getReg() && MO.isDef()))
1379 unsigned VirtReg = MO.getReg();
1380 if (!MRegisterInfo::isVirtualRegister(VirtReg)) {
1381 // Check to see if this is a noop copy. If so, eliminate the
1382 // instruction before considering the dest reg to be changed.
1384 if (TII->isMoveInstr(MI, Src, Dst) && Src == Dst) {
1386 DOUT << "Removing now-noop copy: " << MI;
1389 VRM.RemoveMachineInstrFromMaps(&MI);
1390 Spills.disallowClobberPhysReg(VirtReg);
1391 goto ProcessNextInst;
1394 // If it's not a no-op copy, it clobbers the value in the destreg.
1395 Spills.ClobberPhysReg(VirtReg);
1396 ReusedOperands.markClobbered(VirtReg);
1398 // Check to see if this instruction is a load from a stack slot into
1399 // a register. If so, this provides the stack slot value in the reg.
1401 if (unsigned DestReg = TII->isLoadFromStackSlot(&MI, FrameIdx)) {
1402 assert(DestReg == VirtReg && "Unknown load situation!");
1404 // If it is a folded reference, then it's not safe to clobber.
1405 bool Folded = FoldedSS.count(FrameIdx);
1406 // Otherwise, if it wasn't available, remember that it is now!
1407 Spills.addAvailable(FrameIdx, &MI, DestReg, !Folded);
1408 goto ProcessNextInst;
1414 unsigned SubIdx = MO.getSubReg();
1415 bool DoReMat = VRM.isReMaterialized(VirtReg);
1417 ReMatDefs.insert(&MI);
1419 // The only vregs left are stack slot definitions.
1420 int StackSlot = VRM.getStackSlot(VirtReg);
1421 const TargetRegisterClass *RC = RegMap->getRegClass(VirtReg);
1423 // If this def is part of a two-address operand, make sure to execute
1424 // the store from the correct physical register.
1426 int TiedOp = MI.getInstrDescriptor()->findTiedToSrcOperand(i);
1428 PhysReg = MI.getOperand(TiedOp).getReg();
1430 unsigned SuperReg = findSuperReg(RC, PhysReg, SubIdx, MRI);
1431 assert(SuperReg && MRI->getSubReg(SuperReg, SubIdx) == PhysReg &&
1432 "Can't find corresponding super-register!");
1436 PhysReg = VRM.getPhys(VirtReg);
1437 if (ReusedOperands.isClobbered(PhysReg)) {
1438 // Another def has taken the assigned physreg. It must have been a
1439 // use&def which got it due to reuse. Undo the reuse!
1440 PhysReg = ReusedOperands.GetRegForReload(PhysReg, &MI,
1441 Spills, MaybeDeadStores, RegKills, KillOps, VRM);
1445 MF.setPhysRegUsed(PhysReg);
1446 unsigned RReg = SubIdx ? MRI->getSubReg(PhysReg, SubIdx) : PhysReg;
1447 ReusedOperands.markClobbered(RReg);
1448 MI.getOperand(i).setReg(RReg);
1451 MachineInstr *&LastStore = MaybeDeadStores[StackSlot];
1452 SpillRegToStackSlot(MBB, MII, -1, PhysReg, StackSlot, RC, LastStore,
1453 Spills, ReMatDefs, RegKills, KillOps, VRM);
1455 // Check to see if this is a noop copy. If so, eliminate the
1456 // instruction before considering the dest reg to be changed.
1459 if (TII->isMoveInstr(MI, Src, Dst) && Src == Dst) {
1461 DOUT << "Removing now-noop copy: " << MI;
1464 VRM.RemoveMachineInstrFromMaps(&MI);
1465 UpdateKills(*LastStore, RegKills, KillOps);
1466 goto ProcessNextInst;
1472 if (!Erased && !BackTracked)
1473 for (MachineBasicBlock::iterator II = MI; II != NextMII; ++II)
1474 UpdateKills(*II, RegKills, KillOps);
1479 llvm::Spiller* llvm::createSpiller() {
1480 switch (SpillerOpt) {
1481 default: assert(0 && "Unreachable!");
1483 return new LocalSpiller();
1485 return new SimpleSpiller();