1 //===-- llvm/CodeGen/VirtRegMap.cpp - Virtual Register Map ----------------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the VirtRegMap class.
12 // It also contains implementations of the the Spiller interface, which, given a
13 // virtual register map and a machine function, eliminates all virtual
14 // references by replacing them with physical register references - adding spill
17 //===----------------------------------------------------------------------===//
19 #define DEBUG_TYPE "spiller"
20 #include "VirtRegMap.h"
21 #include "llvm/Function.h"
22 #include "llvm/CodeGen/MachineFrameInfo.h"
23 #include "llvm/CodeGen/MachineFunction.h"
24 #include "llvm/CodeGen/SSARegMap.h"
25 #include "llvm/Target/TargetMachine.h"
26 #include "llvm/Target/TargetInstrInfo.h"
27 #include "llvm/Support/CommandLine.h"
28 #include "llvm/Support/Debug.h"
29 #include "llvm/Support/Compiler.h"
30 #include "llvm/ADT/BitVector.h"
31 #include "llvm/ADT/Statistic.h"
32 #include "llvm/ADT/STLExtras.h"
33 #include "llvm/ADT/SmallSet.h"
37 STATISTIC(NumSpills, "Number of register spills");
38 STATISTIC(NumReMats, "Number of re-materialization");
39 STATISTIC(NumDRM , "Number of re-materializable defs elided");
40 STATISTIC(NumStores, "Number of stores added");
41 STATISTIC(NumLoads , "Number of loads added");
42 STATISTIC(NumReused, "Number of values reused");
43 STATISTIC(NumDSE , "Number of dead stores elided");
44 STATISTIC(NumDCE , "Number of copies elided");
47 enum SpillerName { simple, local };
49 static cl::opt<SpillerName>
51 cl::desc("Spiller to use: (default: local)"),
53 cl::values(clEnumVal(simple, " simple spiller"),
54 clEnumVal(local, " local spiller"),
59 //===----------------------------------------------------------------------===//
60 // VirtRegMap implementation
61 //===----------------------------------------------------------------------===//
63 VirtRegMap::VirtRegMap(MachineFunction &mf)
64 : TII(*mf.getTarget().getInstrInfo()), MF(mf),
65 Virt2PhysMap(NO_PHYS_REG), Virt2StackSlotMap(NO_STACK_SLOT),
66 Virt2ReMatIdMap(NO_STACK_SLOT), Virt2SplitMap(0),
67 Virt2SplitKillMap(0), ReMatMap(NULL), ReMatId(MAX_STACK_SLOT+1) {
71 void VirtRegMap::grow() {
72 unsigned LastVirtReg = MF.getSSARegMap()->getLastVirtReg();
73 Virt2PhysMap.grow(LastVirtReg);
74 Virt2StackSlotMap.grow(LastVirtReg);
75 Virt2ReMatIdMap.grow(LastVirtReg);
76 Virt2SplitMap.grow(LastVirtReg);
77 Virt2SplitKillMap.grow(LastVirtReg);
78 ReMatMap.grow(LastVirtReg);
81 int VirtRegMap::assignVirt2StackSlot(unsigned virtReg) {
82 assert(MRegisterInfo::isVirtualRegister(virtReg));
83 assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT &&
84 "attempt to assign stack slot to already spilled register");
85 const TargetRegisterClass* RC = MF.getSSARegMap()->getRegClass(virtReg);
86 int frameIndex = MF.getFrameInfo()->CreateStackObject(RC->getSize(),
88 Virt2StackSlotMap[virtReg] = frameIndex;
93 void VirtRegMap::assignVirt2StackSlot(unsigned virtReg, int frameIndex) {
94 assert(MRegisterInfo::isVirtualRegister(virtReg));
95 assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT &&
96 "attempt to assign stack slot to already spilled register");
97 assert((frameIndex >= 0 ||
98 (frameIndex >= MF.getFrameInfo()->getObjectIndexBegin())) &&
99 "illegal fixed frame index");
100 Virt2StackSlotMap[virtReg] = frameIndex;
103 int VirtRegMap::assignVirtReMatId(unsigned virtReg) {
104 assert(MRegisterInfo::isVirtualRegister(virtReg));
105 assert(Virt2ReMatIdMap[virtReg] == NO_STACK_SLOT &&
106 "attempt to assign re-mat id to already spilled register");
107 Virt2ReMatIdMap[virtReg] = ReMatId;
111 void VirtRegMap::assignVirtReMatId(unsigned virtReg, int id) {
112 assert(MRegisterInfo::isVirtualRegister(virtReg));
113 assert(Virt2ReMatIdMap[virtReg] == NO_STACK_SLOT &&
114 "attempt to assign re-mat id to already spilled register");
115 Virt2ReMatIdMap[virtReg] = id;
118 void VirtRegMap::virtFolded(unsigned VirtReg, MachineInstr *OldMI,
119 MachineInstr *NewMI, ModRef MRInfo) {
120 // Move previous memory references folded to new instruction.
121 MI2VirtMapTy::iterator IP = MI2VirtMap.lower_bound(NewMI);
122 for (MI2VirtMapTy::iterator I = MI2VirtMap.lower_bound(OldMI),
123 E = MI2VirtMap.end(); I != E && I->first == OldMI; ) {
124 MI2VirtMap.insert(IP, std::make_pair(NewMI, I->second));
125 MI2VirtMap.erase(I++);
128 // add new memory reference
129 MI2VirtMap.insert(IP, std::make_pair(NewMI, std::make_pair(VirtReg, MRInfo)));
132 void VirtRegMap::virtFolded(unsigned VirtReg, MachineInstr *MI, ModRef MRInfo) {
133 MI2VirtMapTy::iterator IP = MI2VirtMap.lower_bound(MI);
134 MI2VirtMap.insert(IP, std::make_pair(MI, std::make_pair(VirtReg, MRInfo)));
137 void VirtRegMap::print(std::ostream &OS) const {
138 const MRegisterInfo* MRI = MF.getTarget().getRegisterInfo();
140 OS << "********** REGISTER MAP **********\n";
141 for (unsigned i = MRegisterInfo::FirstVirtualRegister,
142 e = MF.getSSARegMap()->getLastVirtReg(); i <= e; ++i) {
143 if (Virt2PhysMap[i] != (unsigned)VirtRegMap::NO_PHYS_REG)
144 OS << "[reg" << i << " -> " << MRI->getName(Virt2PhysMap[i]) << "]\n";
148 for (unsigned i = MRegisterInfo::FirstVirtualRegister,
149 e = MF.getSSARegMap()->getLastVirtReg(); i <= e; ++i)
150 if (Virt2StackSlotMap[i] != VirtRegMap::NO_STACK_SLOT)
151 OS << "[reg" << i << " -> fi#" << Virt2StackSlotMap[i] << "]\n";
155 void VirtRegMap::dump() const {
160 //===----------------------------------------------------------------------===//
161 // Simple Spiller Implementation
162 //===----------------------------------------------------------------------===//
164 Spiller::~Spiller() {}
167 struct VISIBILITY_HIDDEN SimpleSpiller : public Spiller {
168 bool runOnMachineFunction(MachineFunction& mf, VirtRegMap &VRM);
172 bool SimpleSpiller::runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM) {
173 DOUT << "********** REWRITE MACHINE CODE **********\n";
174 DOUT << "********** Function: " << MF.getFunction()->getName() << '\n';
175 const TargetMachine &TM = MF.getTarget();
176 const MRegisterInfo &MRI = *TM.getRegisterInfo();
178 // LoadedRegs - Keep track of which vregs are loaded, so that we only load
179 // each vreg once (in the case where a spilled vreg is used by multiple
180 // operands). This is always smaller than the number of operands to the
181 // current machine instr, so it should be small.
182 std::vector<unsigned> LoadedRegs;
184 for (MachineFunction::iterator MBBI = MF.begin(), E = MF.end();
186 DOUT << MBBI->getBasicBlock()->getName() << ":\n";
187 MachineBasicBlock &MBB = *MBBI;
188 for (MachineBasicBlock::iterator MII = MBB.begin(),
189 E = MBB.end(); MII != E; ++MII) {
190 MachineInstr &MI = *MII;
191 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
192 MachineOperand &MO = MI.getOperand(i);
193 if (MO.isRegister() && MO.getReg())
194 if (MRegisterInfo::isVirtualRegister(MO.getReg())) {
195 unsigned VirtReg = MO.getReg();
196 unsigned PhysReg = VRM.getPhys(VirtReg);
197 if (!VRM.isAssignedReg(VirtReg)) {
198 int StackSlot = VRM.getStackSlot(VirtReg);
199 const TargetRegisterClass* RC =
200 MF.getSSARegMap()->getRegClass(VirtReg);
203 std::find(LoadedRegs.begin(), LoadedRegs.end(), VirtReg)
204 == LoadedRegs.end()) {
205 MRI.loadRegFromStackSlot(MBB, &MI, PhysReg, StackSlot, RC);
206 LoadedRegs.push_back(VirtReg);
208 DOUT << '\t' << *prior(MII);
212 MRI.storeRegToStackSlot(MBB, next(MII), PhysReg, true,
217 MF.setPhysRegUsed(PhysReg);
218 MI.getOperand(i).setReg(PhysReg);
220 MF.setPhysRegUsed(MO.getReg());
231 //===----------------------------------------------------------------------===//
232 // Local Spiller Implementation
233 //===----------------------------------------------------------------------===//
236 class AvailableSpills;
238 /// LocalSpiller - This spiller does a simple pass over the machine basic
239 /// block to attempt to keep spills in registers as much as possible for
240 /// blocks that have low register pressure (the vreg may be spilled due to
241 /// register pressure in other blocks).
242 class VISIBILITY_HIDDEN LocalSpiller : public Spiller {
244 const MRegisterInfo *MRI;
245 const TargetInstrInfo *TII;
247 bool runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM) {
248 RegMap = MF.getSSARegMap();
249 MRI = MF.getTarget().getRegisterInfo();
250 TII = MF.getTarget().getInstrInfo();
251 DOUT << "\n**** Local spiller rewriting function '"
252 << MF.getFunction()->getName() << "':\n";
253 DOUT << "**** Machine Instrs (NOTE! Does not include spills and reloads!) ****\n";
256 for (MachineFunction::iterator MBB = MF.begin(), E = MF.end();
258 RewriteMBB(*MBB, VRM);
260 DOUT << "**** Post Machine Instrs ****\n";
266 bool PrepForUnfoldOpti(MachineBasicBlock &MBB,
267 MachineBasicBlock::iterator &MII,
268 std::vector<MachineInstr*> &MaybeDeadStores,
269 AvailableSpills &Spills, BitVector &RegKills,
270 std::vector<MachineOperand*> &KillOps,
272 void SpillRegToStackSlot(MachineBasicBlock &MBB,
273 MachineBasicBlock::iterator &MII,
274 int Idx, unsigned PhysReg, int StackSlot,
275 const TargetRegisterClass *RC,
276 bool isAvailable, MachineInstr *&LastStore,
277 AvailableSpills &Spills,
278 SmallSet<MachineInstr*, 4> &ReMatDefs,
280 std::vector<MachineOperand*> &KillOps,
282 void RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM);
286 /// AvailableSpills - As the local spiller is scanning and rewriting an MBB from
287 /// top down, keep track of which spills slots or remat are available in each
290 /// Note that not all physregs are created equal here. In particular, some
291 /// physregs are reloads that we are allowed to clobber or ignore at any time.
292 /// Other physregs are values that the register allocated program is using that
293 /// we cannot CHANGE, but we can read if we like. We keep track of this on a
294 /// per-stack-slot / remat id basis as the low bit in the value of the
295 /// SpillSlotsAvailable entries. The predicate 'canClobberPhysReg()' checks
296 /// this bit and addAvailable sets it if.
298 class VISIBILITY_HIDDEN AvailableSpills {
299 const MRegisterInfo *MRI;
300 const TargetInstrInfo *TII;
302 // SpillSlotsOrReMatsAvailable - This map keeps track of all of the spilled
303 // or remat'ed virtual register values that are still available, due to being
304 // loaded or stored to, but not invalidated yet.
305 std::map<int, unsigned> SpillSlotsOrReMatsAvailable;
307 // PhysRegsAvailable - This is the inverse of SpillSlotsOrReMatsAvailable,
308 // indicating which stack slot values are currently held by a physreg. This
309 // is used to invalidate entries in SpillSlotsOrReMatsAvailable when a
310 // physreg is modified.
311 std::multimap<unsigned, int> PhysRegsAvailable;
313 void disallowClobberPhysRegOnly(unsigned PhysReg);
315 void ClobberPhysRegOnly(unsigned PhysReg);
317 AvailableSpills(const MRegisterInfo *mri, const TargetInstrInfo *tii)
318 : MRI(mri), TII(tii) {
321 const MRegisterInfo *getRegInfo() const { return MRI; }
323 /// getSpillSlotOrReMatPhysReg - If the specified stack slot or remat is
324 /// available in a physical register, return that PhysReg, otherwise
326 unsigned getSpillSlotOrReMatPhysReg(int Slot) const {
327 std::map<int, unsigned>::const_iterator I =
328 SpillSlotsOrReMatsAvailable.find(Slot);
329 if (I != SpillSlotsOrReMatsAvailable.end()) {
330 return I->second >> 1; // Remove the CanClobber bit.
335 /// addAvailable - Mark that the specified stack slot / remat is available in
336 /// the specified physreg. If CanClobber is true, the physreg can be modified
337 /// at any time without changing the semantics of the program.
338 void addAvailable(int SlotOrReMat, MachineInstr *MI, unsigned Reg,
339 bool CanClobber = true) {
340 // If this stack slot is thought to be available in some other physreg,
341 // remove its record.
342 ModifyStackSlotOrReMat(SlotOrReMat);
344 PhysRegsAvailable.insert(std::make_pair(Reg, SlotOrReMat));
345 SpillSlotsOrReMatsAvailable[SlotOrReMat]= (Reg << 1) | (unsigned)CanClobber;
347 if (SlotOrReMat > VirtRegMap::MAX_STACK_SLOT)
348 DOUT << "Remembering RM#" << SlotOrReMat-VirtRegMap::MAX_STACK_SLOT-1;
350 DOUT << "Remembering SS#" << SlotOrReMat;
351 DOUT << " in physreg " << MRI->getName(Reg) << "\n";
354 /// canClobberPhysReg - Return true if the spiller is allowed to change the
355 /// value of the specified stackslot register if it desires. The specified
356 /// stack slot must be available in a physreg for this query to make sense.
357 bool canClobberPhysReg(int SlotOrReMat) const {
358 assert(SpillSlotsOrReMatsAvailable.count(SlotOrReMat) &&
359 "Value not available!");
360 return SpillSlotsOrReMatsAvailable.find(SlotOrReMat)->second & 1;
363 /// disallowClobberPhysReg - Unset the CanClobber bit of the specified
364 /// stackslot register. The register is still available but is no longer
365 /// allowed to be modifed.
366 void disallowClobberPhysReg(unsigned PhysReg);
368 /// ClobberPhysReg - This is called when the specified physreg changes
369 /// value. We use this to invalidate any info about stuff that lives in
370 /// it and any of its aliases.
371 void ClobberPhysReg(unsigned PhysReg);
373 /// ModifyStackSlotOrReMat - This method is called when the value in a stack
374 /// slot changes. This removes information about which register the previous
375 /// value for this slot lives in (as the previous value is dead now).
376 void ModifyStackSlotOrReMat(int SlotOrReMat);
380 /// disallowClobberPhysRegOnly - Unset the CanClobber bit of the specified
381 /// stackslot register. The register is still available but is no longer
382 /// allowed to be modifed.
383 void AvailableSpills::disallowClobberPhysRegOnly(unsigned PhysReg) {
384 std::multimap<unsigned, int>::iterator I =
385 PhysRegsAvailable.lower_bound(PhysReg);
386 while (I != PhysRegsAvailable.end() && I->first == PhysReg) {
387 int SlotOrReMat = I->second;
389 assert((SpillSlotsOrReMatsAvailable[SlotOrReMat] >> 1) == PhysReg &&
390 "Bidirectional map mismatch!");
391 SpillSlotsOrReMatsAvailable[SlotOrReMat] &= ~1;
392 DOUT << "PhysReg " << MRI->getName(PhysReg)
393 << " copied, it is available for use but can no longer be modified\n";
397 /// disallowClobberPhysReg - Unset the CanClobber bit of the specified
398 /// stackslot register and its aliases. The register and its aliases may
399 /// still available but is no longer allowed to be modifed.
400 void AvailableSpills::disallowClobberPhysReg(unsigned PhysReg) {
401 for (const unsigned *AS = MRI->getAliasSet(PhysReg); *AS; ++AS)
402 disallowClobberPhysRegOnly(*AS);
403 disallowClobberPhysRegOnly(PhysReg);
406 /// ClobberPhysRegOnly - This is called when the specified physreg changes
407 /// value. We use this to invalidate any info about stuff we thing lives in it.
408 void AvailableSpills::ClobberPhysRegOnly(unsigned PhysReg) {
409 std::multimap<unsigned, int>::iterator I =
410 PhysRegsAvailable.lower_bound(PhysReg);
411 while (I != PhysRegsAvailable.end() && I->first == PhysReg) {
412 int SlotOrReMat = I->second;
413 PhysRegsAvailable.erase(I++);
414 assert((SpillSlotsOrReMatsAvailable[SlotOrReMat] >> 1) == PhysReg &&
415 "Bidirectional map mismatch!");
416 SpillSlotsOrReMatsAvailable.erase(SlotOrReMat);
417 DOUT << "PhysReg " << MRI->getName(PhysReg)
418 << " clobbered, invalidating ";
419 if (SlotOrReMat > VirtRegMap::MAX_STACK_SLOT)
420 DOUT << "RM#" << SlotOrReMat-VirtRegMap::MAX_STACK_SLOT-1 << "\n";
422 DOUT << "SS#" << SlotOrReMat << "\n";
426 /// ClobberPhysReg - This is called when the specified physreg changes
427 /// value. We use this to invalidate any info about stuff we thing lives in
428 /// it and any of its aliases.
429 void AvailableSpills::ClobberPhysReg(unsigned PhysReg) {
430 for (const unsigned *AS = MRI->getAliasSet(PhysReg); *AS; ++AS)
431 ClobberPhysRegOnly(*AS);
432 ClobberPhysRegOnly(PhysReg);
435 /// ModifyStackSlotOrReMat - This method is called when the value in a stack
436 /// slot changes. This removes information about which register the previous
437 /// value for this slot lives in (as the previous value is dead now).
438 void AvailableSpills::ModifyStackSlotOrReMat(int SlotOrReMat) {
439 std::map<int, unsigned>::iterator It =
440 SpillSlotsOrReMatsAvailable.find(SlotOrReMat);
441 if (It == SpillSlotsOrReMatsAvailable.end()) return;
442 unsigned Reg = It->second >> 1;
443 SpillSlotsOrReMatsAvailable.erase(It);
445 // This register may hold the value of multiple stack slots, only remove this
446 // stack slot from the set of values the register contains.
447 std::multimap<unsigned, int>::iterator I = PhysRegsAvailable.lower_bound(Reg);
449 assert(I != PhysRegsAvailable.end() && I->first == Reg &&
450 "Map inverse broken!");
451 if (I->second == SlotOrReMat) break;
453 PhysRegsAvailable.erase(I);
458 /// InvalidateKills - MI is going to be deleted. If any of its operands are
459 /// marked kill, then invalidate the information.
460 static void InvalidateKills(MachineInstr &MI, BitVector &RegKills,
461 std::vector<MachineOperand*> &KillOps,
462 SmallVector<unsigned, 2> *KillRegs = NULL) {
463 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
464 MachineOperand &MO = MI.getOperand(i);
465 if (!MO.isRegister() || !MO.isUse() || !MO.isKill())
467 unsigned Reg = MO.getReg();
469 KillRegs->push_back(Reg);
470 if (KillOps[Reg] == &MO) {
477 /// InvalidateKill - A MI that defines the specified register is being deleted,
478 /// invalidate the register kill information.
479 static void InvalidateKill(unsigned Reg, BitVector &RegKills,
480 std::vector<MachineOperand*> &KillOps) {
482 KillOps[Reg]->unsetIsKill();
488 /// InvalidateRegDef - If the def operand of the specified def MI is now dead
489 /// (since it's spill instruction is removed), mark it isDead. Also checks if
490 /// the def MI has other definition operands that are not dead. Returns it by
492 static bool InvalidateRegDef(MachineBasicBlock::iterator I,
493 MachineInstr &NewDef, unsigned Reg,
495 // Due to remat, it's possible this reg isn't being reused. That is,
496 // the def of this reg (by prev MI) is now dead.
497 MachineInstr *DefMI = I;
498 MachineOperand *DefOp = NULL;
499 for (unsigned i = 0, e = DefMI->getNumOperands(); i != e; ++i) {
500 MachineOperand &MO = DefMI->getOperand(i);
501 if (MO.isRegister() && MO.isDef()) {
502 if (MO.getReg() == Reg)
504 else if (!MO.isDead())
511 bool FoundUse = false, Done = false;
512 MachineBasicBlock::iterator E = NewDef;
514 for (; !Done && I != E; ++I) {
515 MachineInstr *NMI = I;
516 for (unsigned j = 0, ee = NMI->getNumOperands(); j != ee; ++j) {
517 MachineOperand &MO = NMI->getOperand(j);
518 if (!MO.isRegister() || MO.getReg() != Reg)
522 Done = true; // Stop after scanning all the operands of this MI.
533 /// UpdateKills - Track and update kill info. If a MI reads a register that is
534 /// marked kill, then it must be due to register reuse. Transfer the kill info
536 static void UpdateKills(MachineInstr &MI, BitVector &RegKills,
537 std::vector<MachineOperand*> &KillOps) {
538 const TargetInstrDescriptor *TID = MI.getInstrDescriptor();
539 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
540 MachineOperand &MO = MI.getOperand(i);
541 if (!MO.isRegister() || !MO.isUse())
543 unsigned Reg = MO.getReg();
548 // That can't be right. Register is killed but not re-defined and it's
549 // being reused. Let's fix that.
550 KillOps[Reg]->unsetIsKill();
553 if (i < TID->numOperands &&
554 TID->getOperandConstraint(i, TOI::TIED_TO) == -1)
555 // Unless it's a two-address operand, this is the new kill.
564 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
565 const MachineOperand &MO = MI.getOperand(i);
566 if (!MO.isRegister() || !MO.isDef())
568 unsigned Reg = MO.getReg();
575 // ReusedOp - For each reused operand, we keep track of a bit of information, in
576 // case we need to rollback upon processing a new operand. See comments below.
579 // The MachineInstr operand that reused an available value.
582 // StackSlotOrReMat - The spill slot or remat id of the value being reused.
583 unsigned StackSlotOrReMat;
585 // PhysRegReused - The physical register the value was available in.
586 unsigned PhysRegReused;
588 // AssignedPhysReg - The physreg that was assigned for use by the reload.
589 unsigned AssignedPhysReg;
591 // VirtReg - The virtual register itself.
594 ReusedOp(unsigned o, unsigned ss, unsigned prr, unsigned apr,
596 : Operand(o), StackSlotOrReMat(ss), PhysRegReused(prr),
597 AssignedPhysReg(apr), VirtReg(vreg) {}
600 /// ReuseInfo - This maintains a collection of ReuseOp's for each operand that
601 /// is reused instead of reloaded.
602 class VISIBILITY_HIDDEN ReuseInfo {
604 std::vector<ReusedOp> Reuses;
605 BitVector PhysRegsClobbered;
607 ReuseInfo(MachineInstr &mi, const MRegisterInfo *mri) : MI(mi) {
608 PhysRegsClobbered.resize(mri->getNumRegs());
611 bool hasReuses() const {
612 return !Reuses.empty();
615 /// addReuse - If we choose to reuse a virtual register that is already
616 /// available instead of reloading it, remember that we did so.
617 void addReuse(unsigned OpNo, unsigned StackSlotOrReMat,
618 unsigned PhysRegReused, unsigned AssignedPhysReg,
620 // If the reload is to the assigned register anyway, no undo will be
622 if (PhysRegReused == AssignedPhysReg) return;
624 // Otherwise, remember this.
625 Reuses.push_back(ReusedOp(OpNo, StackSlotOrReMat, PhysRegReused,
626 AssignedPhysReg, VirtReg));
629 void markClobbered(unsigned PhysReg) {
630 PhysRegsClobbered.set(PhysReg);
633 bool isClobbered(unsigned PhysReg) const {
634 return PhysRegsClobbered.test(PhysReg);
637 /// GetRegForReload - We are about to emit a reload into PhysReg. If there
638 /// is some other operand that is using the specified register, either pick
639 /// a new register to use, or evict the previous reload and use this reg.
640 unsigned GetRegForReload(unsigned PhysReg, MachineInstr *MI,
641 AvailableSpills &Spills,
642 std::vector<MachineInstr*> &MaybeDeadStores,
643 SmallSet<unsigned, 8> &Rejected,
645 std::vector<MachineOperand*> &KillOps,
647 if (Reuses.empty()) return PhysReg; // This is most often empty.
649 for (unsigned ro = 0, e = Reuses.size(); ro != e; ++ro) {
650 ReusedOp &Op = Reuses[ro];
651 // If we find some other reuse that was supposed to use this register
652 // exactly for its reload, we can change this reload to use ITS reload
653 // register. That is, unless its reload register has already been
654 // considered and subsequently rejected because it has also been reused
655 // by another operand.
656 if (Op.PhysRegReused == PhysReg &&
657 Rejected.count(Op.AssignedPhysReg) == 0) {
658 // Yup, use the reload register that we didn't use before.
659 unsigned NewReg = Op.AssignedPhysReg;
660 Rejected.insert(PhysReg);
661 return GetRegForReload(NewReg, MI, Spills, MaybeDeadStores, Rejected,
662 RegKills, KillOps, VRM);
664 // Otherwise, we might also have a problem if a previously reused
665 // value aliases the new register. If so, codegen the previous reload
667 unsigned PRRU = Op.PhysRegReused;
668 const MRegisterInfo *MRI = Spills.getRegInfo();
669 if (MRI->areAliases(PRRU, PhysReg)) {
670 // Okay, we found out that an alias of a reused register
671 // was used. This isn't good because it means we have
672 // to undo a previous reuse.
673 MachineBasicBlock *MBB = MI->getParent();
674 const TargetRegisterClass *AliasRC =
675 MBB->getParent()->getSSARegMap()->getRegClass(Op.VirtReg);
677 // Copy Op out of the vector and remove it, we're going to insert an
678 // explicit load for it.
680 Reuses.erase(Reuses.begin()+ro);
682 // Ok, we're going to try to reload the assigned physreg into the
683 // slot that we were supposed to in the first place. However, that
684 // register could hold a reuse. Check to see if it conflicts or
685 // would prefer us to use a different register.
686 unsigned NewPhysReg = GetRegForReload(NewOp.AssignedPhysReg,
687 MI, Spills, MaybeDeadStores,
688 Rejected, RegKills, KillOps, VRM);
690 if (NewOp.StackSlotOrReMat > VirtRegMap::MAX_STACK_SLOT) {
691 MRI->reMaterialize(*MBB, MI, NewPhysReg,
692 VRM.getReMaterializedMI(NewOp.VirtReg));
695 MRI->loadRegFromStackSlot(*MBB, MI, NewPhysReg,
696 NewOp.StackSlotOrReMat, AliasRC);
697 // Any stores to this stack slot are not dead anymore.
698 MaybeDeadStores[NewOp.StackSlotOrReMat] = NULL;
701 Spills.ClobberPhysReg(NewPhysReg);
702 Spills.ClobberPhysReg(NewOp.PhysRegReused);
704 MI->getOperand(NewOp.Operand).setReg(NewPhysReg);
706 Spills.addAvailable(NewOp.StackSlotOrReMat, MI, NewPhysReg);
707 MachineBasicBlock::iterator MII = MI;
709 UpdateKills(*MII, RegKills, KillOps);
710 DOUT << '\t' << *MII;
712 DOUT << "Reuse undone!\n";
715 // Finally, PhysReg is now available, go ahead and use it.
723 /// GetRegForReload - Helper for the above GetRegForReload(). Add a
724 /// 'Rejected' set to remember which registers have been considered and
725 /// rejected for the reload. This avoids infinite looping in case like
728 /// t2 <- assigned r0 for use by the reload but ended up reuse r1
729 /// t3 <- assigned r1 for use by the reload but ended up reuse r0
731 /// sees r1 is taken by t2, tries t2's reload register r0
732 /// sees r0 is taken by t3, tries t3's reload register r1
733 /// sees r1 is taken by t2, tries t2's reload register r0 ...
734 unsigned GetRegForReload(unsigned PhysReg, MachineInstr *MI,
735 AvailableSpills &Spills,
736 std::vector<MachineInstr*> &MaybeDeadStores,
738 std::vector<MachineOperand*> &KillOps,
740 SmallSet<unsigned, 8> Rejected;
741 return GetRegForReload(PhysReg, MI, Spills, MaybeDeadStores, Rejected,
742 RegKills, KillOps, VRM);
747 /// PrepForUnfoldOpti - Turn a store folding instruction into a load folding
748 /// instruction. e.g.
750 /// movl %eax, -32(%ebp)
751 /// movl -36(%ebp), %eax
752 /// orl %eax, -32(%ebp)
755 /// orl -36(%ebp), %eax
756 /// mov %eax, -32(%ebp)
757 /// This enables unfolding optimization for a subsequent instruction which will
758 /// also eliminate the newly introduced store instruction.
759 bool LocalSpiller::PrepForUnfoldOpti(MachineBasicBlock &MBB,
760 MachineBasicBlock::iterator &MII,
761 std::vector<MachineInstr*> &MaybeDeadStores,
762 AvailableSpills &Spills,
764 std::vector<MachineOperand*> &KillOps,
766 MachineFunction &MF = *MBB.getParent();
767 MachineInstr &MI = *MII;
768 unsigned UnfoldedOpc = 0;
769 unsigned UnfoldPR = 0;
770 unsigned UnfoldVR = 0;
771 int FoldedSS = VirtRegMap::NO_STACK_SLOT;
772 VirtRegMap::MI2VirtMapTy::const_iterator I, End;
773 for (tie(I, End) = VRM.getFoldedVirts(&MI); I != End; ++I) {
774 // Only transform a MI that folds a single register.
777 UnfoldVR = I->second.first;
778 VirtRegMap::ModRef MR = I->second.second;
779 if (VRM.isAssignedReg(UnfoldVR))
781 // If this reference is not a use, any previous store is now dead.
782 // Otherwise, the store to this stack slot is not dead anymore.
783 FoldedSS = VRM.getStackSlot(UnfoldVR);
784 MachineInstr* DeadStore = MaybeDeadStores[FoldedSS];
785 if (DeadStore && (MR & VirtRegMap::isModRef)) {
786 unsigned PhysReg = Spills.getSpillSlotOrReMatPhysReg(FoldedSS);
788 DeadStore->findRegisterUseOperandIdx(PhysReg, true) == -1)
791 UnfoldedOpc = MRI->getOpcodeAfterMemoryUnfold(MI.getOpcode(),
799 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
800 MachineOperand &MO = MI.getOperand(i);
801 if (!MO.isRegister() || MO.getReg() == 0 || !MO.isUse())
803 unsigned VirtReg = MO.getReg();
804 if (MRegisterInfo::isPhysicalRegister(VirtReg) || MO.getSubReg())
806 if (VRM.isAssignedReg(VirtReg)) {
807 unsigned PhysReg = VRM.getPhys(VirtReg);
808 if (PhysReg && MRI->regsOverlap(PhysReg, UnfoldPR))
810 } else if (VRM.isReMaterialized(VirtReg))
812 int SS = VRM.getStackSlot(VirtReg);
813 unsigned PhysReg = Spills.getSpillSlotOrReMatPhysReg(SS);
815 if (MRI->regsOverlap(PhysReg, UnfoldPR))
819 PhysReg = VRM.getPhys(VirtReg);
820 if (!MRI->regsOverlap(PhysReg, UnfoldPR))
823 // Ok, we'll need to reload the value into a register which makes
824 // it impossible to perform the store unfolding optimization later.
825 // Let's see if it is possible to fold the load if the store is
826 // unfolded. This allows us to perform the store unfolding
828 SmallVector<MachineInstr*, 4> NewMIs;
829 if (MRI->unfoldMemoryOperand(MF, &MI, UnfoldVR, false, false, NewMIs)) {
830 assert(NewMIs.size() == 1);
831 MachineInstr *NewMI = NewMIs.back();
833 int Idx = NewMI->findRegisterUseOperandIdx(VirtReg);
835 SmallVector<unsigned, 2> Ops;
837 MachineInstr *FoldedMI = MRI->foldMemoryOperand(NewMI, Ops, SS);
839 if (!VRM.hasPhys(UnfoldVR))
840 VRM.assignVirt2Phys(UnfoldVR, UnfoldPR);
841 VRM.virtFolded(VirtReg, FoldedMI, VirtRegMap::isRef);
842 MII = MBB.insert(MII, FoldedMI);
843 VRM.RemoveMachineInstrFromMaps(&MI);
853 /// findSuperReg - Find the SubReg's super-register of given register class
854 /// where its SubIdx sub-register is SubReg.
855 static unsigned findSuperReg(const TargetRegisterClass *RC, unsigned SubReg,
856 unsigned SubIdx, const MRegisterInfo *MRI) {
857 for (TargetRegisterClass::iterator I = RC->begin(), E = RC->end();
860 if (MRI->getSubReg(Reg, SubIdx) == SubReg)
866 /// SpillRegToStackSlot - Spill a register to a specified stack slot. Check if
867 /// the last store to the same slot is now dead. If so, remove the last store.
868 void LocalSpiller::SpillRegToStackSlot(MachineBasicBlock &MBB,
869 MachineBasicBlock::iterator &MII,
870 int Idx, unsigned PhysReg, int StackSlot,
871 const TargetRegisterClass *RC,
872 bool isAvailable, MachineInstr *&LastStore,
873 AvailableSpills &Spills,
874 SmallSet<MachineInstr*, 4> &ReMatDefs,
876 std::vector<MachineOperand*> &KillOps,
878 MRI->storeRegToStackSlot(MBB, next(MII), PhysReg, true, StackSlot, RC);
879 DOUT << "Store:\t" << *next(MII);
881 // If there is a dead store to this stack slot, nuke it now.
883 DOUT << "Removed dead store:\t" << *LastStore;
885 SmallVector<unsigned, 2> KillRegs;
886 InvalidateKills(*LastStore, RegKills, KillOps, &KillRegs);
887 MachineBasicBlock::iterator PrevMII = LastStore;
888 bool CheckDef = PrevMII != MBB.begin();
891 MBB.erase(LastStore);
892 VRM.RemoveMachineInstrFromMaps(LastStore);
894 // Look at defs of killed registers on the store. Mark the defs
895 // as dead since the store has been deleted and they aren't
897 for (unsigned j = 0, ee = KillRegs.size(); j != ee; ++j) {
898 bool HasOtherDef = false;
899 if (InvalidateRegDef(PrevMII, *MII, KillRegs[j], HasOtherDef)) {
900 MachineInstr *DeadDef = PrevMII;
901 if (ReMatDefs.count(DeadDef) && !HasOtherDef) {
902 // FIXME: This assumes a remat def does not have side
905 VRM.RemoveMachineInstrFromMaps(DeadDef);
913 LastStore = next(MII);
915 // If the stack slot value was previously available in some other
916 // register, change it now. Otherwise, make the register available,
918 Spills.ModifyStackSlotOrReMat(StackSlot);
919 Spills.ClobberPhysReg(PhysReg);
920 Spills.addAvailable(StackSlot, LastStore, PhysReg, isAvailable);
924 /// rewriteMBB - Keep track of which spills are available even after the
925 /// register allocator is done with them. If possible, avid reloading vregs.
926 void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM) {
927 DOUT << MBB.getBasicBlock()->getName() << ":\n";
929 MachineFunction &MF = *MBB.getParent();
931 // Spills - Keep track of which spilled values are available in physregs so
932 // that we can choose to reuse the physregs instead of emitting reloads.
933 AvailableSpills Spills(MRI, TII);
935 // MaybeDeadStores - When we need to write a value back into a stack slot,
936 // keep track of the inserted store. If the stack slot value is never read
937 // (because the value was used from some available register, for example), and
938 // subsequently stored to, the original store is dead. This map keeps track
939 // of inserted stores that are not used. If we see a subsequent store to the
940 // same stack slot, the original store is deleted.
941 std::vector<MachineInstr*> MaybeDeadStores;
942 MaybeDeadStores.resize(MF.getFrameInfo()->getObjectIndexEnd(), NULL);
944 // ReMatDefs - These are rematerializable def MIs which are not deleted.
945 SmallSet<MachineInstr*, 4> ReMatDefs;
947 // Keep track of kill information.
948 BitVector RegKills(MRI->getNumRegs());
949 std::vector<MachineOperand*> KillOps;
950 KillOps.resize(MRI->getNumRegs(), NULL);
952 for (MachineBasicBlock::iterator MII = MBB.begin(), E = MBB.end();
954 MachineBasicBlock::iterator NextMII = MII; ++NextMII;
956 VirtRegMap::MI2VirtMapTy::const_iterator I, End;
958 bool BackTracked = false;
959 if (PrepForUnfoldOpti(MBB, MII,
960 MaybeDeadStores, Spills, RegKills, KillOps, VRM))
963 MachineInstr &MI = *MII;
964 const TargetInstrDescriptor *TID = MI.getInstrDescriptor();
966 // Insert restores here if asked to.
967 if (VRM.isRestorePt(&MI)) {
968 std::vector<unsigned> &RestoreRegs = VRM.getRestorePtRestores(&MI);
969 for (unsigned i = 0, e = RestoreRegs.size(); i != e; ++i) {
970 unsigned VirtReg = RestoreRegs[i];
971 if (!VRM.getPreSplitReg(VirtReg))
972 continue; // Split interval spilled again.
973 unsigned Phys = VRM.getPhys(VirtReg);
974 MF.setPhysRegUsed(Phys);
975 if (VRM.isReMaterialized(VirtReg)) {
976 MRI->reMaterialize(MBB, &MI, Phys,
977 VRM.getReMaterializedMI(VirtReg));
980 const TargetRegisterClass* RC = RegMap->getRegClass(VirtReg);
981 MRI->loadRegFromStackSlot(MBB, &MI, Phys, VRM.getStackSlot(VirtReg), RC);
984 // This invalidates Phys.
985 Spills.ClobberPhysReg(Phys);
986 UpdateKills(*prior(MII), RegKills, KillOps);
987 DOUT << '\t' << *prior(MII);
991 // Insert spills here if asked to.
992 if (VRM.isSpillPt(&MI)) {
993 std::vector<std::pair<unsigned,bool> > &SpillRegs =
994 VRM.getSpillPtSpills(&MI);
995 for (unsigned i = 0, e = SpillRegs.size(); i != e; ++i) {
996 unsigned VirtReg = SpillRegs[i].first;
997 bool isKill = SpillRegs[i].second;
998 if (!VRM.getPreSplitReg(VirtReg))
999 continue; // Split interval spilled again.
1000 const TargetRegisterClass *RC = RegMap->getRegClass(VirtReg);
1001 unsigned Phys = VRM.getPhys(VirtReg);
1002 int StackSlot = VRM.getStackSlot(VirtReg);
1003 MRI->storeRegToStackSlot(MBB, next(MII), Phys, isKill, StackSlot, RC);
1004 MachineInstr *StoreMI = next(MII);
1005 DOUT << "Store:\t" << StoreMI;
1006 VRM.virtFolded(VirtReg, StoreMI, VirtRegMap::isMod);
1008 NextMII = next(MII);
1011 /// ReusedOperands - Keep track of operand reuse in case we need to undo
1013 ReuseInfo ReusedOperands(MI, MRI);
1014 // Process all of the spilled uses and all non spilled reg references.
1015 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
1016 MachineOperand &MO = MI.getOperand(i);
1017 if (!MO.isRegister() || MO.getReg() == 0)
1018 continue; // Ignore non-register operands.
1020 unsigned VirtReg = MO.getReg();
1021 if (MRegisterInfo::isPhysicalRegister(VirtReg)) {
1022 // Ignore physregs for spilling, but remember that it is used by this
1024 MF.setPhysRegUsed(VirtReg);
1028 assert(MRegisterInfo::isVirtualRegister(VirtReg) &&
1029 "Not a virtual or a physical register?");
1031 unsigned SubIdx = MO.getSubReg();
1032 if (VRM.isAssignedReg(VirtReg)) {
1033 // This virtual register was assigned a physreg!
1034 unsigned Phys = VRM.getPhys(VirtReg);
1035 MF.setPhysRegUsed(Phys);
1037 ReusedOperands.markClobbered(Phys);
1038 unsigned RReg = SubIdx ? MRI->getSubReg(Phys, SubIdx) : Phys;
1039 MI.getOperand(i).setReg(RReg);
1043 // This virtual register is now known to be a spilled value.
1045 continue; // Handle defs in the loop below (handle use&def here though)
1047 bool DoReMat = VRM.isReMaterialized(VirtReg);
1048 int SSorRMId = DoReMat
1049 ? VRM.getReMatId(VirtReg) : VRM.getStackSlot(VirtReg);
1050 int ReuseSlot = SSorRMId;
1052 // Check to see if this stack slot is available.
1053 unsigned PhysReg = Spills.getSpillSlotOrReMatPhysReg(SSorRMId);
1055 // If this is a sub-register use, make sure the reuse register is in the
1056 // right register class. For example, for x86 not all of the 32-bit
1057 // registers have accessible sub-registers.
1058 // Similarly so for EXTRACT_SUBREG. Consider this:
1060 // MOV32_mr fi#1, EDI
1062 // = EXTRACT_SUBREG fi#1
1063 // fi#1 is available in EDI, but it cannot be reused because it's not in
1064 // the right register file.
1066 (SubIdx || MI.getOpcode() == TargetInstrInfo::EXTRACT_SUBREG)) {
1067 const TargetRegisterClass* RC = RegMap->getRegClass(VirtReg);
1068 if (!RC->contains(PhysReg))
1073 // This spilled operand might be part of a two-address operand. If this
1074 // is the case, then changing it will necessarily require changing the
1075 // def part of the instruction as well. However, in some cases, we
1076 // aren't allowed to modify the reused register. If none of these cases
1078 bool CanReuse = true;
1079 int ti = TID->getOperandConstraint(i, TOI::TIED_TO);
1081 MI.getOperand(ti).isRegister() &&
1082 MI.getOperand(ti).getReg() == VirtReg) {
1083 // Okay, we have a two address operand. We can reuse this physreg as
1084 // long as we are allowed to clobber the value and there isn't an
1085 // earlier def that has already clobbered the physreg.
1086 CanReuse = Spills.canClobberPhysReg(ReuseSlot) &&
1087 !ReusedOperands.isClobbered(PhysReg);
1091 // If this stack slot value is already available, reuse it!
1092 if (ReuseSlot > VirtRegMap::MAX_STACK_SLOT)
1093 DOUT << "Reusing RM#" << ReuseSlot-VirtRegMap::MAX_STACK_SLOT-1;
1095 DOUT << "Reusing SS#" << ReuseSlot;
1096 DOUT << " from physreg "
1097 << MRI->getName(PhysReg) << " for vreg"
1098 << VirtReg <<" instead of reloading into physreg "
1099 << MRI->getName(VRM.getPhys(VirtReg)) << "\n";
1100 unsigned RReg = SubIdx ? MRI->getSubReg(PhysReg, SubIdx) : PhysReg;
1101 MI.getOperand(i).setReg(RReg);
1103 // The only technical detail we have is that we don't know that
1104 // PhysReg won't be clobbered by a reloaded stack slot that occurs
1105 // later in the instruction. In particular, consider 'op V1, V2'.
1106 // If V1 is available in physreg R0, we would choose to reuse it
1107 // here, instead of reloading it into the register the allocator
1108 // indicated (say R1). However, V2 might have to be reloaded
1109 // later, and it might indicate that it needs to live in R0. When
1110 // this occurs, we need to have information available that
1111 // indicates it is safe to use R1 for the reload instead of R0.
1113 // To further complicate matters, we might conflict with an alias,
1114 // or R0 and R1 might not be compatible with each other. In this
1115 // case, we actually insert a reload for V1 in R1, ensuring that
1116 // we can get at R0 or its alias.
1117 ReusedOperands.addReuse(i, ReuseSlot, PhysReg,
1118 VRM.getPhys(VirtReg), VirtReg);
1120 // Only mark it clobbered if this is a use&def operand.
1121 ReusedOperands.markClobbered(PhysReg);
1124 if (MI.getOperand(i).isKill() &&
1125 ReuseSlot <= VirtRegMap::MAX_STACK_SLOT) {
1126 // This was the last use and the spilled value is still available
1127 // for reuse. That means the spill was unnecessary!
1128 MachineInstr* DeadStore = MaybeDeadStores[ReuseSlot];
1130 DOUT << "Removed dead store:\t" << *DeadStore;
1131 InvalidateKills(*DeadStore, RegKills, KillOps);
1132 VRM.RemoveMachineInstrFromMaps(DeadStore);
1133 MBB.erase(DeadStore);
1134 MaybeDeadStores[ReuseSlot] = NULL;
1141 // Otherwise we have a situation where we have a two-address instruction
1142 // whose mod/ref operand needs to be reloaded. This reload is already
1143 // available in some register "PhysReg", but if we used PhysReg as the
1144 // operand to our 2-addr instruction, the instruction would modify
1145 // PhysReg. This isn't cool if something later uses PhysReg and expects
1146 // to get its initial value.
1148 // To avoid this problem, and to avoid doing a load right after a store,
1149 // we emit a copy from PhysReg into the designated register for this
1151 unsigned DesignatedReg = VRM.getPhys(VirtReg);
1152 assert(DesignatedReg && "Must map virtreg to physreg!");
1154 // Note that, if we reused a register for a previous operand, the
1155 // register we want to reload into might not actually be
1156 // available. If this occurs, use the register indicated by the
1158 if (ReusedOperands.hasReuses())
1159 DesignatedReg = ReusedOperands.GetRegForReload(DesignatedReg, &MI,
1160 Spills, MaybeDeadStores, RegKills, KillOps, VRM);
1162 // If the mapped designated register is actually the physreg we have
1163 // incoming, we don't need to inserted a dead copy.
1164 if (DesignatedReg == PhysReg) {
1165 // If this stack slot value is already available, reuse it!
1166 if (ReuseSlot > VirtRegMap::MAX_STACK_SLOT)
1167 DOUT << "Reusing RM#" << ReuseSlot-VirtRegMap::MAX_STACK_SLOT-1;
1169 DOUT << "Reusing SS#" << ReuseSlot;
1170 DOUT << " from physreg " << MRI->getName(PhysReg) << " for vreg"
1172 << " instead of reloading into same physreg.\n";
1173 unsigned RReg = SubIdx ? MRI->getSubReg(PhysReg, SubIdx) : PhysReg;
1174 MI.getOperand(i).setReg(RReg);
1175 ReusedOperands.markClobbered(RReg);
1180 const TargetRegisterClass* RC = RegMap->getRegClass(VirtReg);
1181 MF.setPhysRegUsed(DesignatedReg);
1182 ReusedOperands.markClobbered(DesignatedReg);
1183 MRI->copyRegToReg(MBB, &MI, DesignatedReg, PhysReg, RC, RC);
1185 MachineInstr *CopyMI = prior(MII);
1186 UpdateKills(*CopyMI, RegKills, KillOps);
1188 // This invalidates DesignatedReg.
1189 Spills.ClobberPhysReg(DesignatedReg);
1191 Spills.addAvailable(ReuseSlot, &MI, DesignatedReg);
1193 SubIdx ? MRI->getSubReg(DesignatedReg, SubIdx) : DesignatedReg;
1194 MI.getOperand(i).setReg(RReg);
1195 DOUT << '\t' << *prior(MII);
1200 // Otherwise, reload it and remember that we have it.
1201 PhysReg = VRM.getPhys(VirtReg);
1202 assert(PhysReg && "Must map virtreg to physreg!");
1204 // Note that, if we reused a register for a previous operand, the
1205 // register we want to reload into might not actually be
1206 // available. If this occurs, use the register indicated by the
1208 if (ReusedOperands.hasReuses())
1209 PhysReg = ReusedOperands.GetRegForReload(PhysReg, &MI,
1210 Spills, MaybeDeadStores, RegKills, KillOps, VRM);
1212 MF.setPhysRegUsed(PhysReg);
1213 ReusedOperands.markClobbered(PhysReg);
1215 MRI->reMaterialize(MBB, &MI, PhysReg, VRM.getReMaterializedMI(VirtReg));
1218 const TargetRegisterClass* RC = RegMap->getRegClass(VirtReg);
1219 MRI->loadRegFromStackSlot(MBB, &MI, PhysReg, SSorRMId, RC);
1222 // This invalidates PhysReg.
1223 Spills.ClobberPhysReg(PhysReg);
1225 // Any stores to this stack slot are not dead anymore.
1227 MaybeDeadStores[SSorRMId] = NULL;
1228 Spills.addAvailable(SSorRMId, &MI, PhysReg);
1229 // Assumes this is the last use. IsKill will be unset if reg is reused
1230 // unless it's a two-address operand.
1231 if (TID->getOperandConstraint(i, TOI::TIED_TO) == -1)
1232 MI.getOperand(i).setIsKill();
1233 unsigned RReg = SubIdx ? MRI->getSubReg(PhysReg, SubIdx) : PhysReg;
1234 MI.getOperand(i).setReg(RReg);
1235 UpdateKills(*prior(MII), RegKills, KillOps);
1236 DOUT << '\t' << *prior(MII);
1242 // If we have folded references to memory operands, make sure we clear all
1243 // physical registers that may contain the value of the spilled virtual
1245 SmallSet<int, 2> FoldedSS;
1246 for (tie(I, End) = VRM.getFoldedVirts(&MI); I != End; ++I) {
1247 unsigned VirtReg = I->second.first;
1248 VirtRegMap::ModRef MR = I->second.second;
1249 DOUT << "Folded vreg: " << VirtReg << " MR: " << MR;
1251 int SS = VRM.getStackSlot(VirtReg);
1252 if (SS == VirtRegMap::NO_STACK_SLOT)
1254 FoldedSS.insert(SS);
1255 DOUT << " - StackSlot: " << SS << "\n";
1257 // If this folded instruction is just a use, check to see if it's a
1258 // straight load from the virt reg slot.
1259 if ((MR & VirtRegMap::isRef) && !(MR & VirtRegMap::isMod)) {
1261 unsigned DestReg = TII->isLoadFromStackSlot(&MI, FrameIdx);
1262 if (DestReg && FrameIdx == SS) {
1263 // If this spill slot is available, turn it into a copy (or nothing)
1264 // instead of leaving it as a load!
1265 if (unsigned InReg = Spills.getSpillSlotOrReMatPhysReg(SS)) {
1266 DOUT << "Promoted Load To Copy: " << MI;
1267 if (DestReg != InReg) {
1268 const TargetRegisterClass *RC = RegMap->getRegClass(VirtReg);
1269 MRI->copyRegToReg(MBB, &MI, DestReg, InReg, RC, RC);
1270 // Revisit the copy so we make sure to notice the effects of the
1271 // operation on the destreg (either needing to RA it if it's
1272 // virtual or needing to clobber any values if it's physical).
1274 --NextMII; // backtrack to the copy.
1277 DOUT << "Removing now-noop copy: " << MI;
1278 // Unset last kill since it's being reused.
1279 InvalidateKill(InReg, RegKills, KillOps);
1282 VRM.RemoveMachineInstrFromMaps(&MI);
1285 goto ProcessNextInst;
1288 unsigned PhysReg = Spills.getSpillSlotOrReMatPhysReg(SS);
1289 SmallVector<MachineInstr*, 4> NewMIs;
1291 MRI->unfoldMemoryOperand(MF, &MI, PhysReg, false, false, NewMIs)) {
1292 MBB.insert(MII, NewMIs[0]);
1293 VRM.RemoveMachineInstrFromMaps(&MI);
1296 --NextMII; // backtrack to the unfolded instruction.
1298 goto ProcessNextInst;
1303 // If this reference is not a use, any previous store is now dead.
1304 // Otherwise, the store to this stack slot is not dead anymore.
1305 MachineInstr* DeadStore = MaybeDeadStores[SS];
1307 bool isDead = !(MR & VirtRegMap::isRef);
1308 MachineInstr *NewStore = NULL;
1309 if (MR & VirtRegMap::isModRef) {
1310 unsigned PhysReg = Spills.getSpillSlotOrReMatPhysReg(SS);
1311 SmallVector<MachineInstr*, 4> NewMIs;
1312 // We can reuse this physreg as long as we are allowed to clobber
1313 // the value and there isn't an earlier def that has already clobbered the
1316 !TII->isStoreToStackSlot(&MI, SS) && // Not profitable!
1317 DeadStore->findRegisterUseOperandIdx(PhysReg, true) != -1 &&
1318 MRI->unfoldMemoryOperand(MF, &MI, PhysReg, false, true, NewMIs)) {
1319 MBB.insert(MII, NewMIs[0]);
1320 NewStore = NewMIs[1];
1321 MBB.insert(MII, NewStore);
1322 VRM.RemoveMachineInstrFromMaps(&MI);
1326 --NextMII; // backtrack to the unfolded instruction.
1332 if (isDead) { // Previous store is dead.
1333 // If we get here, the store is dead, nuke it now.
1334 DOUT << "Removed dead store:\t" << *DeadStore;
1335 InvalidateKills(*DeadStore, RegKills, KillOps);
1336 VRM.RemoveMachineInstrFromMaps(DeadStore);
1337 MBB.erase(DeadStore);
1342 MaybeDeadStores[SS] = NULL;
1344 // Treat this store as a spill merged into a copy. That makes the
1345 // stack slot value available.
1346 VRM.virtFolded(VirtReg, NewStore, VirtRegMap::isMod);
1347 goto ProcessNextInst;
1351 // If the spill slot value is available, and this is a new definition of
1352 // the value, the value is not available anymore.
1353 if (MR & VirtRegMap::isMod) {
1354 // Notice that the value in this stack slot has been modified.
1355 Spills.ModifyStackSlotOrReMat(SS);
1357 // If this is *just* a mod of the value, check to see if this is just a
1358 // store to the spill slot (i.e. the spill got merged into the copy). If
1359 // so, realize that the vreg is available now, and add the store to the
1360 // MaybeDeadStore info.
1362 if (!(MR & VirtRegMap::isRef)) {
1363 if (unsigned SrcReg = TII->isStoreToStackSlot(&MI, StackSlot)) {
1364 assert(MRegisterInfo::isPhysicalRegister(SrcReg) &&
1365 "Src hasn't been allocated yet?");
1366 // Okay, this is certainly a store of SrcReg to [StackSlot]. Mark
1367 // this as a potentially dead store in case there is a subsequent
1368 // store into the stack slot without a read from it.
1369 MaybeDeadStores[StackSlot] = &MI;
1371 // If the stack slot value was previously available in some other
1372 // register, change it now. Otherwise, make the register available,
1374 Spills.addAvailable(StackSlot, &MI, SrcReg, false/*don't clobber*/);
1380 // Process all of the spilled defs.
1381 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
1382 MachineOperand &MO = MI.getOperand(i);
1383 if (!(MO.isRegister() && MO.getReg() && MO.isDef()))
1386 unsigned VirtReg = MO.getReg();
1387 if (!MRegisterInfo::isVirtualRegister(VirtReg)) {
1388 // Check to see if this is a noop copy. If so, eliminate the
1389 // instruction before considering the dest reg to be changed.
1391 if (TII->isMoveInstr(MI, Src, Dst) && Src == Dst) {
1393 DOUT << "Removing now-noop copy: " << MI;
1396 VRM.RemoveMachineInstrFromMaps(&MI);
1397 Spills.disallowClobberPhysReg(VirtReg);
1398 goto ProcessNextInst;
1401 // If it's not a no-op copy, it clobbers the value in the destreg.
1402 Spills.ClobberPhysReg(VirtReg);
1403 ReusedOperands.markClobbered(VirtReg);
1405 // Check to see if this instruction is a load from a stack slot into
1406 // a register. If so, this provides the stack slot value in the reg.
1408 if (unsigned DestReg = TII->isLoadFromStackSlot(&MI, FrameIdx)) {
1409 assert(DestReg == VirtReg && "Unknown load situation!");
1411 // If it is a folded reference, then it's not safe to clobber.
1412 bool Folded = FoldedSS.count(FrameIdx);
1413 // Otherwise, if it wasn't available, remember that it is now!
1414 Spills.addAvailable(FrameIdx, &MI, DestReg, !Folded);
1415 goto ProcessNextInst;
1421 unsigned SubIdx = MO.getSubReg();
1422 bool DoReMat = VRM.isReMaterialized(VirtReg);
1424 ReMatDefs.insert(&MI);
1426 // The only vregs left are stack slot definitions.
1427 int StackSlot = VRM.getStackSlot(VirtReg);
1428 const TargetRegisterClass *RC = RegMap->getRegClass(VirtReg);
1430 // If this def is part of a two-address operand, make sure to execute
1431 // the store from the correct physical register.
1433 int TiedOp = MI.getInstrDescriptor()->findTiedToSrcOperand(i);
1435 PhysReg = MI.getOperand(TiedOp).getReg();
1437 unsigned SuperReg = findSuperReg(RC, PhysReg, SubIdx, MRI);
1438 assert(SuperReg && MRI->getSubReg(SuperReg, SubIdx) == PhysReg &&
1439 "Can't find corresponding super-register!");
1443 PhysReg = VRM.getPhys(VirtReg);
1444 if (ReusedOperands.isClobbered(PhysReg)) {
1445 // Another def has taken the assigned physreg. It must have been a
1446 // use&def which got it due to reuse. Undo the reuse!
1447 PhysReg = ReusedOperands.GetRegForReload(PhysReg, &MI,
1448 Spills, MaybeDeadStores, RegKills, KillOps, VRM);
1452 MF.setPhysRegUsed(PhysReg);
1453 unsigned RReg = SubIdx ? MRI->getSubReg(PhysReg, SubIdx) : PhysReg;
1454 ReusedOperands.markClobbered(RReg);
1455 MI.getOperand(i).setReg(RReg);
1458 MachineInstr *&LastStore = MaybeDeadStores[StackSlot];
1459 SpillRegToStackSlot(MBB, MII, -1, PhysReg, StackSlot, RC, true,
1460 LastStore, Spills, ReMatDefs, RegKills, KillOps, VRM);
1461 NextMII = next(MII);
1463 // Check to see if this is a noop copy. If so, eliminate the
1464 // instruction before considering the dest reg to be changed.
1467 if (TII->isMoveInstr(MI, Src, Dst) && Src == Dst) {
1469 DOUT << "Removing now-noop copy: " << MI;
1472 VRM.RemoveMachineInstrFromMaps(&MI);
1473 UpdateKills(*LastStore, RegKills, KillOps);
1474 goto ProcessNextInst;
1480 if (!Erased && !BackTracked) {
1481 for (MachineBasicBlock::iterator II = MI; II != NextMII; ++II)
1482 UpdateKills(*II, RegKills, KillOps);
1488 llvm::Spiller* llvm::createSpiller() {
1489 switch (SpillerOpt) {
1490 default: assert(0 && "Unreachable!");
1492 return new LocalSpiller();
1494 return new SimpleSpiller();