1 //===-- llvm/CodeGen/VirtRegMap.cpp - Virtual Register Map ----------------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the VirtRegMap class.
12 // It also contains implementations of the the Spiller interface, which, given a
13 // virtual register map and a machine function, eliminates all virtual
14 // references by replacing them with physical register references - adding spill
17 //===----------------------------------------------------------------------===//
19 #define DEBUG_TYPE "spiller"
20 #include "VirtRegMap.h"
21 #include "llvm/Function.h"
22 #include "llvm/CodeGen/MachineFrameInfo.h"
23 #include "llvm/CodeGen/MachineFunction.h"
24 #include "llvm/CodeGen/SSARegMap.h"
25 #include "llvm/Target/TargetMachine.h"
26 #include "llvm/Target/TargetInstrInfo.h"
27 #include "llvm/Support/CommandLine.h"
28 #include "llvm/Support/Debug.h"
29 #include "llvm/ADT/Statistic.h"
30 #include "llvm/ADT/STLExtras.h"
36 Statistic<> NumSpills("spiller", "Number of register spills");
37 Statistic<> NumStores("spiller", "Number of stores added");
38 Statistic<> NumLoads ("spiller", "Number of loads added");
39 Statistic<> NumReused("spiller", "Number of values reused");
40 Statistic<> NumDSE ("spiller", "Number of dead stores elided");
41 Statistic<> NumDCE ("spiller", "Number of copies elided");
43 enum SpillerName { simple, local };
47 cl::desc("Spiller to use: (default: local)"),
49 cl::values(clEnumVal(simple, " simple spiller"),
50 clEnumVal(local, " local spiller"),
55 //===----------------------------------------------------------------------===//
56 // VirtRegMap implementation
57 //===----------------------------------------------------------------------===//
59 void VirtRegMap::grow() {
60 Virt2PhysMap.grow(MF.getSSARegMap()->getLastVirtReg());
61 Virt2StackSlotMap.grow(MF.getSSARegMap()->getLastVirtReg());
64 int VirtRegMap::assignVirt2StackSlot(unsigned virtReg) {
65 assert(MRegisterInfo::isVirtualRegister(virtReg));
66 assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT &&
67 "attempt to assign stack slot to already spilled register");
68 const TargetRegisterClass* RC = MF.getSSARegMap()->getRegClass(virtReg);
69 int frameIndex = MF.getFrameInfo()->CreateStackObject(RC->getSize(),
71 Virt2StackSlotMap[virtReg] = frameIndex;
76 void VirtRegMap::assignVirt2StackSlot(unsigned virtReg, int frameIndex) {
77 assert(MRegisterInfo::isVirtualRegister(virtReg));
78 assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT &&
79 "attempt to assign stack slot to already spilled register");
80 Virt2StackSlotMap[virtReg] = frameIndex;
83 void VirtRegMap::virtFolded(unsigned VirtReg, MachineInstr *OldMI,
84 unsigned OpNo, MachineInstr *NewMI) {
85 // Move previous memory references folded to new instruction.
86 MI2VirtMapTy::iterator IP = MI2VirtMap.lower_bound(NewMI);
87 for (MI2VirtMapTy::iterator I = MI2VirtMap.lower_bound(OldMI),
88 E = MI2VirtMap.end(); I != E && I->first == OldMI; ) {
89 MI2VirtMap.insert(IP, std::make_pair(NewMI, I->second));
90 MI2VirtMap.erase(I++);
94 if (!OldMI->getOperand(OpNo).isDef()) {
95 assert(OldMI->getOperand(OpNo).isUse() && "Operand is not use or def?");
98 MRInfo = OldMI->getOperand(OpNo).isUse() ? isModRef : isMod;
101 // add new memory reference
102 MI2VirtMap.insert(IP, std::make_pair(NewMI, std::make_pair(VirtReg, MRInfo)));
105 void VirtRegMap::print(std::ostream &OS) const {
106 const MRegisterInfo* MRI = MF.getTarget().getRegisterInfo();
108 OS << "********** REGISTER MAP **********\n";
109 for (unsigned i = MRegisterInfo::FirstVirtualRegister,
110 e = MF.getSSARegMap()->getLastVirtReg(); i <= e; ++i) {
111 if (Virt2PhysMap[i] != (unsigned)VirtRegMap::NO_PHYS_REG)
112 OS << "[reg" << i << " -> " << MRI->getName(Virt2PhysMap[i]) << "]\n";
116 for (unsigned i = MRegisterInfo::FirstVirtualRegister,
117 e = MF.getSSARegMap()->getLastVirtReg(); i <= e; ++i)
118 if (Virt2StackSlotMap[i] != VirtRegMap::NO_STACK_SLOT)
119 OS << "[reg" << i << " -> fi#" << Virt2StackSlotMap[i] << "]\n";
123 void VirtRegMap::dump() const { print(std::cerr); }
126 //===----------------------------------------------------------------------===//
127 // Simple Spiller Implementation
128 //===----------------------------------------------------------------------===//
130 Spiller::~Spiller() {}
133 struct SimpleSpiller : public Spiller {
134 bool runOnMachineFunction(MachineFunction& mf, const VirtRegMap &VRM);
138 bool SimpleSpiller::runOnMachineFunction(MachineFunction &MF,
139 const VirtRegMap &VRM) {
140 DEBUG(std::cerr << "********** REWRITE MACHINE CODE **********\n");
141 DEBUG(std::cerr << "********** Function: "
142 << MF.getFunction()->getName() << '\n');
143 const TargetMachine &TM = MF.getTarget();
144 const MRegisterInfo &MRI = *TM.getRegisterInfo();
145 bool *PhysRegsUsed = MF.getUsedPhysregs();
147 // LoadedRegs - Keep track of which vregs are loaded, so that we only load
148 // each vreg once (in the case where a spilled vreg is used by multiple
149 // operands). This is always smaller than the number of operands to the
150 // current machine instr, so it should be small.
151 std::vector<unsigned> LoadedRegs;
153 for (MachineFunction::iterator MBBI = MF.begin(), E = MF.end();
155 DEBUG(std::cerr << MBBI->getBasicBlock()->getName() << ":\n");
156 MachineBasicBlock &MBB = *MBBI;
157 for (MachineBasicBlock::iterator MII = MBB.begin(),
158 E = MBB.end(); MII != E; ++MII) {
159 MachineInstr &MI = *MII;
160 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
161 MachineOperand &MO = MI.getOperand(i);
162 if (MO.isRegister() && MO.getReg())
163 if (MRegisterInfo::isVirtualRegister(MO.getReg())) {
164 unsigned VirtReg = MO.getReg();
165 unsigned PhysReg = VRM.getPhys(VirtReg);
166 if (VRM.hasStackSlot(VirtReg)) {
167 int StackSlot = VRM.getStackSlot(VirtReg);
168 const TargetRegisterClass* RC =
169 MF.getSSARegMap()->getRegClass(VirtReg);
172 std::find(LoadedRegs.begin(), LoadedRegs.end(), VirtReg)
173 == LoadedRegs.end()) {
174 MRI.loadRegFromStackSlot(MBB, &MI, PhysReg, StackSlot, RC);
175 LoadedRegs.push_back(VirtReg);
177 DEBUG(std::cerr << '\t' << *prior(MII));
181 MRI.storeRegToStackSlot(MBB, next(MII), PhysReg, StackSlot, RC);
185 PhysRegsUsed[PhysReg] = true;
186 MI.SetMachineOperandReg(i, PhysReg);
188 PhysRegsUsed[MO.getReg()] = true;
192 DEBUG(std::cerr << '\t' << MI);
199 //===----------------------------------------------------------------------===//
200 // Local Spiller Implementation
201 //===----------------------------------------------------------------------===//
204 /// LocalSpiller - This spiller does a simple pass over the machine basic
205 /// block to attempt to keep spills in registers as much as possible for
206 /// blocks that have low register pressure (the vreg may be spilled due to
207 /// register pressure in other blocks).
208 class LocalSpiller : public Spiller {
209 const MRegisterInfo *MRI;
210 const TargetInstrInfo *TII;
212 bool runOnMachineFunction(MachineFunction &MF, const VirtRegMap &VRM) {
213 MRI = MF.getTarget().getRegisterInfo();
214 TII = MF.getTarget().getInstrInfo();
215 DEBUG(std::cerr << "\n**** Local spiller rewriting function '"
216 << MF.getFunction()->getName() << "':\n");
218 for (MachineFunction::iterator MBB = MF.begin(), E = MF.end();
220 RewriteMBB(*MBB, VRM);
224 void RewriteMBB(MachineBasicBlock &MBB, const VirtRegMap &VRM);
225 void ClobberPhysReg(unsigned PR, std::map<int, unsigned> &SpillSlots,
226 std::multimap<unsigned, int> &PhysRegs);
227 void ClobberPhysRegOnly(unsigned PR, std::map<int, unsigned> &SpillSlots,
228 std::multimap<unsigned, int> &PhysRegs);
229 void ModifyStackSlot(int Slot, std::map<int, unsigned> &SpillSlots,
230 std::multimap<unsigned, int> &PhysRegs);
234 /// AvailableSpills - As the local spiller is scanning and rewriting an MBB from
235 /// top down, keep track of which spills slots are available in each register.
237 /// Note that not all physregs are created equal here. In particular, some
238 /// physregs are reloads that we are allowed to clobber or ignore at any time.
239 /// Other physregs are values that the register allocated program is using that
240 /// we cannot CHANGE, but we can read if we like. We keep track of this on a
241 /// per-stack-slot basis as the low bit in the value of the SpillSlotsAvailable
242 /// entries. The predicate 'canClobberPhysReg()' checks this bit and
243 /// addAvailable sets it if.
244 class AvailableSpills {
245 const MRegisterInfo *MRI;
246 const TargetInstrInfo *TII;
248 // SpillSlotsAvailable - This map keeps track of all of the spilled virtual
249 // register values that are still available, due to being loaded or stored to,
250 // but not invalidated yet.
251 std::map<int, unsigned> SpillSlotsAvailable;
253 // PhysRegsAvailable - This is the inverse of SpillSlotsAvailable, indicating
254 // which stack slot values are currently held by a physreg. This is used to
255 // invalidate entries in SpillSlotsAvailable when a physreg is modified.
256 std::multimap<unsigned, int> PhysRegsAvailable;
258 void ClobberPhysRegOnly(unsigned PhysReg);
260 AvailableSpills(const MRegisterInfo *mri, const TargetInstrInfo *tii)
261 : MRI(mri), TII(tii) {
264 /// getSpillSlotPhysReg - If the specified stack slot is available in a
265 /// physical register, return that PhysReg, otherwise return 0.
266 unsigned getSpillSlotPhysReg(int Slot) const {
267 std::map<int, unsigned>::const_iterator I = SpillSlotsAvailable.find(Slot);
268 if (I != SpillSlotsAvailable.end())
269 return I->second >> 1; // Remove the CanClobber bit.
273 /// addAvailable - Mark that the specified stack slot is available in the
274 /// specified physreg. If CanClobber is true, the physreg can be modified at
275 /// any time without changing the semantics of the program.
276 void addAvailable(int Slot, unsigned Reg, bool CanClobber = true) {
277 // If this stack slot is thought to be available in some other physreg,
278 // remove its record.
279 ModifyStackSlot(Slot);
281 PhysRegsAvailable.insert(std::make_pair(Reg, Slot));
282 SpillSlotsAvailable[Slot] = (Reg << 1) | (unsigned)CanClobber;
284 DEBUG(std::cerr << "Remembering SS#" << Slot << " in physreg "
285 << MRI->getName(Reg) << "\n");
288 /// canClobberPhysReg - Return true if the spiller is allowed to change the
289 /// value of the specified stackslot register if it desires. The specified
290 /// stack slot must be available in a physreg for this query to make sense.
291 bool canClobberPhysReg(int Slot) const {
292 assert(SpillSlotsAvailable.count(Slot) && "Slot not available!");
293 return SpillSlotsAvailable.find(Slot)->second & 1;
296 /// ClobberPhysReg - This is called when the specified physreg changes
297 /// value. We use this to invalidate any info about stuff we thing lives in
298 /// it and any of its aliases.
299 void ClobberPhysReg(unsigned PhysReg);
301 /// ModifyStackSlot - This method is called when the value in a stack slot
302 /// changes. This removes information about which register the previous value
303 /// for this slot lives in (as the previous value is dead now).
304 void ModifyStackSlot(int Slot);
307 /// ClobberPhysRegOnly - This is called when the specified physreg changes
308 /// value. We use this to invalidate any info about stuff we thing lives in it.
309 void AvailableSpills::ClobberPhysRegOnly(unsigned PhysReg) {
310 std::multimap<unsigned, int>::iterator I =
311 PhysRegsAvailable.lower_bound(PhysReg);
312 while (I != PhysRegsAvailable.end() && I->first == PhysReg) {
313 int Slot = I->second;
314 PhysRegsAvailable.erase(I++);
315 assert((SpillSlotsAvailable[Slot] >> 1) == PhysReg &&
316 "Bidirectional map mismatch!");
317 SpillSlotsAvailable.erase(Slot);
318 DEBUG(std::cerr << "PhysReg " << MRI->getName(PhysReg)
319 << " clobbered, invalidating SS#" << Slot << "\n");
323 /// ClobberPhysReg - This is called when the specified physreg changes
324 /// value. We use this to invalidate any info about stuff we thing lives in
325 /// it and any of its aliases.
326 void AvailableSpills::ClobberPhysReg(unsigned PhysReg) {
327 for (const unsigned *AS = MRI->getAliasSet(PhysReg); *AS; ++AS)
328 ClobberPhysRegOnly(*AS);
329 ClobberPhysRegOnly(PhysReg);
332 /// ModifyStackSlot - This method is called when the value in a stack slot
333 /// changes. This removes information about which register the previous value
334 /// for this slot lives in (as the previous value is dead now).
335 void AvailableSpills::ModifyStackSlot(int Slot) {
336 std::map<int, unsigned>::iterator It = SpillSlotsAvailable.find(Slot);
337 if (It == SpillSlotsAvailable.end()) return;
338 unsigned Reg = It->second >> 1;
339 SpillSlotsAvailable.erase(It);
341 // This register may hold the value of multiple stack slots, only remove this
342 // stack slot from the set of values the register contains.
343 std::multimap<unsigned, int>::iterator I = PhysRegsAvailable.lower_bound(Reg);
345 assert(I != PhysRegsAvailable.end() && I->first == Reg &&
346 "Map inverse broken!");
347 if (I->second == Slot) break;
349 PhysRegsAvailable.erase(I);
354 // ReusedOp - For each reused operand, we keep track of a bit of information, in
355 // case we need to rollback upon processing a new operand. See comments below.
358 // The MachineInstr operand that reused an available value.
361 // StackSlot - The spill slot of the value being reused.
364 // PhysRegReused - The physical register the value was available in.
365 unsigned PhysRegReused;
367 // AssignedPhysReg - The physreg that was assigned for use by the reload.
368 unsigned AssignedPhysReg;
370 // VirtReg - The virtual register itself.
373 ReusedOp(unsigned o, unsigned ss, unsigned prr, unsigned apr,
375 : Operand(o), StackSlot(ss), PhysRegReused(prr), AssignedPhysReg(apr),
381 /// rewriteMBB - Keep track of which spills are available even after the
382 /// register allocator is done with them. If possible, avoid reloading vregs.
383 void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, const VirtRegMap &VRM) {
385 DEBUG(std::cerr << MBB.getBasicBlock()->getName() << ":\n");
387 // Spills - Keep track of which spilled values are available in physregs so
388 // that we can choose to reuse the physregs instead of emitting reloads.
389 AvailableSpills Spills(MRI, TII);
391 std::vector<ReusedOp> ReusedOperands;
393 // DefAndUseVReg - When we see a def&use operand that is spilled, keep track
394 // of it. ".first" is the machine operand index (should always be 0 for now),
395 // and ".second" is the virtual register that is spilled.
396 std::vector<std::pair<unsigned, unsigned> > DefAndUseVReg;
398 // MaybeDeadStores - When we need to write a value back into a stack slot,
399 // keep track of the inserted store. If the stack slot value is never read
400 // (because the value was used from some available register, for example), and
401 // subsequently stored to, the original store is dead. This map keeps track
402 // of inserted stores that are not used. If we see a subsequent store to the
403 // same stack slot, the original store is deleted.
404 std::map<int, MachineInstr*> MaybeDeadStores;
406 bool *PhysRegsUsed = MBB.getParent()->getUsedPhysregs();
408 for (MachineBasicBlock::iterator MII = MBB.begin(), E = MBB.end();
410 MachineInstr &MI = *MII;
411 MachineBasicBlock::iterator NextMII = MII; ++NextMII;
413 ReusedOperands.clear();
414 DefAndUseVReg.clear();
416 // Process all of the spilled uses and all non spilled reg references.
417 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
418 MachineOperand &MO = MI.getOperand(i);
419 if (!MO.isRegister() || MO.getReg() == 0)
420 continue; // Ignore non-register operands.
422 if (MRegisterInfo::isPhysicalRegister(MO.getReg())) {
423 // Ignore physregs for spilling, but remember that it is used by this
425 PhysRegsUsed[MO.getReg()] = true;
429 assert(MRegisterInfo::isVirtualRegister(MO.getReg()) &&
430 "Not a virtual or a physical register?");
432 unsigned VirtReg = MO.getReg();
433 if (!VRM.hasStackSlot(VirtReg)) {
434 // This virtual register was assigned a physreg!
435 unsigned Phys = VRM.getPhys(VirtReg);
436 PhysRegsUsed[Phys] = true;
437 MI.SetMachineOperandReg(i, Phys);
441 // This virtual register is now known to be a spilled value.
443 continue; // Handle defs in the loop below (handle use&def here though)
445 // If this is both a def and a use, we need to emit a store to the
446 // stack slot after the instruction. Keep track of D&U operands
447 // because we are about to change it to a physreg here.
449 // Remember that this was a def-and-use operand, and that the
450 // stack slot is live after this instruction executes.
451 DefAndUseVReg.push_back(std::make_pair(i, VirtReg));
454 int StackSlot = VRM.getStackSlot(VirtReg);
457 // Check to see if this stack slot is available.
458 if ((PhysReg = Spills.getSpillSlotPhysReg(StackSlot)) &&
459 // Don't reuse it for a def&use operand if we aren't allowed to change
461 (!MO.isDef() || Spills.canClobberPhysReg(StackSlot))) {
462 // If this stack slot value is already available, reuse it!
463 DEBUG(std::cerr << "Reusing SS#" << StackSlot << " from physreg "
464 << MRI->getName(PhysReg) << " for vreg"
465 << VirtReg <<" instead of reloading into physreg "
466 << MRI->getName(VRM.getPhys(VirtReg)) << "\n");
467 MI.SetMachineOperandReg(i, PhysReg);
469 // The only technical detail we have is that we don't know that
470 // PhysReg won't be clobbered by a reloaded stack slot that occurs
471 // later in the instruction. In particular, consider 'op V1, V2'.
472 // If V1 is available in physreg R0, we would choose to reuse it
473 // here, instead of reloading it into the register the allocator
474 // indicated (say R1). However, V2 might have to be reloaded
475 // later, and it might indicate that it needs to live in R0. When
476 // this occurs, we need to have information available that
477 // indicates it is safe to use R1 for the reload instead of R0.
479 // To further complicate matters, we might conflict with an alias,
480 // or R0 and R1 might not be compatible with each other. In this
481 // case, we actually insert a reload for V1 in R1, ensuring that
482 // we can get at R0 or its alias.
483 ReusedOperands.push_back(ReusedOp(i, StackSlot, PhysReg,
484 VRM.getPhys(VirtReg), VirtReg));
489 // Otherwise, reload it and remember that we have it.
490 PhysReg = VRM.getPhys(VirtReg);
491 assert(PhysReg && "Must map virtreg to physreg!");
492 const TargetRegisterClass* RC =
493 MBB.getParent()->getSSARegMap()->getRegClass(VirtReg);
496 // Note that, if we reused a register for a previous operand, the
497 // register we want to reload into might not actually be
498 // available. If this occurs, use the register indicated by the
500 if (!ReusedOperands.empty()) // This is most often empty.
501 for (unsigned ro = 0, e = ReusedOperands.size(); ro != e; ++ro)
502 if (ReusedOperands[ro].PhysRegReused == PhysReg) {
503 // Yup, use the reload register that we didn't use before.
504 PhysReg = ReusedOperands[ro].AssignedPhysReg;
505 goto RecheckRegister;
507 ReusedOp &Op = ReusedOperands[ro];
508 unsigned PRRU = Op.PhysRegReused;
509 if (MRI->areAliases(PRRU, PhysReg)) {
510 // Okay, we found out that an alias of a reused register
511 // was used. This isn't good because it means we have
512 // to undo a previous reuse.
513 const TargetRegisterClass *AliasRC =
514 MBB.getParent()->getSSARegMap()->getRegClass(Op.VirtReg);
515 MRI->loadRegFromStackSlot(MBB, &MI, Op.AssignedPhysReg,
516 Op.StackSlot, AliasRC);
517 Spills.ClobberPhysReg(Op.AssignedPhysReg);
518 Spills.ClobberPhysReg(Op.PhysRegReused);
520 // Any stores to this stack slot are not dead anymore.
521 MaybeDeadStores.erase(Op.StackSlot);
523 MI.SetMachineOperandReg(Op.Operand, Op.AssignedPhysReg);
525 Spills.addAvailable(Op.StackSlot, Op.AssignedPhysReg);
527 DEBUG(std::cerr << '\t' << *prior(MII));
529 DEBUG(std::cerr << "Reuse undone!\n");
530 ReusedOperands.erase(ReusedOperands.begin()+ro);
536 PhysRegsUsed[PhysReg] = true;
537 MRI->loadRegFromStackSlot(MBB, &MI, PhysReg, StackSlot, RC);
538 // This invalidates PhysReg.
539 Spills.ClobberPhysReg(PhysReg);
541 // Any stores to this stack slot are not dead anymore.
542 MaybeDeadStores.erase(StackSlot);
543 Spills.addAvailable(StackSlot, PhysReg);
545 MI.SetMachineOperandReg(i, PhysReg);
546 DEBUG(std::cerr << '\t' << *prior(MII));
549 // Loop over all of the implicit defs, clearing them from our available
551 for (const unsigned *ImpDef = TII->getImplicitDefs(MI.getOpcode());
553 PhysRegsUsed[*ImpDef] = true;
554 Spills.ClobberPhysReg(*ImpDef);
557 DEBUG(std::cerr << '\t' << MI);
559 // If we have folded references to memory operands, make sure we clear all
560 // physical registers that may contain the value of the spilled virtual
562 VirtRegMap::MI2VirtMapTy::const_iterator I, End;
563 for (tie(I, End) = VRM.getFoldedVirts(&MI); I != End; ++I) {
564 DEBUG(std::cerr << "Folded vreg: " << I->second.first << " MR: "
565 << I->second.second);
566 unsigned VirtReg = I->second.first;
567 VirtRegMap::ModRef MR = I->second.second;
568 if (!VRM.hasStackSlot(VirtReg)) {
569 DEBUG(std::cerr << ": No stack slot!\n");
572 int SS = VRM.getStackSlot(VirtReg);
573 DEBUG(std::cerr << " - StackSlot: " << SS << "\n");
575 // If this folded instruction is just a use, check to see if it's a
576 // straight load from the virt reg slot.
577 if ((MR & VirtRegMap::isRef) && !(MR & VirtRegMap::isMod)) {
579 if (unsigned DestReg = TII->isLoadFromStackSlot(&MI, FrameIdx)) {
580 // If this spill slot is available, turn it into a copy (or nothing)
581 // instead of leaving it as a load!
583 if (FrameIdx == SS && (InReg = Spills.getSpillSlotPhysReg(SS))) {
584 DEBUG(std::cerr << "Promoted Load To Copy: " << MI);
585 MachineFunction &MF = *MBB.getParent();
586 if (DestReg != InReg) {
587 MRI->copyRegToReg(MBB, &MI, DestReg, InReg,
588 MF.getSSARegMap()->getRegClass(VirtReg));
589 // Revisit the copy so we make sure to notice the effects of the
590 // operation on the destreg (either needing to RA it if it's
591 // virtual or needing to clobber any values if it's physical).
593 --NextMII; // backtrack to the copy.
596 goto ProcessNextInst;
601 // If this reference is not a use, any previous store is now dead.
602 // Otherwise, the store to this stack slot is not dead anymore.
603 std::map<int, MachineInstr*>::iterator MDSI = MaybeDeadStores.find(SS);
604 if (MDSI != MaybeDeadStores.end()) {
605 if (MR & VirtRegMap::isRef) // Previous store is not dead.
606 MaybeDeadStores.erase(MDSI);
608 // If we get here, the store is dead, nuke it now.
609 assert(MR == VirtRegMap::isMod && "Can't be modref!");
610 MBB.erase(MDSI->second);
611 MaybeDeadStores.erase(MDSI);
616 // If the spill slot value is available, and this is a new definition of
617 // the value, the value is not available anymore.
618 if (MR & VirtRegMap::isMod) {
619 // Notice that the value in this stack slot has been modified.
620 Spills.ModifyStackSlot(SS);
622 // If this is *just* a mod of the value, check to see if this is just a
623 // store to the spill slot (i.e. the spill got merged into the copy). If
624 // so, realize that the vreg is available now, and add the store to the
625 // MaybeDeadStore info.
627 if (!(MR & VirtRegMap::isRef)) {
628 if (unsigned SrcReg = TII->isStoreToStackSlot(&MI, StackSlot)) {
629 assert(MRegisterInfo::isPhysicalRegister(SrcReg) &&
630 "Src hasn't been allocated yet?");
631 // Okay, this is certainly a store of SrcReg to [StackSlot]. Mark
632 // this as a potentially dead store in case there is a subsequent
633 // store into the stack slot without a read from it.
634 MaybeDeadStores[StackSlot] = &MI;
636 // If the stack slot value was previously available in some other
637 // register, change it now. Otherwise, make the register available,
639 Spills.addAvailable(StackSlot, SrcReg, false /*don't clobber*/);
645 // Process all of the spilled defs.
646 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
647 MachineOperand &MO = MI.getOperand(i);
648 if (MO.isRegister() && MO.getReg() && MO.isDef()) {
649 unsigned VirtReg = MO.getReg();
651 if (!MRegisterInfo::isVirtualRegister(VirtReg)) {
652 // Check to see if this is a def-and-use vreg operand that we do need
653 // to insert a store for.
654 bool OpTakenCareOf = false;
655 if (MO.isUse() && !DefAndUseVReg.empty()) {
656 for (unsigned dau = 0, e = DefAndUseVReg.size(); dau != e; ++dau)
657 if (DefAndUseVReg[dau].first == i) {
658 VirtReg = DefAndUseVReg[dau].second;
659 OpTakenCareOf = true;
664 if (!OpTakenCareOf) {
665 // Check to see if this is a noop copy. If so, eliminate the
666 // instruction before considering the dest reg to be changed.
668 if (TII->isMoveInstr(MI, Src, Dst) && Src == Dst) {
670 DEBUG(std::cerr << "Removing now-noop copy: " << MI);
672 goto ProcessNextInst;
674 Spills.ClobberPhysReg(VirtReg);
679 // The only vregs left are stack slot definitions.
680 int StackSlot = VRM.getStackSlot(VirtReg);
681 const TargetRegisterClass *RC =
682 MBB.getParent()->getSSARegMap()->getRegClass(VirtReg);
685 // If this is a def&use operand, and we used a different physreg for
686 // it than the one assigned, make sure to execute the store from the
687 // correct physical register.
688 if (MO.getReg() == VirtReg)
689 PhysReg = VRM.getPhys(VirtReg);
691 PhysReg = MO.getReg();
693 PhysRegsUsed[PhysReg] = true;
694 MRI->storeRegToStackSlot(MBB, next(MII), PhysReg, StackSlot, RC);
695 DEBUG(std::cerr << "Store:\t" << *next(MII));
696 MI.SetMachineOperandReg(i, PhysReg);
698 // Check to see if this is a noop copy. If so, eliminate the
699 // instruction before considering the dest reg to be changed.
702 if (TII->isMoveInstr(MI, Src, Dst) && Src == Dst) {
704 DEBUG(std::cerr << "Removing now-noop copy: " << MI);
706 goto ProcessNextInst;
710 // If there is a dead store to this stack slot, nuke it now.
711 MachineInstr *&LastStore = MaybeDeadStores[StackSlot];
713 DEBUG(std::cerr << " Killed store:\t" << *LastStore);
715 MBB.erase(LastStore);
717 LastStore = next(MII);
719 // If the stack slot value was previously available in some other
720 // register, change it now. Otherwise, make the register available,
722 Spills.ModifyStackSlot(StackSlot);
723 Spills.ClobberPhysReg(PhysReg);
724 Spills.addAvailable(StackSlot, PhysReg);
735 llvm::Spiller* llvm::createSpiller() {
736 switch (SpillerOpt) {
737 default: assert(0 && "Unreachable!");
739 return new LocalSpiller();
741 return new SimpleSpiller();