1 //===-- llvm/CodeGen/VirtRegMap.h - Virtual Register Map -*- C++ -*--------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements a virtual register map. This maps virtual registers to
11 // physical registers and virtual registers to stack slots. It is created and
12 // updated by a register allocator and then used by a machine code rewriter that
13 // adds spill code and rewrites virtual into physical register references.
15 //===----------------------------------------------------------------------===//
17 #ifndef LLVM_CODEGEN_VIRTREGMAP_H
18 #define LLVM_CODEGEN_VIRTREGMAP_H
20 #include "llvm/Target/TargetRegisterInfo.h"
21 #include "llvm/ADT/BitVector.h"
22 #include "llvm/ADT/IndexedMap.h"
23 #include "llvm/ADT/SmallPtrSet.h"
24 #include "llvm/Support/Streams.h"
29 class MachineFunction;
30 class TargetInstrInfo;
36 NO_STACK_SLOT = (1L << 30)-1,
37 MAX_STACK_SLOT = (1L << 18)-1
40 enum ModRef { isRef = 1, isMod = 2, isModRef = 3 };
41 typedef std::multimap<MachineInstr*,
42 std::pair<unsigned, ModRef> > MI2VirtMapTy;
45 const TargetInstrInfo &TII;
48 /// Virt2PhysMap - This is a virtual to physical register
49 /// mapping. Each virtual register is required to have an entry in
50 /// it; even spilled virtual registers (the register mapped to a
51 /// spilled register is the temporary used to load it from the
53 IndexedMap<unsigned, VirtReg2IndexFunctor> Virt2PhysMap;
55 /// Virt2StackSlotMap - This is virtual register to stack slot
56 /// mapping. Each spilled virtual register has an entry in it
57 /// which corresponds to the stack slot this register is spilled
59 IndexedMap<int, VirtReg2IndexFunctor> Virt2StackSlotMap;
61 /// Virt2ReMatIdMap - This is virtual register to rematerialization id
62 /// mapping. Each spilled virtual register that should be remat'd has an
63 /// entry in it which corresponds to the remat id.
64 IndexedMap<int, VirtReg2IndexFunctor> Virt2ReMatIdMap;
66 /// Virt2SplitMap - This is virtual register to splitted virtual register
68 IndexedMap<unsigned, VirtReg2IndexFunctor> Virt2SplitMap;
70 /// Virt2SplitKillMap - This is splitted virtual register to its last use
71 /// (kill) index mapping.
72 IndexedMap<unsigned> Virt2SplitKillMap;
74 /// ReMatMap - This is virtual register to re-materialized instruction
75 /// mapping. Each virtual register whose definition is going to be
76 /// re-materialized has an entry in it.
77 IndexedMap<MachineInstr*, VirtReg2IndexFunctor> ReMatMap;
79 /// MI2VirtMap - This is MachineInstr to virtual register
80 /// mapping. In the case of memory spill code being folded into
81 /// instructions, we need to know which virtual register was
82 /// read/written by this instruction.
83 MI2VirtMapTy MI2VirtMap;
85 /// SpillPt2VirtMap - This records the virtual registers which should
86 /// be spilled right after the MachineInstr due to live interval
88 std::map<MachineInstr*, std::vector<std::pair<unsigned,bool> > >
91 /// RestorePt2VirtMap - This records the virtual registers which should
92 /// be restored right before the MachineInstr due to live interval
94 std::map<MachineInstr*, std::vector<unsigned> > RestorePt2VirtMap;
96 /// EmergencySpillMap - This records the physical registers that should
97 /// be spilled / restored around the MachineInstr since the register
98 /// allocator has run out of registers.
99 std::map<MachineInstr*, std::vector<unsigned> > EmergencySpillMap;
101 /// EmergencySpillSlots - This records emergency spill slots used to
102 /// spill physical registers when the register allocator runs out of
103 /// registers. Ideally only one stack slot is used per function per
105 std::map<const TargetRegisterClass*, int> EmergencySpillSlots;
107 /// ReMatId - Instead of assigning a stack slot to a to be rematerialized
108 /// virtual register, an unique id is being assigned. This keeps track of
109 /// the highest id used so far. Note, this starts at (1<<18) to avoid
110 /// conflicts with stack slot numbers.
113 /// LowSpillSlot, HighSpillSlot - Lowest and highest spill slot indexes.
114 int LowSpillSlot, HighSpillSlot;
116 /// SpillSlotToUsesMap - Records uses for each register spill slot.
117 SmallVector<SmallPtrSet<MachineInstr*, 4>, 8> SpillSlotToUsesMap;
119 /// ImplicitDefed - One bit for each virtual register. If set it indicates
120 /// the register is implicitly defined.
121 BitVector ImplicitDefed;
123 VirtRegMap(const VirtRegMap&); // DO NOT IMPLEMENT
124 void operator=(const VirtRegMap&); // DO NOT IMPLEMENT
127 explicit VirtRegMap(MachineFunction &mf);
131 /// @brief returns true if the specified virtual register is
132 /// mapped to a physical register
133 bool hasPhys(unsigned virtReg) const {
134 return getPhys(virtReg) != NO_PHYS_REG;
137 /// @brief returns the physical register mapped to the specified
139 unsigned getPhys(unsigned virtReg) const {
140 assert(TargetRegisterInfo::isVirtualRegister(virtReg));
141 return Virt2PhysMap[virtReg];
144 /// @brief creates a mapping for the specified virtual register to
145 /// the specified physical register
146 void assignVirt2Phys(unsigned virtReg, unsigned physReg) {
147 assert(TargetRegisterInfo::isVirtualRegister(virtReg) &&
148 TargetRegisterInfo::isPhysicalRegister(physReg));
149 assert(Virt2PhysMap[virtReg] == NO_PHYS_REG &&
150 "attempt to assign physical register to already mapped "
152 Virt2PhysMap[virtReg] = physReg;
155 /// @brief clears the specified virtual register's, physical
157 void clearVirt(unsigned virtReg) {
158 assert(TargetRegisterInfo::isVirtualRegister(virtReg));
159 assert(Virt2PhysMap[virtReg] != NO_PHYS_REG &&
160 "attempt to clear a not assigned virtual register");
161 Virt2PhysMap[virtReg] = NO_PHYS_REG;
164 /// @brief clears all virtual to physical register mappings
165 void clearAllVirt() {
166 Virt2PhysMap.clear();
170 /// @brief records virtReg is a split live interval from SReg.
171 void setIsSplitFromReg(unsigned virtReg, unsigned SReg) {
172 Virt2SplitMap[virtReg] = SReg;
175 /// @brief returns the live interval virtReg is split from.
176 unsigned getPreSplitReg(unsigned virtReg) {
177 return Virt2SplitMap[virtReg];
180 /// @brief returns true if the specified virtual register is not
181 /// mapped to a stack slot or rematerialized.
182 bool isAssignedReg(unsigned virtReg) const {
183 if (getStackSlot(virtReg) == NO_STACK_SLOT &&
184 getReMatId(virtReg) == NO_STACK_SLOT)
186 // Split register can be assigned a physical register as well as a
187 // stack slot or remat id.
188 return (Virt2SplitMap[virtReg] && Virt2PhysMap[virtReg] != NO_PHYS_REG);
191 /// @brief returns the stack slot mapped to the specified virtual
193 int getStackSlot(unsigned virtReg) const {
194 assert(TargetRegisterInfo::isVirtualRegister(virtReg));
195 return Virt2StackSlotMap[virtReg];
198 /// @brief returns the rematerialization id mapped to the specified virtual
200 int getReMatId(unsigned virtReg) const {
201 assert(TargetRegisterInfo::isVirtualRegister(virtReg));
202 return Virt2ReMatIdMap[virtReg];
205 /// @brief create a mapping for the specifed virtual register to
206 /// the next available stack slot
207 int assignVirt2StackSlot(unsigned virtReg);
208 /// @brief create a mapping for the specified virtual register to
209 /// the specified stack slot
210 void assignVirt2StackSlot(unsigned virtReg, int frameIndex);
212 /// @brief assign an unique re-materialization id to the specified
213 /// virtual register.
214 int assignVirtReMatId(unsigned virtReg);
215 /// @brief assign an unique re-materialization id to the specified
216 /// virtual register.
217 void assignVirtReMatId(unsigned virtReg, int id);
219 /// @brief returns true if the specified virtual register is being
221 bool isReMaterialized(unsigned virtReg) const {
222 return ReMatMap[virtReg] != NULL;
225 /// @brief returns the original machine instruction being re-issued
226 /// to re-materialize the specified virtual register.
227 MachineInstr *getReMaterializedMI(unsigned virtReg) const {
228 return ReMatMap[virtReg];
231 /// @brief records the specified virtual register will be
232 /// re-materialized and the original instruction which will be re-issed
233 /// for this purpose. If parameter all is true, then all uses of the
234 /// registers are rematerialized and it's safe to delete the definition.
235 void setVirtIsReMaterialized(unsigned virtReg, MachineInstr *def) {
236 ReMatMap[virtReg] = def;
239 /// @brief record the last use (kill) of a split virtual register.
240 void addKillPoint(unsigned virtReg, unsigned index) {
241 Virt2SplitKillMap[virtReg] = index;
244 unsigned getKillPoint(unsigned virtReg) const {
245 return Virt2SplitKillMap[virtReg];
248 /// @brief remove the last use (kill) of a split virtual register.
249 void removeKillPoint(unsigned virtReg) {
250 Virt2SplitKillMap[virtReg] = 0;
253 /// @brief returns true if the specified MachineInstr is a spill point.
254 bool isSpillPt(MachineInstr *Pt) const {
255 return SpillPt2VirtMap.find(Pt) != SpillPt2VirtMap.end();
258 /// @brief returns the virtual registers that should be spilled due to
259 /// splitting right after the specified MachineInstr.
260 std::vector<std::pair<unsigned,bool> > &getSpillPtSpills(MachineInstr *Pt) {
261 return SpillPt2VirtMap[Pt];
264 /// @brief records the specified MachineInstr as a spill point for virtReg.
265 void addSpillPoint(unsigned virtReg, bool isKill, MachineInstr *Pt) {
266 if (SpillPt2VirtMap.find(Pt) != SpillPt2VirtMap.end())
267 SpillPt2VirtMap[Pt].push_back(std::make_pair(virtReg, isKill));
269 std::vector<std::pair<unsigned,bool> > Virts;
270 Virts.push_back(std::make_pair(virtReg, isKill));
271 SpillPt2VirtMap.insert(std::make_pair(Pt, Virts));
275 /// @brief - transfer spill point information from one instruction to
277 void transferSpillPts(MachineInstr *Old, MachineInstr *New) {
278 std::map<MachineInstr*,std::vector<std::pair<unsigned,bool> > >::iterator
279 I = SpillPt2VirtMap.find(Old);
280 if (I == SpillPt2VirtMap.end())
282 while (!I->second.empty()) {
283 unsigned virtReg = I->second.back().first;
284 bool isKill = I->second.back().second;
285 I->second.pop_back();
286 addSpillPoint(virtReg, isKill, New);
288 SpillPt2VirtMap.erase(I);
291 /// @brief returns true if the specified MachineInstr is a restore point.
292 bool isRestorePt(MachineInstr *Pt) const {
293 return RestorePt2VirtMap.find(Pt) != RestorePt2VirtMap.end();
296 /// @brief returns the virtual registers that should be restoreed due to
297 /// splitting right after the specified MachineInstr.
298 std::vector<unsigned> &getRestorePtRestores(MachineInstr *Pt) {
299 return RestorePt2VirtMap[Pt];
302 /// @brief records the specified MachineInstr as a restore point for virtReg.
303 void addRestorePoint(unsigned virtReg, MachineInstr *Pt) {
304 if (RestorePt2VirtMap.find(Pt) != RestorePt2VirtMap.end())
305 RestorePt2VirtMap[Pt].push_back(virtReg);
307 std::vector<unsigned> Virts;
308 Virts.push_back(virtReg);
309 RestorePt2VirtMap.insert(std::make_pair(Pt, Virts));
313 /// @brief - transfer restore point information from one instruction to
315 void transferRestorePts(MachineInstr *Old, MachineInstr *New) {
316 std::map<MachineInstr*,std::vector<unsigned> >::iterator I =
317 RestorePt2VirtMap.find(Old);
318 if (I == RestorePt2VirtMap.end())
320 while (!I->second.empty()) {
321 unsigned virtReg = I->second.back();
322 I->second.pop_back();
323 addRestorePoint(virtReg, New);
325 RestorePt2VirtMap.erase(I);
328 /// @brief records that the specified physical register must be spilled
329 /// around the specified machine instr.
330 void addEmergencySpill(unsigned PhysReg, MachineInstr *MI) {
331 if (EmergencySpillMap.find(MI) != EmergencySpillMap.end())
332 EmergencySpillMap[MI].push_back(PhysReg);
334 std::vector<unsigned> PhysRegs;
335 PhysRegs.push_back(PhysReg);
336 EmergencySpillMap.insert(std::make_pair(MI, PhysRegs));
340 /// @brief returns true if one or more physical registers must be spilled
341 /// around the specified instruction.
342 bool hasEmergencySpills(MachineInstr *MI) const {
343 return EmergencySpillMap.find(MI) != EmergencySpillMap.end();
346 /// @brief returns the physical registers to be spilled and restored around
348 std::vector<unsigned> &getEmergencySpills(MachineInstr *MI) {
349 return EmergencySpillMap[MI];
352 /// @brief - transfer emergency spill information from one instruction to
354 void transferEmergencySpills(MachineInstr *Old, MachineInstr *New) {
355 std::map<MachineInstr*,std::vector<unsigned> >::iterator I =
356 EmergencySpillMap.find(Old);
357 if (I == EmergencySpillMap.end())
359 while (!I->second.empty()) {
360 unsigned virtReg = I->second.back();
361 I->second.pop_back();
362 addEmergencySpill(virtReg, New);
364 EmergencySpillMap.erase(I);
367 /// @brief return or get a emergency spill slot for the register class.
368 int getEmergencySpillSlot(const TargetRegisterClass *RC);
370 /// @brief Return lowest spill slot index.
371 int getLowSpillSlot() const {
375 /// @brief Return highest spill slot index.
376 int getHighSpillSlot() const {
377 return HighSpillSlot;
380 /// @brief Records a spill slot use.
381 void addSpillSlotUse(int FrameIndex, MachineInstr *MI);
383 /// @brief Returns true if spill slot has been used.
384 bool isSpillSlotUsed(int FrameIndex) const {
385 assert(FrameIndex >= 0 && "Spill slot index should not be negative!");
386 return !SpillSlotToUsesMap[FrameIndex-LowSpillSlot].empty();
389 /// @brief Mark the specified register as being implicitly defined.
390 void setIsImplicitlyDefined(unsigned VirtReg) {
391 ImplicitDefed.set(VirtReg-TargetRegisterInfo::FirstVirtualRegister);
394 /// @brief Returns true if the virtual register is implicitly defined.
395 bool isImplicitlyDefined(unsigned VirtReg) const {
396 return ImplicitDefed[VirtReg-TargetRegisterInfo::FirstVirtualRegister];
399 /// @brief Updates information about the specified virtual register's value
400 /// folded into newMI machine instruction.
401 void virtFolded(unsigned VirtReg, MachineInstr *OldMI, MachineInstr *NewMI,
404 /// @brief Updates information about the specified virtual register's value
405 /// folded into the specified machine instruction.
406 void virtFolded(unsigned VirtReg, MachineInstr *MI, ModRef MRInfo);
408 /// @brief returns the virtual registers' values folded in memory
409 /// operands of this instruction
410 std::pair<MI2VirtMapTy::const_iterator, MI2VirtMapTy::const_iterator>
411 getFoldedVirts(MachineInstr* MI) const {
412 return MI2VirtMap.equal_range(MI);
415 /// RemoveMachineInstrFromMaps - MI is being erased, remove it from the
416 /// the folded instruction map and spill point map.
417 void RemoveMachineInstrFromMaps(MachineInstr *MI);
419 void print(std::ostream &OS) const;
420 void print(std::ostream *OS) const { if (OS) print(*OS); }
424 inline std::ostream *operator<<(std::ostream *OS, const VirtRegMap &VRM) {
428 inline std::ostream &operator<<(std::ostream &OS, const VirtRegMap &VRM) {
433 /// Spiller interface: Implementations of this interface assign spilled
434 /// virtual registers to stack slots, rewriting the code.
437 virtual bool runOnMachineFunction(MachineFunction &MF,
438 VirtRegMap &VRM) = 0;
441 /// createSpiller - Create an return a spiller object, as specified on the
443 Spiller* createSpiller();
445 } // End llvm namespace