1 //===-- llvm/CodeGen/VirtRegMap.h - Virtual Register Map -*- C++ -*--------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements a virtual register map. This maps virtual registers to
11 // physical registers and virtual registers to stack slots. It is created and
12 // updated by a register allocator and then used by a machine code rewriter that
13 // adds spill code and rewrites virtual into physical register references.
15 //===----------------------------------------------------------------------===//
17 #ifndef LLVM_CODEGEN_VIRTREGMAP_H
18 #define LLVM_CODEGEN_VIRTREGMAP_H
20 #include "llvm/CodeGen/MachineFunctionPass.h"
21 #include "llvm/CodeGen/LiveInterval.h"
22 #include "llvm/Target/TargetRegisterInfo.h"
23 #include "llvm/ADT/BitVector.h"
24 #include "llvm/ADT/DenseMap.h"
25 #include "llvm/ADT/IndexedMap.h"
26 #include "llvm/ADT/SmallPtrSet.h"
27 #include "llvm/ADT/SmallVector.h"
33 class MachineFunction;
34 class MachineRegisterInfo;
35 class TargetInstrInfo;
36 class TargetRegisterInfo;
40 class VirtRegMap : public MachineFunctionPass {
44 NO_STACK_SLOT = (1L << 30)-1,
45 MAX_STACK_SLOT = (1L << 18)-1
48 enum ModRef { isRef = 1, isMod = 2, isModRef = 3 };
49 typedef std::multimap<MachineInstr*,
50 std::pair<unsigned, ModRef> > MI2VirtMapTy;
53 MachineRegisterInfo *MRI;
54 const TargetInstrInfo *TII;
55 const TargetRegisterInfo *TRI;
58 DenseMap<const TargetRegisterClass*, BitVector> allocatableRCRegs;
60 /// Virt2PhysMap - This is a virtual to physical register
61 /// mapping. Each virtual register is required to have an entry in
62 /// it; even spilled virtual registers (the register mapped to a
63 /// spilled register is the temporary used to load it from the
65 IndexedMap<unsigned, VirtReg2IndexFunctor> Virt2PhysMap;
67 /// Virt2StackSlotMap - This is virtual register to stack slot
68 /// mapping. Each spilled virtual register has an entry in it
69 /// which corresponds to the stack slot this register is spilled
71 IndexedMap<int, VirtReg2IndexFunctor> Virt2StackSlotMap;
73 /// Virt2ReMatIdMap - This is virtual register to rematerialization id
74 /// mapping. Each spilled virtual register that should be remat'd has an
75 /// entry in it which corresponds to the remat id.
76 IndexedMap<int, VirtReg2IndexFunctor> Virt2ReMatIdMap;
78 /// Virt2SplitMap - This is virtual register to splitted virtual register
80 IndexedMap<unsigned, VirtReg2IndexFunctor> Virt2SplitMap;
82 /// Virt2SplitKillMap - This is splitted virtual register to its last use
83 /// (kill) index mapping.
84 IndexedMap<SlotIndex, VirtReg2IndexFunctor> Virt2SplitKillMap;
86 /// ReMatMap - This is virtual register to re-materialized instruction
87 /// mapping. Each virtual register whose definition is going to be
88 /// re-materialized has an entry in it.
89 IndexedMap<MachineInstr*, VirtReg2IndexFunctor> ReMatMap;
91 /// MI2VirtMap - This is MachineInstr to virtual register
92 /// mapping. In the case of memory spill code being folded into
93 /// instructions, we need to know which virtual register was
94 /// read/written by this instruction.
95 MI2VirtMapTy MI2VirtMap;
97 /// SpillPt2VirtMap - This records the virtual registers which should
98 /// be spilled right after the MachineInstr due to live interval
100 std::map<MachineInstr*, std::vector<std::pair<unsigned,bool> > >
103 /// RestorePt2VirtMap - This records the virtual registers which should
104 /// be restored right before the MachineInstr due to live interval
106 std::map<MachineInstr*, std::vector<unsigned> > RestorePt2VirtMap;
108 /// EmergencySpillMap - This records the physical registers that should
109 /// be spilled / restored around the MachineInstr since the register
110 /// allocator has run out of registers.
111 std::map<MachineInstr*, std::vector<unsigned> > EmergencySpillMap;
113 /// EmergencySpillSlots - This records emergency spill slots used to
114 /// spill physical registers when the register allocator runs out of
115 /// registers. Ideally only one stack slot is used per function per
117 std::map<const TargetRegisterClass*, int> EmergencySpillSlots;
119 /// ReMatId - Instead of assigning a stack slot to a to be rematerialized
120 /// virtual register, an unique id is being assigned. This keeps track of
121 /// the highest id used so far. Note, this starts at (1<<18) to avoid
122 /// conflicts with stack slot numbers.
125 /// LowSpillSlot, HighSpillSlot - Lowest and highest spill slot indexes.
126 int LowSpillSlot, HighSpillSlot;
128 /// SpillSlotToUsesMap - Records uses for each register spill slot.
129 SmallVector<SmallPtrSet<MachineInstr*, 4>, 8> SpillSlotToUsesMap;
131 /// ImplicitDefed - One bit for each virtual register. If set it indicates
132 /// the register is implicitly defined.
133 BitVector ImplicitDefed;
135 /// UnusedRegs - A list of physical registers that have not been used.
136 BitVector UnusedRegs;
138 /// createSpillSlot - Allocate a spill slot for RC from MFI.
139 unsigned createSpillSlot(const TargetRegisterClass *RC);
141 VirtRegMap(const VirtRegMap&); // DO NOT IMPLEMENT
142 void operator=(const VirtRegMap&); // DO NOT IMPLEMENT
146 VirtRegMap() : MachineFunctionPass(ID), Virt2PhysMap(NO_PHYS_REG),
147 Virt2StackSlotMap(NO_STACK_SLOT),
148 Virt2ReMatIdMap(NO_STACK_SLOT), Virt2SplitMap(0),
149 Virt2SplitKillMap(SlotIndex()), ReMatMap(NULL),
150 ReMatId(MAX_STACK_SLOT+1),
151 LowSpillSlot(NO_STACK_SLOT), HighSpillSlot(NO_STACK_SLOT) { }
152 virtual bool runOnMachineFunction(MachineFunction &MF);
154 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
155 AU.setPreservesAll();
156 MachineFunctionPass::getAnalysisUsage(AU);
159 MachineFunction &getMachineFunction() const {
160 assert(MF && "getMachineFunction called before runOnMachineFunction");
164 MachineRegisterInfo &getRegInfo() const { return *MRI; }
165 const TargetRegisterInfo &getTargetRegInfo() const { return *TRI; }
169 /// @brief returns true if the specified virtual register is
170 /// mapped to a physical register
171 bool hasPhys(unsigned virtReg) const {
172 return getPhys(virtReg) != NO_PHYS_REG;
175 /// @brief returns the physical register mapped to the specified
177 unsigned getPhys(unsigned virtReg) const {
178 assert(TargetRegisterInfo::isVirtualRegister(virtReg));
179 return Virt2PhysMap[virtReg];
182 /// @brief creates a mapping for the specified virtual register to
183 /// the specified physical register
184 void assignVirt2Phys(unsigned virtReg, unsigned physReg) {
185 assert(TargetRegisterInfo::isVirtualRegister(virtReg) &&
186 TargetRegisterInfo::isPhysicalRegister(physReg));
187 assert(Virt2PhysMap[virtReg] == NO_PHYS_REG &&
188 "attempt to assign physical register to already mapped "
190 Virt2PhysMap[virtReg] = physReg;
193 /// @brief clears the specified virtual register's, physical
195 void clearVirt(unsigned virtReg) {
196 assert(TargetRegisterInfo::isVirtualRegister(virtReg));
197 assert(Virt2PhysMap[virtReg] != NO_PHYS_REG &&
198 "attempt to clear a not assigned virtual register");
199 Virt2PhysMap[virtReg] = NO_PHYS_REG;
202 /// @brief clears all virtual to physical register mappings
203 void clearAllVirt() {
204 Virt2PhysMap.clear();
208 /// @brief returns the register allocation preference.
209 unsigned getRegAllocPref(unsigned virtReg);
211 /// @brief records virtReg is a split live interval from SReg.
212 void setIsSplitFromReg(unsigned virtReg, unsigned SReg) {
213 Virt2SplitMap[virtReg] = SReg;
216 /// @brief returns the live interval virtReg is split from.
217 unsigned getPreSplitReg(unsigned virtReg) const {
218 return Virt2SplitMap[virtReg];
221 /// @brief returns true if the specified virtual register is not
222 /// mapped to a stack slot or rematerialized.
223 bool isAssignedReg(unsigned virtReg) const {
224 if (getStackSlot(virtReg) == NO_STACK_SLOT &&
225 getReMatId(virtReg) == NO_STACK_SLOT)
227 // Split register can be assigned a physical register as well as a
228 // stack slot or remat id.
229 return (Virt2SplitMap[virtReg] && Virt2PhysMap[virtReg] != NO_PHYS_REG);
232 /// @brief returns the stack slot mapped to the specified virtual
234 int getStackSlot(unsigned virtReg) const {
235 assert(TargetRegisterInfo::isVirtualRegister(virtReg));
236 return Virt2StackSlotMap[virtReg];
239 /// @brief returns the rematerialization id mapped to the specified virtual
241 int getReMatId(unsigned virtReg) const {
242 assert(TargetRegisterInfo::isVirtualRegister(virtReg));
243 return Virt2ReMatIdMap[virtReg];
246 /// @brief create a mapping for the specifed virtual register to
247 /// the next available stack slot
248 int assignVirt2StackSlot(unsigned virtReg);
249 /// @brief create a mapping for the specified virtual register to
250 /// the specified stack slot
251 void assignVirt2StackSlot(unsigned virtReg, int frameIndex);
253 /// @brief assign an unique re-materialization id to the specified
254 /// virtual register.
255 int assignVirtReMatId(unsigned virtReg);
256 /// @brief assign an unique re-materialization id to the specified
257 /// virtual register.
258 void assignVirtReMatId(unsigned virtReg, int id);
260 /// @brief returns true if the specified virtual register is being
262 bool isReMaterialized(unsigned virtReg) const {
263 return ReMatMap[virtReg] != NULL;
266 /// @brief returns the original machine instruction being re-issued
267 /// to re-materialize the specified virtual register.
268 MachineInstr *getReMaterializedMI(unsigned virtReg) const {
269 return ReMatMap[virtReg];
272 /// @brief records the specified virtual register will be
273 /// re-materialized and the original instruction which will be re-issed
274 /// for this purpose. If parameter all is true, then all uses of the
275 /// registers are rematerialized and it's safe to delete the definition.
276 void setVirtIsReMaterialized(unsigned virtReg, MachineInstr *def) {
277 ReMatMap[virtReg] = def;
280 /// @brief record the last use (kill) of a split virtual register.
281 void addKillPoint(unsigned virtReg, SlotIndex index) {
282 Virt2SplitKillMap[virtReg] = index;
285 SlotIndex getKillPoint(unsigned virtReg) const {
286 return Virt2SplitKillMap[virtReg];
289 /// @brief remove the last use (kill) of a split virtual register.
290 void removeKillPoint(unsigned virtReg) {
291 Virt2SplitKillMap[virtReg] = SlotIndex();
294 /// @brief returns true if the specified MachineInstr is a spill point.
295 bool isSpillPt(MachineInstr *Pt) const {
296 return SpillPt2VirtMap.find(Pt) != SpillPt2VirtMap.end();
299 /// @brief returns the virtual registers that should be spilled due to
300 /// splitting right after the specified MachineInstr.
301 std::vector<std::pair<unsigned,bool> > &getSpillPtSpills(MachineInstr *Pt) {
302 return SpillPt2VirtMap[Pt];
305 /// @brief records the specified MachineInstr as a spill point for virtReg.
306 void addSpillPoint(unsigned virtReg, bool isKill, MachineInstr *Pt) {
307 std::map<MachineInstr*, std::vector<std::pair<unsigned,bool> > >::iterator
308 I = SpillPt2VirtMap.find(Pt);
309 if (I != SpillPt2VirtMap.end())
310 I->second.push_back(std::make_pair(virtReg, isKill));
312 std::vector<std::pair<unsigned,bool> > Virts;
313 Virts.push_back(std::make_pair(virtReg, isKill));
314 SpillPt2VirtMap.insert(std::make_pair(Pt, Virts));
318 /// @brief - transfer spill point information from one instruction to
320 void transferSpillPts(MachineInstr *Old, MachineInstr *New) {
321 std::map<MachineInstr*, std::vector<std::pair<unsigned,bool> > >::iterator
322 I = SpillPt2VirtMap.find(Old);
323 if (I == SpillPt2VirtMap.end())
325 while (!I->second.empty()) {
326 unsigned virtReg = I->second.back().first;
327 bool isKill = I->second.back().second;
328 I->second.pop_back();
329 addSpillPoint(virtReg, isKill, New);
331 SpillPt2VirtMap.erase(I);
334 /// @brief returns true if the specified MachineInstr is a restore point.
335 bool isRestorePt(MachineInstr *Pt) const {
336 return RestorePt2VirtMap.find(Pt) != RestorePt2VirtMap.end();
339 /// @brief returns the virtual registers that should be restoreed due to
340 /// splitting right after the specified MachineInstr.
341 std::vector<unsigned> &getRestorePtRestores(MachineInstr *Pt) {
342 return RestorePt2VirtMap[Pt];
345 /// @brief records the specified MachineInstr as a restore point for virtReg.
346 void addRestorePoint(unsigned virtReg, MachineInstr *Pt) {
347 std::map<MachineInstr*, std::vector<unsigned> >::iterator I =
348 RestorePt2VirtMap.find(Pt);
349 if (I != RestorePt2VirtMap.end())
350 I->second.push_back(virtReg);
352 std::vector<unsigned> Virts;
353 Virts.push_back(virtReg);
354 RestorePt2VirtMap.insert(std::make_pair(Pt, Virts));
358 /// @brief - transfer restore point information from one instruction to
360 void transferRestorePts(MachineInstr *Old, MachineInstr *New) {
361 std::map<MachineInstr*, std::vector<unsigned> >::iterator I =
362 RestorePt2VirtMap.find(Old);
363 if (I == RestorePt2VirtMap.end())
365 while (!I->second.empty()) {
366 unsigned virtReg = I->second.back();
367 I->second.pop_back();
368 addRestorePoint(virtReg, New);
370 RestorePt2VirtMap.erase(I);
373 /// @brief records that the specified physical register must be spilled
374 /// around the specified machine instr.
375 void addEmergencySpill(unsigned PhysReg, MachineInstr *MI) {
376 if (EmergencySpillMap.find(MI) != EmergencySpillMap.end())
377 EmergencySpillMap[MI].push_back(PhysReg);
379 std::vector<unsigned> PhysRegs;
380 PhysRegs.push_back(PhysReg);
381 EmergencySpillMap.insert(std::make_pair(MI, PhysRegs));
385 /// @brief returns true if one or more physical registers must be spilled
386 /// around the specified instruction.
387 bool hasEmergencySpills(MachineInstr *MI) const {
388 return EmergencySpillMap.find(MI) != EmergencySpillMap.end();
391 /// @brief returns the physical registers to be spilled and restored around
393 std::vector<unsigned> &getEmergencySpills(MachineInstr *MI) {
394 return EmergencySpillMap[MI];
397 /// @brief - transfer emergency spill information from one instruction to
399 void transferEmergencySpills(MachineInstr *Old, MachineInstr *New) {
400 std::map<MachineInstr*,std::vector<unsigned> >::iterator I =
401 EmergencySpillMap.find(Old);
402 if (I == EmergencySpillMap.end())
404 while (!I->second.empty()) {
405 unsigned virtReg = I->second.back();
406 I->second.pop_back();
407 addEmergencySpill(virtReg, New);
409 EmergencySpillMap.erase(I);
412 /// @brief return or get a emergency spill slot for the register class.
413 int getEmergencySpillSlot(const TargetRegisterClass *RC);
415 /// @brief Return lowest spill slot index.
416 int getLowSpillSlot() const {
420 /// @brief Return highest spill slot index.
421 int getHighSpillSlot() const {
422 return HighSpillSlot;
425 /// @brief Records a spill slot use.
426 void addSpillSlotUse(int FrameIndex, MachineInstr *MI);
428 /// @brief Returns true if spill slot has been used.
429 bool isSpillSlotUsed(int FrameIndex) const {
430 assert(FrameIndex >= 0 && "Spill slot index should not be negative!");
431 return !SpillSlotToUsesMap[FrameIndex-LowSpillSlot].empty();
434 /// @brief Mark the specified register as being implicitly defined.
435 void setIsImplicitlyDefined(unsigned VirtReg) {
436 ImplicitDefed.set(TargetRegisterInfo::virtReg2Index(VirtReg));
439 /// @brief Returns true if the virtual register is implicitly defined.
440 bool isImplicitlyDefined(unsigned VirtReg) const {
441 return ImplicitDefed[TargetRegisterInfo::virtReg2Index(VirtReg)];
444 /// @brief Updates information about the specified virtual register's value
445 /// folded into newMI machine instruction.
446 void virtFolded(unsigned VirtReg, MachineInstr *OldMI, MachineInstr *NewMI,
449 /// @brief Updates information about the specified virtual register's value
450 /// folded into the specified machine instruction.
451 void virtFolded(unsigned VirtReg, MachineInstr *MI, ModRef MRInfo);
453 /// @brief returns the virtual registers' values folded in memory
454 /// operands of this instruction
455 std::pair<MI2VirtMapTy::const_iterator, MI2VirtMapTy::const_iterator>
456 getFoldedVirts(MachineInstr* MI) const {
457 return MI2VirtMap.equal_range(MI);
460 /// RemoveMachineInstrFromMaps - MI is being erased, remove it from the
461 /// the folded instruction map and spill point map.
462 void RemoveMachineInstrFromMaps(MachineInstr *MI);
464 /// FindUnusedRegisters - Gather a list of allocatable registers that
465 /// have not been allocated to any virtual register.
466 bool FindUnusedRegisters(LiveIntervals* LIs);
468 /// HasUnusedRegisters - Return true if there are any allocatable registers
469 /// that have not been allocated to any virtual register.
470 bool HasUnusedRegisters() const {
471 return !UnusedRegs.none();
474 /// setRegisterUsed - Remember the physical register is now used.
475 void setRegisterUsed(unsigned Reg) {
476 UnusedRegs.reset(Reg);
479 /// isRegisterUnused - Return true if the physical register has not been
481 bool isRegisterUnused(unsigned Reg) const {
482 return UnusedRegs[Reg];
485 /// getFirstUnusedRegister - Return the first physical register that has not
487 unsigned getFirstUnusedRegister(const TargetRegisterClass *RC) {
488 int Reg = UnusedRegs.find_first();
490 if (allocatableRCRegs[RC][Reg])
491 return (unsigned)Reg;
492 Reg = UnusedRegs.find_next(Reg);
497 /// rewrite - Rewrite all instructions in MF to use only physical registers
498 /// by mapping all virtual register operands to their assigned physical
501 /// @param Indexes Optionally remove deleted instructions from indexes.
502 void rewrite(SlotIndexes *Indexes);
504 void print(raw_ostream &OS, const Module* M = 0) const;
508 inline raw_ostream &operator<<(raw_ostream &OS, const VirtRegMap &VRM) {
512 } // End llvm namespace