1 //===-- MCSubtargetInfo.cpp - Subtarget Information -----------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #include "llvm/MC/MCSubtargetInfo.h"
11 #include "llvm/MC/MCInstrItineraries.h"
12 #include "llvm/MC/SubtargetFeature.h"
13 #include "llvm/ADT/StringRef.h"
14 #include "llvm/ADT/Triple.h"
15 #include "llvm/Support/raw_ostream.h"
20 MCSchedModel MCSchedModel::DefaultSchedModel; // For unknown processors.
23 MCSubtargetInfo::InitMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS,
24 const SubtargetFeatureKV *PF,
25 const SubtargetFeatureKV *PD,
26 const SubtargetInfoKV *ProcSched,
30 unsigned NF, unsigned NP) {
34 ProcSchedModels = ProcSched;
41 SubtargetFeatures Features(FS);
42 FeatureBits = Features.getFeatureBits(CPU, ProcDesc, NumProcs,
43 ProcFeatures, NumFeatures);
47 /// ReInitMCSubtargetInfo - Change CPU (and optionally supplemented with
48 /// feature string) and recompute feature bits.
49 uint64_t MCSubtargetInfo::ReInitMCSubtargetInfo(StringRef CPU, StringRef FS) {
50 SubtargetFeatures Features(FS);
51 FeatureBits = Features.getFeatureBits(CPU, ProcDesc, NumProcs,
52 ProcFeatures, NumFeatures);
56 /// ToggleFeature - Toggle a feature and returns the re-computed feature
57 /// bits. This version does not change the implied bits.
58 uint64_t MCSubtargetInfo::ToggleFeature(uint64_t FB) {
63 /// ToggleFeature - Toggle a feature and returns the re-computed feature
64 /// bits. This version will also change all implied bits.
65 uint64_t MCSubtargetInfo::ToggleFeature(StringRef FS) {
66 SubtargetFeatures Features;
67 FeatureBits = Features.ToggleFeature(FeatureBits, FS,
68 ProcFeatures, NumFeatures);
74 MCSubtargetInfo::getSchedModelForCPU(StringRef CPU) const {
75 assert(ProcSchedModels && "Processor machine model not available!");
78 for (size_t i = 1; i < NumProcs; i++) {
79 assert(strcmp(ProcSchedModels[i - 1].Key, ProcSchedModels[i].Key) < 0 &&
80 "Processor machine model table is not sorted");
87 const SubtargetInfoKV *Found =
88 std::lower_bound(ProcSchedModels, ProcSchedModels+NumProcs, KV);
89 if (Found == ProcSchedModels+NumProcs || StringRef(Found->Key) != CPU) {
91 << "' is not a recognized processor for this target"
92 << " (ignoring processor)\n";
93 return &MCSchedModel::DefaultSchedModel;
95 assert(Found->Value && "Missing processor SchedModel value");
96 return (const MCSchedModel *)Found->Value;
100 MCSubtargetInfo::getInstrItineraryForCPU(StringRef CPU) const {
101 const MCSchedModel *SchedModel = getSchedModelForCPU(CPU);
102 return InstrItineraryData(SchedModel, Stages, OperandCycles, ForwardingPaths);
105 /// Initialize an InstrItineraryData instance.
106 void MCSubtargetInfo::initInstrItins(InstrItineraryData &InstrItins) const {
108 InstrItineraryData(0, Stages, OperandCycles, ForwardingPaths);