1 //===-- TargetParser - Parser for target features ---------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements a target parser to recognise hardware features such as
11 // FPU/CPU/ARCH names as well as specific support such as HDIV, etc.
13 //===----------------------------------------------------------------------===//
15 #include "llvm/Support/ARMBuildAttributes.h"
16 #include "llvm/Support/TargetParser.h"
17 #include "llvm/ADT/StringExtras.h"
18 #include "llvm/ADT/StringSwitch.h"
19 #include "llvm/ADT/Twine.h"
27 // List of canonical FPU names (use getFPUSynonym) and which architectural
28 // features they correspond to (use getFPUFeatures).
29 // FIXME: TableGen this.
30 // The entries must appear in the order listed in ARM::FPUKind for correct indexing
35 ARM::FPUVersion FPUVersion;
36 ARM::NeonSupportLevel NeonSupport;
37 ARM::FPURestriction Restriction;
39 StringRef getName() const { return StringRef(NameCStr, NameLength); }
41 #define ARM_FPU(NAME, KIND, VERSION, NEON_SUPPORT, RESTRICTION) \
42 { NAME, sizeof(NAME) - 1, KIND, VERSION, NEON_SUPPORT, RESTRICTION },
43 #include "llvm/Support/ARMTargetParser.def"
46 // List of canonical arch names (use getArchSynonym).
47 // This table also provides the build attribute fields for CPU arch
48 // and Arch ID, according to the Addenda to the ARM ABI, chapters
49 // 2.4 and 2.3.5.2 respectively.
50 // FIXME: SubArch values were simplified to fit into the expectations
51 // of the triples and are not conforming with their official names.
52 // Check to see if the expectation should be changed.
53 // FIXME: TableGen this.
57 const char *CPUAttrCStr;
59 const char *SubArchCStr;
62 unsigned ArchBaseExtensions;
64 ARMBuildAttrs::CPUArch ArchAttr; // Arch ID in build attributes.
66 StringRef getName() const { return StringRef(NameCStr, NameLength); }
68 // CPU class in build attributes.
69 StringRef getCPUAttr() const { return StringRef(CPUAttrCStr, CPUAttrLength); }
72 StringRef getSubArch() const { return StringRef(SubArchCStr, SubArchLength); }
74 #define ARM_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU, ARCH_BASE_EXT) \
75 {NAME, sizeof(NAME) - 1, CPU_ATTR, sizeof(CPU_ATTR) - 1, SUB_ARCH, \
76 sizeof(SUB_ARCH) - 1, ARCH_FPU, ARCH_BASE_EXT, ID, ARCH_ATTR},
77 #include "llvm/Support/ARMTargetParser.def"
80 // List of Arch Extension names.
81 // FIXME: TableGen this.
87 const char *NegFeature;
89 StringRef getName() const { return StringRef(NameCStr, NameLength); }
91 #define ARM_ARCH_EXT_NAME(NAME, ID, FEATURE, NEGFEATURE) \
92 { NAME, sizeof(NAME) - 1, ID, FEATURE, NEGFEATURE },
93 #include "llvm/Support/ARMTargetParser.def"
96 // List of HWDiv names (use getHWDivSynonym) and which architectural
97 // features they correspond to (use getHWDivFeatures).
98 // FIXME: TableGen this.
100 const char *NameCStr;
104 StringRef getName() const { return StringRef(NameCStr, NameLength); }
106 #define ARM_HW_DIV_NAME(NAME, ID) { NAME, sizeof(NAME) - 1, ID },
107 #include "llvm/Support/ARMTargetParser.def"
110 // List of CPU names and their arches.
111 // The same CPU can have multiple arches and can be default on multiple arches.
112 // When finding the Arch for a CPU, first-found prevails. Sort them accordingly.
113 // When this becomes table-generated, we'd probably need two tables.
114 // FIXME: TableGen this.
115 static const struct {
116 const char *NameCStr;
118 ARM::ArchKind ArchID;
119 bool Default; // is $Name the default CPU for $ArchID ?
120 unsigned DefaultExtensions;
122 StringRef getName() const { return StringRef(NameCStr, NameLength); }
124 #define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \
125 { NAME, sizeof(NAME) - 1, ID, IS_DEFAULT, DEFAULT_EXT },
126 #include "llvm/Support/ARMTargetParser.def"
131 // ======================================================= //
133 // ======================================================= //
135 StringRef llvm::ARM::getFPUName(unsigned FPUKind) {
136 if (FPUKind >= ARM::FK_LAST)
138 return FPUNames[FPUKind].getName();
141 unsigned llvm::ARM::getFPUVersion(unsigned FPUKind) {
142 if (FPUKind >= ARM::FK_LAST)
144 return FPUNames[FPUKind].FPUVersion;
147 unsigned llvm::ARM::getFPUNeonSupportLevel(unsigned FPUKind) {
148 if (FPUKind >= ARM::FK_LAST)
150 return FPUNames[FPUKind].NeonSupport;
153 unsigned llvm::ARM::getFPURestriction(unsigned FPUKind) {
154 if (FPUKind >= ARM::FK_LAST)
156 return FPUNames[FPUKind].Restriction;
159 unsigned llvm::ARM::getDefaultFPU(StringRef CPU, unsigned ArchKind) {
160 if (CPU == "generic")
161 return ARCHNames[ArchKind].DefaultFPU;
163 return StringSwitch<unsigned>(CPU)
164 #define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \
165 .Case(NAME, DEFAULT_FPU)
166 #include "llvm/Support/ARMTargetParser.def"
167 .Default(ARM::FK_INVALID);
170 unsigned llvm::ARM::getDefaultExtensions(StringRef CPU, unsigned ArchKind) {
171 if (CPU == "generic")
172 return ARCHNames[ArchKind].ArchBaseExtensions;
174 return StringSwitch<unsigned>(CPU)
175 #define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \
176 .Case(NAME, ARCHNames[ID].ArchBaseExtensions | DEFAULT_EXT)
177 #include "llvm/Support/ARMTargetParser.def"
178 .Default(ARM::AEK_INVALID);
181 bool llvm::ARM::getHWDivFeatures(unsigned HWDivKind,
182 std::vector<const char *> &Features) {
184 if (HWDivKind == ARM::AEK_INVALID)
187 if (HWDivKind & ARM::AEK_HWDIVARM)
188 Features.push_back("+hwdiv-arm");
190 Features.push_back("-hwdiv-arm");
192 if (HWDivKind & ARM::AEK_HWDIV)
193 Features.push_back("+hwdiv");
195 Features.push_back("-hwdiv");
200 bool llvm::ARM::getExtensionFeatures(unsigned Extensions,
201 std::vector<const char *> &Features) {
203 if (Extensions == ARM::AEK_INVALID)
206 if (Extensions & ARM::AEK_CRC)
207 Features.push_back("+crc");
209 Features.push_back("-crc");
211 if (Extensions & ARM::AEK_DSP)
212 Features.push_back("+dsp");
214 Features.push_back("-dsp");
216 return getHWDivFeatures(Extensions, Features);
219 bool llvm::ARM::getFPUFeatures(unsigned FPUKind,
220 std::vector<const char *> &Features) {
222 if (FPUKind >= ARM::FK_LAST || FPUKind == ARM::FK_INVALID)
225 // fp-only-sp and d16 subtarget features are independent of each other, so we
226 // must enable/disable both.
227 switch (FPUNames[FPUKind].Restriction) {
229 Features.push_back("+fp-only-sp");
230 Features.push_back("+d16");
233 Features.push_back("-fp-only-sp");
234 Features.push_back("+d16");
237 Features.push_back("-fp-only-sp");
238 Features.push_back("-d16");
242 // FPU version subtarget features are inclusive of lower-numbered ones, so
243 // enable the one corresponding to this version and disable all that are
244 // higher. We also have to make sure to disable fp16 when vfp4 is disabled,
245 // as +vfp4 implies +fp16 but -vfp4 does not imply -fp16.
246 switch (FPUNames[FPUKind].FPUVersion) {
248 Features.push_back("+fp-armv8");
251 Features.push_back("+vfp4");
252 Features.push_back("-fp-armv8");
254 case ARM::FV_VFPV3_FP16:
255 Features.push_back("+vfp3");
256 Features.push_back("+fp16");
257 Features.push_back("-vfp4");
258 Features.push_back("-fp-armv8");
261 Features.push_back("+vfp3");
262 Features.push_back("-fp16");
263 Features.push_back("-vfp4");
264 Features.push_back("-fp-armv8");
267 Features.push_back("+vfp2");
268 Features.push_back("-vfp3");
269 Features.push_back("-fp16");
270 Features.push_back("-vfp4");
271 Features.push_back("-fp-armv8");
274 Features.push_back("-vfp2");
275 Features.push_back("-vfp3");
276 Features.push_back("-fp16");
277 Features.push_back("-vfp4");
278 Features.push_back("-fp-armv8");
282 // crypto includes neon, so we handle this similarly to FPU version.
283 switch (FPUNames[FPUKind].NeonSupport) {
285 Features.push_back("+neon");
286 Features.push_back("+crypto");
289 Features.push_back("+neon");
290 Features.push_back("-crypto");
293 Features.push_back("-neon");
294 Features.push_back("-crypto");
301 StringRef llvm::ARM::getArchName(unsigned ArchKind) {
302 if (ArchKind >= ARM::AK_LAST)
304 return ARCHNames[ArchKind].getName();
307 StringRef llvm::ARM::getCPUAttr(unsigned ArchKind) {
308 if (ArchKind >= ARM::AK_LAST)
310 return ARCHNames[ArchKind].getCPUAttr();
313 StringRef llvm::ARM::getSubArch(unsigned ArchKind) {
314 if (ArchKind >= ARM::AK_LAST)
316 return ARCHNames[ArchKind].getSubArch();
319 unsigned llvm::ARM::getArchAttr(unsigned ArchKind) {
320 if (ArchKind >= ARM::AK_LAST)
321 return ARMBuildAttrs::CPUArch::Pre_v4;
322 return ARCHNames[ArchKind].ArchAttr;
325 StringRef llvm::ARM::getArchExtName(unsigned ArchExtKind) {
326 for (const auto AE : ARCHExtNames) {
327 if (ArchExtKind == AE.ID)
333 const char *llvm::ARM::getArchExtFeature(StringRef ArchExt) {
334 if (ArchExt.startswith("no")) {
335 StringRef ArchExtBase(ArchExt.substr(2));
336 for (const auto AE : ARCHExtNames) {
337 if (AE.NegFeature && ArchExtBase == AE.getName())
338 return AE.NegFeature;
341 for (const auto AE : ARCHExtNames) {
342 if (AE.Feature && ArchExt == AE.getName())
349 StringRef llvm::ARM::getHWDivName(unsigned HWDivKind) {
350 for (const auto D : HWDivNames) {
351 if (HWDivKind == D.ID)
357 StringRef llvm::ARM::getDefaultCPU(StringRef Arch) {
358 unsigned AK = parseArch(Arch);
359 if (AK == ARM::AK_INVALID)
362 // Look for multiple AKs to find the default for pair AK+Name.
363 for (const auto CPU : CPUNames) {
364 if (CPU.ArchID == AK && CPU.Default)
365 return CPU.getName();
368 // If we can't find a default then target the architecture instead
372 // ======================================================= //
374 // ======================================================= //
376 static StringRef getHWDivSynonym(StringRef HWDiv) {
377 return StringSwitch<StringRef>(HWDiv)
378 .Case("thumb,arm", "arm,thumb")
382 static StringRef getFPUSynonym(StringRef FPU) {
383 return StringSwitch<StringRef>(FPU)
384 .Cases("fpa", "fpe2", "fpe3", "maverick", "invalid") // Unsupported
385 .Case("vfp2", "vfpv2")
386 .Case("vfp3", "vfpv3")
387 .Case("vfp4", "vfpv4")
388 .Case("vfp3-d16", "vfpv3-d16")
389 .Case("vfp4-d16", "vfpv4-d16")
390 .Cases("fp4-sp-d16", "vfpv4-sp-d16", "fpv4-sp-d16")
391 .Cases("fp4-dp-d16", "fpv4-dp-d16", "vfpv4-d16")
392 .Case("fp5-sp-d16", "fpv5-sp-d16")
393 .Cases("fp5-dp-d16", "fpv5-dp-d16", "fpv5-d16")
394 // FIXME: Clang uses it, but it's bogus, since neon defaults to vfpv3.
395 .Case("neon-vfpv3", "neon")
399 static StringRef getArchSynonym(StringRef Arch) {
400 return StringSwitch<StringRef>(Arch)
405 .Cases("v6m", "v6sm", "v6s-m", "v6-m")
406 .Cases("v6z", "v6zk", "v6kz")
407 .Cases("v7", "v7a", "v7hl", "v7l", "v7-a")
410 .Case("v7em", "v7e-m")
411 .Cases("v8", "v8a", "aarch64", "arm64", "v8-a")
412 .Case("v8.1a", "v8.1-a")
413 .Case("v8.2a", "v8.2-a")
417 // MArch is expected to be of the form (arm|thumb)?(eb)?(v.+)?(eb)?, but
418 // (iwmmxt|xscale)(eb)? is also permitted. If the former, return
419 // "v.+", if the latter, return unmodified string, minus 'eb'.
420 // If invalid, return empty string.
421 StringRef llvm::ARM::getCanonicalArchName(StringRef Arch) {
422 size_t offset = StringRef::npos;
424 StringRef Error = "";
426 // Begins with "arm" / "thumb", move past it.
427 if (A.startswith("arm64"))
429 else if (A.startswith("arm"))
431 else if (A.startswith("thumb"))
433 else if (A.startswith("aarch64")) {
435 // AArch64 uses "_be", not "eb" suffix.
436 if (A.find("eb") != StringRef::npos)
438 if (A.substr(offset, 3) == "_be")
442 // Ex. "armebv7", move past the "eb".
443 if (offset != StringRef::npos && A.substr(offset, 2) == "eb")
445 // Or, if it ends with eb ("armv7eb"), chop it off.
446 else if (A.endswith("eb"))
447 A = A.substr(0, A.size() - 2);
449 if (offset != StringRef::npos)
450 A = A.substr(offset);
452 // Empty string means offset reached the end, which means it's valid.
456 // Only match non-marketing names
457 if (offset != StringRef::npos) {
458 // Must start with 'vN'.
459 if (A[0] != 'v' || !std::isdigit(A[1]))
461 // Can't have an extra 'eb'.
462 if (A.find("eb") != StringRef::npos)
466 // Arch will either be a 'v' name (v7a) or a marketing name (xscale).
470 unsigned llvm::ARM::parseHWDiv(StringRef HWDiv) {
471 StringRef Syn = getHWDivSynonym(HWDiv);
472 for (const auto D : HWDivNames) {
473 if (Syn == D.getName())
476 return ARM::AEK_INVALID;
479 unsigned llvm::ARM::parseFPU(StringRef FPU) {
480 StringRef Syn = getFPUSynonym(FPU);
481 for (const auto F : FPUNames) {
482 if (Syn == F.getName())
485 return ARM::FK_INVALID;
488 // Allows partial match, ex. "v7a" matches "armv7a".
489 unsigned llvm::ARM::parseArch(StringRef Arch) {
490 Arch = getCanonicalArchName(Arch);
491 StringRef Syn = getArchSynonym(Arch);
492 for (const auto A : ARCHNames) {
493 if (A.getName().endswith(Syn))
496 return ARM::AK_INVALID;
499 unsigned llvm::ARM::parseArchExt(StringRef ArchExt) {
500 for (const auto A : ARCHExtNames) {
501 if (ArchExt == A.getName())
504 return ARM::AEK_INVALID;
507 unsigned llvm::ARM::parseCPUArch(StringRef CPU) {
508 for (const auto C : CPUNames) {
509 if (CPU == C.getName())
512 return ARM::AK_INVALID;
515 // ARM, Thumb, AArch64
516 unsigned llvm::ARM::parseArchISA(StringRef Arch) {
517 return StringSwitch<unsigned>(Arch)
518 .StartsWith("aarch64", ARM::IK_AARCH64)
519 .StartsWith("arm64", ARM::IK_AARCH64)
520 .StartsWith("thumb", ARM::IK_THUMB)
521 .StartsWith("arm", ARM::IK_ARM)
522 .Default(ARM::EK_INVALID);
526 unsigned llvm::ARM::parseArchEndian(StringRef Arch) {
527 if (Arch.startswith("armeb") || Arch.startswith("thumbeb") ||
528 Arch.startswith("aarch64_be"))
531 if (Arch.startswith("arm") || Arch.startswith("thumb")) {
532 if (Arch.endswith("eb"))
535 return ARM::EK_LITTLE;
538 if (Arch.startswith("aarch64"))
539 return ARM::EK_LITTLE;
541 return ARM::EK_INVALID;
545 unsigned llvm::ARM::parseArchProfile(StringRef Arch) {
546 Arch = getCanonicalArchName(Arch);
547 switch (parseArch(Arch)) {
550 case ARM::AK_ARMV7EM:
557 case ARM::AK_ARMV8_1A:
558 case ARM::AK_ARMV8_2A:
561 return ARM::PK_INVALID;
564 // Version number (ex. v7 = 7).
565 unsigned llvm::ARM::parseArchVersion(StringRef Arch) {
566 Arch = getCanonicalArchName(Arch);
567 switch (parseArch(Arch)) {
578 case ARM::AK_ARMV5TE:
580 case ARM::AK_IWMMXT2:
582 case ARM::AK_ARMV5TEJ:
586 case ARM::AK_ARMV6T2:
587 case ARM::AK_ARMV6KZ:
594 case ARM::AK_ARMV7EM:
598 case ARM::AK_ARMV8_1A:
599 case ARM::AK_ARMV8_2A: