1 //===-- TargetParser - Parser for target features ---------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements a target parser to recognise hardware features such as
11 // FPU/CPU/ARCH names as well as specific support such as HDIV, etc.
13 //===----------------------------------------------------------------------===//
15 #include "llvm/Support/ARMBuildAttributes.h"
16 #include "llvm/Support/TargetParser.h"
17 #include "llvm/ADT/StringExtras.h"
18 #include "llvm/ADT/StringSwitch.h"
24 // List of canonical FPU names (use getFPUSynonym)
25 // FIXME: TableGen this.
30 { "invalid", ARM::FK_INVALID },
31 { "vfp", ARM::FK_VFP },
32 { "vfpv2", ARM::FK_VFPV2 },
33 { "vfpv3", ARM::FK_VFPV3 },
34 { "vfpv3-d16", ARM::FK_VFPV3_D16 },
35 { "vfpv4", ARM::FK_VFPV4 },
36 { "vfpv4-d16", ARM::FK_VFPV4_D16 },
37 { "fpv5-d16", ARM::FK_FPV5_D16 },
38 { "fp-armv8", ARM::FK_FP_ARMV8 },
39 { "neon", ARM::FK_NEON },
40 { "neon-vfpv4", ARM::FK_NEON_VFPV4 },
41 { "neon-fp-armv8", ARM::FK_NEON_FP_ARMV8 },
42 { "crypto-neon-fp-armv8", ARM::FK_CRYPTO_NEON_FP_ARMV8 },
43 { "softvfp", ARM::FK_SOFTVFP }
45 // List of canonical arch names (use getArchSynonym)
46 // FIXME: TableGen this.
50 const char *DefaultCPU;
51 ARMBuildAttrs::CPUArch DefaultArch;
53 { "invalid", ARM::AK_INVALID, nullptr, ARMBuildAttrs::CPUArch::Pre_v4 },
54 { "armv2", ARM::AK_ARMV2, "2", ARMBuildAttrs::CPUArch::v4 },
55 { "armv2a", ARM::AK_ARMV2A, "2A", ARMBuildAttrs::CPUArch::v4 },
56 { "armv3", ARM::AK_ARMV3, "3", ARMBuildAttrs::CPUArch::v4 },
57 { "armv3m", ARM::AK_ARMV3M, "3M", ARMBuildAttrs::CPUArch::v4 },
58 { "armv4", ARM::AK_ARMV4, "4", ARMBuildAttrs::CPUArch::v4 },
59 { "armv4t", ARM::AK_ARMV4T, "4T", ARMBuildAttrs::CPUArch::v4T },
60 { "armv5", ARM::AK_ARMV5, "5", ARMBuildAttrs::CPUArch::v5T },
61 { "armv5t", ARM::AK_ARMV5T, "5T", ARMBuildAttrs::CPUArch::v5T },
62 { "armv5te", ARM::AK_ARMV5TE, "5TE", ARMBuildAttrs::CPUArch::v5TE },
63 { "armv6", ARM::AK_ARMV6, "6", ARMBuildAttrs::CPUArch::v6 },
64 { "armv6j", ARM::AK_ARMV6J, "6J", ARMBuildAttrs::CPUArch::v6 },
65 { "armv6k", ARM::AK_ARMV6K, "6K", ARMBuildAttrs::CPUArch::v6K },
66 { "armv6t2", ARM::AK_ARMV6T2, "6T2", ARMBuildAttrs::CPUArch::v6T2 },
67 { "armv6z", ARM::AK_ARMV6Z, "6Z", ARMBuildAttrs::CPUArch::v6KZ },
68 { "armv6zk", ARM::AK_ARMV6ZK, "6ZK", ARMBuildAttrs::CPUArch::v6KZ },
69 { "armv6-m", ARM::AK_ARMV6M, "6-M", ARMBuildAttrs::CPUArch::v6_M },
70 { "armv7", ARM::AK_ARMV7, "7", ARMBuildAttrs::CPUArch::v7 },
71 { "armv7-a", ARM::AK_ARMV7A, "7-A", ARMBuildAttrs::CPUArch::v7 },
72 { "armv7-r", ARM::AK_ARMV7R, "7-R", ARMBuildAttrs::CPUArch::v7 },
73 { "armv7-m", ARM::AK_ARMV7M, "7-M", ARMBuildAttrs::CPUArch::v7 },
74 { "armv8-a", ARM::AK_ARMV8A, "8-A", ARMBuildAttrs::CPUArch::v8 },
75 { "armv8.1-a", ARM::AK_ARMV8_1A, "8.1-A", ARMBuildAttrs::CPUArch::v8 },
76 { "iwmmxt", ARM::AK_IWMMXT, "iwmmxt", ARMBuildAttrs::CPUArch::v5TE },
77 { "iwmmxt2", ARM::AK_IWMMXT2, "iwmmxt2", ARMBuildAttrs::CPUArch::v5TE }
79 // List of canonical ARCH names (use getARCHSynonym)
80 // FIXME: TableGen this.
85 { "invalid", ARM::AEK_INVALID },
86 { "crc", ARM::AEK_CRC },
87 { "crypto", ARM::AEK_CRYPTO },
88 { "fp", ARM::AEK_FP },
89 { "idiv", ARM::AEK_HWDIV },
90 { "mp", ARM::AEK_MP },
91 { "sec", ARM::AEK_SEC },
92 { "virt", ARM::AEK_VIRT }
99 // ======================================================= //
101 // ======================================================= //
103 const char *ARMTargetParser::getFPUName(unsigned ID) {
104 if (ID >= ARM::FK_LAST)
106 return FPUNames[ID].Name;
109 const char *ARMTargetParser::getArchName(unsigned ID) {
110 if (ID >= ARM::AK_LAST)
112 return ARCHNames[ID].Name;
115 const char *ARMTargetParser::getArchDefaultCPUName(unsigned ID) {
116 if (ID >= ARM::AK_LAST)
118 return ARCHNames[ID].DefaultCPU;
121 unsigned ARMTargetParser::getArchDefaultCPUArch(unsigned ID) {
122 if (ID >= ARM::AK_LAST)
124 return ARCHNames[ID].DefaultArch;
127 const char *ARMTargetParser::getArchExtName(unsigned ID) {
128 if (ID >= ARM::AEK_LAST)
130 return ARCHExtNames[ID].Name;
133 // ======================================================= //
135 // ======================================================= //
137 StringRef ARMTargetParser::getFPUSynonym(StringRef FPU) {
138 return StringSwitch<StringRef>(FPU)
139 .Cases("fpa", "fpe2", "fpe3", "maverick", "invalid") // Unsupported
140 .Case("vfp2", "vfpv2")
141 .Case("vfp3", "vfpv3")
142 .Case("vfp4", "vfpv4")
143 .Case("vfp3-d16", "vfpv3-d16")
144 .Case("vfp4-d16", "vfpv4-d16")
145 // FIXME: sp-16 is NOT the same as d16
146 .Cases("fp4-sp-d16", "fpv4-sp-d16", "vfpv4-d16")
147 .Cases("fp4-dp-d16", "fpv4-dp-d16", "vfpv4-d16")
148 .Cases("fp5-sp-d16", "fpv5-sp-d16", "fpv5-d16")
149 .Cases("fp5-dp-d16", "fpv5-dp-d16", "fpv5-d16")
150 // FIXME: Clang uses it, but it's bogus, since neon defaults to vfpv3.
151 .Case("neon-vfpv3", "neon")
155 StringRef ARMTargetParser::getArchSynonym(StringRef Arch) {
156 return StringSwitch<StringRef>(Arch)
157 .Case("armv5tej", "armv5te")
158 .Case("armv6m", "armv6-m")
159 .Case("armv7a", "armv7-a")
160 .Case("armv7r", "armv7-r")
161 .Case("armv7m", "armv7-m")
162 .Case("armv8a", "armv8-a")
163 .Case("armv8.1a", "armv8.1-a")
167 unsigned ARMTargetParser::parseFPU(StringRef FPU) {
168 StringRef Syn = getFPUSynonym(FPU);
169 for (const auto F : FPUNames) {
173 return ARM::FK_INVALID;
176 unsigned ARMTargetParser::parseArch(StringRef Arch) {
177 StringRef Syn = getArchSynonym(Arch);
178 for (const auto A : ARCHNames) {
182 return ARM::AK_INVALID;
185 unsigned ARMTargetParser::parseArchExt(StringRef ArchExt) {
186 for (const auto A : ARCHExtNames) {
187 if (ArchExt == A.Name)
190 return ARM::AEK_INVALID;