1 //===-- TargetParser - Parser for target features ---------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements a target parser to recognise hardware features such as
11 // FPU/CPU/ARCH names as well as specific support such as HDIV, etc.
13 //===----------------------------------------------------------------------===//
15 #include "llvm/Support/ARMBuildAttributes.h"
16 #include "llvm/Support/TargetParser.h"
17 #include "llvm/ADT/StringExtras.h"
18 #include "llvm/ADT/StringSwitch.h"
25 // List of canonical FPU names (use getFPUSynonym).
26 // FIXME: TableGen this.
31 { "invalid", ARM::FK_INVALID },
32 { "vfp", ARM::FK_VFP },
33 { "vfpv2", ARM::FK_VFPV2 },
34 { "vfpv3", ARM::FK_VFPV3 },
35 { "vfpv3-d16", ARM::FK_VFPV3_D16 },
36 { "vfpv4", ARM::FK_VFPV4 },
37 { "vfpv4-d16", ARM::FK_VFPV4_D16 },
38 { "fpv5-d16", ARM::FK_FPV5_D16 },
39 { "fp-armv8", ARM::FK_FP_ARMV8 },
40 { "neon", ARM::FK_NEON },
41 { "neon-vfpv4", ARM::FK_NEON_VFPV4 },
42 { "neon-fp-armv8", ARM::FK_NEON_FP_ARMV8 },
43 { "crypto-neon-fp-armv8", ARM::FK_CRYPTO_NEON_FP_ARMV8 },
44 { "softvfp", ARM::FK_SOFTVFP }
46 // List of canonical arch names (use getArchSynonym).
47 // This table also provides the build attribute fields for CPU arch
48 // and Arch ID, according to the Addenda to the ARM ABI, chapters
49 // 2.4 and 2.3.5.2 respectively.
50 // FIXME: TableGen this.
54 const char *CPUAttr; // CPU class in build attributes.
55 ARMBuildAttrs::CPUArch ArchAttr; // Arch ID in build attributes.
57 { "invalid", ARM::AK_INVALID, nullptr, ARMBuildAttrs::CPUArch::Pre_v4 },
58 { "armv2", ARM::AK_ARMV2, "2", ARMBuildAttrs::CPUArch::Pre_v4 },
59 { "armv2a", ARM::AK_ARMV2A, "2A", ARMBuildAttrs::CPUArch::Pre_v4 },
60 { "armv3", ARM::AK_ARMV3, "3", ARMBuildAttrs::CPUArch::Pre_v4 },
61 { "armv3m", ARM::AK_ARMV3M, "3M", ARMBuildAttrs::CPUArch::Pre_v4 },
62 { "armv4", ARM::AK_ARMV4, "4", ARMBuildAttrs::CPUArch::v4 },
63 { "armv4t", ARM::AK_ARMV4T, "4T", ARMBuildAttrs::CPUArch::v4T },
64 { "armv5t", ARM::AK_ARMV5T, "5T", ARMBuildAttrs::CPUArch::v5T },
65 { "armv5te", ARM::AK_ARMV5TE, "5TE", ARMBuildAttrs::CPUArch::v5TE },
66 { "armv5tej", ARM::AK_ARMV5TEJ, "5TEJ", ARMBuildAttrs::CPUArch::v5TEJ },
67 { "armv6", ARM::AK_ARMV6, "6", ARMBuildAttrs::CPUArch::v6 },
68 { "armv6k", ARM::AK_ARMV6K, "6K", ARMBuildAttrs::CPUArch::v6K },
69 { "armv6t2", ARM::AK_ARMV6T2, "6T2", ARMBuildAttrs::CPUArch::v6T2 },
70 { "armv6z", ARM::AK_ARMV6Z, "6Z", ARMBuildAttrs::CPUArch::v6KZ },
71 { "armv6zk", ARM::AK_ARMV6ZK, "6ZK", ARMBuildAttrs::CPUArch::v6KZ },
72 { "armv6-m", ARM::AK_ARMV6M, "6-M", ARMBuildAttrs::CPUArch::v6_M },
73 { "armv6s-m", ARM::AK_ARMV6SM, "6S-M", ARMBuildAttrs::CPUArch::v6S_M },
74 { "armv7-a", ARM::AK_ARMV7A, "7-A", ARMBuildAttrs::CPUArch::v7 },
75 { "armv7-r", ARM::AK_ARMV7R, "7-R", ARMBuildAttrs::CPUArch::v7 },
76 { "armv7-m", ARM::AK_ARMV7M, "7-M", ARMBuildAttrs::CPUArch::v7 },
77 { "armv7e-m", ARM::AK_ARMV7EM, "7E-M", ARMBuildAttrs::CPUArch::v7E_M },
78 { "armv8-a", ARM::AK_ARMV8A, "8-A", ARMBuildAttrs::CPUArch::v8 },
79 { "armv8.1-a", ARM::AK_ARMV8_1A, "8.1-A", ARMBuildAttrs::CPUArch::v8 },
80 // Non-standard Arch names.
81 { "iwmmxt", ARM::AK_IWMMXT, "iwmmxt", ARMBuildAttrs::CPUArch::v5TE },
82 { "iwmmxt2", ARM::AK_IWMMXT2, "iwmmxt2", ARMBuildAttrs::CPUArch::v5TE },
83 { "xscale", ARM::AK_XSCALE, "xscale", ARMBuildAttrs::CPUArch::v5TE },
84 { "armv5", ARM::AK_ARMV5, "5T", ARMBuildAttrs::CPUArch::v5T },
85 { "armv5e", ARM::AK_ARMV5E, "5TE", ARMBuildAttrs::CPUArch::v5TE },
86 { "armv6j", ARM::AK_ARMV6J, "6J", ARMBuildAttrs::CPUArch::v6 },
87 { "armv6hl", ARM::AK_ARMV6HL, "6-M", ARMBuildAttrs::CPUArch::v6_M },
88 { "armv7", ARM::AK_ARMV7, "7", ARMBuildAttrs::CPUArch::v7 },
89 { "armv7l", ARM::AK_ARMV7L, "7-L", ARMBuildAttrs::CPUArch::v7 },
90 { "armv7hl", ARM::AK_ARMV7HL, "7-L", ARMBuildAttrs::CPUArch::v7 },
91 { "armv7s", ARM::AK_ARMV7S, "7-S", ARMBuildAttrs::CPUArch::v7 }
93 // List of Arch Extension names.
94 // FIXME: TableGen this.
99 { "invalid", ARM::AEK_INVALID },
100 { "crc", ARM::AEK_CRC },
101 { "crypto", ARM::AEK_CRYPTO },
102 { "fp", ARM::AEK_FP },
103 { "idiv", ARM::AEK_HWDIV },
104 { "mp", ARM::AEK_MP },
105 { "sec", ARM::AEK_SEC },
106 { "virt", ARM::AEK_VIRT }
108 // List of CPU names and their arches.
109 // The same CPU can have multiple arches and can be default on multiple arches.
110 // When finding the Arch for a CPU, first-found prevails. Sort them accordingly.
111 // When this becomes table-generated, we'd probably need two tables.
112 // FIXME: TableGen this.
115 ARM::ArchKind ArchID;
118 { "arm2", ARM::AK_ARMV2, true },
119 { "arm3", ARM::AK_ARMV2A, true },
120 { "arm6", ARM::AK_ARMV3, true },
121 { "arm7m", ARM::AK_ARMV3M, true },
122 { "arm8", ARM::AK_ARMV4, false },
123 { "arm810", ARM::AK_ARMV4, false },
124 { "strongarm", ARM::AK_ARMV4, true },
125 { "strongarm110", ARM::AK_ARMV4, false },
126 { "strongarm1100", ARM::AK_ARMV4, false },
127 { "strongarm1110", ARM::AK_ARMV4, false },
128 { "arm7tdmi", ARM::AK_ARMV4T, true },
129 { "arm7tdmi-s", ARM::AK_ARMV4T, false },
130 { "arm710t", ARM::AK_ARMV4T, false },
131 { "arm720t", ARM::AK_ARMV4T, false },
132 { "arm9", ARM::AK_ARMV4T, false },
133 { "arm9tdmi", ARM::AK_ARMV4T, false },
134 { "arm920", ARM::AK_ARMV4T, false },
135 { "arm920t", ARM::AK_ARMV4T, false },
136 { "arm922t", ARM::AK_ARMV4T, false },
137 { "arm9312", ARM::AK_ARMV4T, false },
138 { "arm940t", ARM::AK_ARMV4T, false },
139 { "ep9312", ARM::AK_ARMV4T, false },
140 { "arm10tdmi", ARM::AK_ARMV5T, true },
141 { "arm1020t", ARM::AK_ARMV5T, false },
142 { "arm9e", ARM::AK_ARMV5TE, false },
143 { "arm946e-s", ARM::AK_ARMV5TE, false },
144 { "arm966e-s", ARM::AK_ARMV5TE, false },
145 { "arm968e-s", ARM::AK_ARMV5TE, false },
146 { "arm10e", ARM::AK_ARMV5TE, false },
147 { "arm1020e", ARM::AK_ARMV5TE, false },
148 { "arm1022e", ARM::AK_ARMV5TE, true },
149 { "iwmmxt", ARM::AK_ARMV5TE, false },
150 { "xscale", ARM::AK_ARMV5TE, false },
151 { "arm926ej-s", ARM::AK_ARMV5TEJ, true },
152 { "arm1136jf-s", ARM::AK_ARMV6, true },
153 { "arm1176j-s", ARM::AK_ARMV6K, false },
154 { "arm1176jz-s", ARM::AK_ARMV6K, false },
155 { "mpcore", ARM::AK_ARMV6K, false },
156 { "mpcorenovfp", ARM::AK_ARMV6K, false },
157 { "arm1176jzf-s", ARM::AK_ARMV6K, true },
158 { "arm1176jzf-s", ARM::AK_ARMV6Z, true },
159 { "arm1176jzf-s", ARM::AK_ARMV6ZK, true },
160 { "arm1156t2-s", ARM::AK_ARMV6T2, true },
161 { "arm1156t2f-s", ARM::AK_ARMV6T2, false },
162 { "cortex-m0", ARM::AK_ARMV6M, true },
163 { "cortex-m0plus", ARM::AK_ARMV6M, false },
164 { "cortex-m1", ARM::AK_ARMV6M, false },
165 { "sc000", ARM::AK_ARMV6M, false },
166 { "cortex-a5", ARM::AK_ARMV7A, false },
167 { "cortex-a7", ARM::AK_ARMV7A, false },
168 { "cortex-a8", ARM::AK_ARMV7A, true },
169 { "cortex-a9", ARM::AK_ARMV7A, false },
170 { "cortex-a12", ARM::AK_ARMV7A, false },
171 { "cortex-a15", ARM::AK_ARMV7A, false },
172 { "cortex-a17", ARM::AK_ARMV7A, false },
173 { "krait", ARM::AK_ARMV7A, false },
174 { "cortex-r4", ARM::AK_ARMV7R, true },
175 { "cortex-r4f", ARM::AK_ARMV7R, false },
176 { "cortex-r5", ARM::AK_ARMV7R, false },
177 { "cortex-r7", ARM::AK_ARMV7R, false },
178 { "sc300", ARM::AK_ARMV7M, false },
179 { "cortex-m3", ARM::AK_ARMV7M, true },
180 { "cortex-m4", ARM::AK_ARMV7EM, true },
181 { "cortex-m7", ARM::AK_ARMV7EM, false },
182 { "cortex-a53", ARM::AK_ARMV8A, true },
183 { "cortex-a57", ARM::AK_ARMV8A, false },
184 { "cortex-a72", ARM::AK_ARMV8A, false },
185 { "cyclone", ARM::AK_ARMV8A, false },
186 { "generic", ARM::AK_ARMV8_1A, true },
187 // Non-standard Arch names.
188 { "iwmmxt", ARM::AK_IWMMXT, true },
189 { "xscale", ARM::AK_XSCALE, true },
190 { "arm10tdmi", ARM::AK_ARMV5, true },
191 { "arm1022e", ARM::AK_ARMV5E, true },
192 { "arm1136j-s", ARM::AK_ARMV6J, true },
193 { "arm1136jz-s", ARM::AK_ARMV6J, false },
194 { "cortex-m0", ARM::AK_ARMV6SM, true },
195 { "arm1176jzf-s", ARM::AK_ARMV6HL, true },
196 { "cortex-a8", ARM::AK_ARMV7, true },
197 { "cortex-a8", ARM::AK_ARMV7L, true },
198 { "cortex-a8", ARM::AK_ARMV7HL, true },
199 { "cortex-m4", ARM::AK_ARMV7EM, true },
200 { "swift", ARM::AK_ARMV7S, true },
202 { "invalid", ARM::AK_INVALID, true }
209 // ======================================================= //
211 // ======================================================= //
213 const char *ARMTargetParser::getFPUName(unsigned FPUKind) {
214 if (FPUKind >= ARM::FK_LAST)
216 return FPUNames[FPUKind].Name;
219 const char *ARMTargetParser::getArchName(unsigned ArchKind) {
220 if (ArchKind >= ARM::AK_LAST)
222 return ARCHNames[ArchKind].Name;
225 const char *ARMTargetParser::getCPUAttr(unsigned ArchKind) {
226 if (ArchKind >= ARM::AK_LAST)
228 return ARCHNames[ArchKind].CPUAttr;
231 unsigned ARMTargetParser::getArchAttr(unsigned ArchKind) {
232 if (ArchKind >= ARM::AK_LAST)
233 return ARMBuildAttrs::CPUArch::Pre_v4;
234 return ARCHNames[ArchKind].ArchAttr;
237 const char *ARMTargetParser::getArchExtName(unsigned ArchExtKind) {
238 if (ArchExtKind >= ARM::AEK_LAST)
240 return ARCHExtNames[ArchExtKind].Name;
243 const char *ARMTargetParser::getDefaultCPU(StringRef Arch) {
244 unsigned AK = parseArch(Arch);
245 if (AK == ARM::AK_INVALID)
248 // Look for multiple AKs to find the default for pair AK+Name.
249 for (const auto CPU : CPUNames) {
250 if (CPU.ArchID == AK && CPU.Default)
256 // ======================================================= //
258 // ======================================================= //
260 StringRef ARMTargetParser::getFPUSynonym(StringRef FPU) {
261 return StringSwitch<StringRef>(FPU)
262 .Cases("fpa", "fpe2", "fpe3", "maverick", "invalid") // Unsupported
263 .Case("vfp2", "vfpv2")
264 .Case("vfp3", "vfpv3")
265 .Case("vfp4", "vfpv4")
266 .Case("vfp3-d16", "vfpv3-d16")
267 .Case("vfp4-d16", "vfpv4-d16")
268 // FIXME: sp-16 is NOT the same as d16
269 .Cases("fp4-sp-d16", "fpv4-sp-d16", "vfpv4-d16")
270 .Cases("fp4-dp-d16", "fpv4-dp-d16", "vfpv4-d16")
271 .Cases("fp5-sp-d16", "fpv5-sp-d16", "fpv5-d16")
272 .Cases("fp5-dp-d16", "fpv5-dp-d16", "fpv5-d16")
273 // FIXME: Clang uses it, but it's bogus, since neon defaults to vfpv3.
274 .Case("neon-vfpv3", "neon")
278 StringRef ARMTargetParser::getArchSynonym(StringRef Arch) {
279 return StringSwitch<StringRef>(Arch)
280 .Cases("armv6sm", "v6sm", "armv6s-m")
281 .Cases("armv6m", "v6m", "armv6-m")
282 .Cases("armv7a", "v7a", "armv7-a")
283 .Cases("armv7r", "v7r", "armv7-r")
284 .Cases("armv7m", "v7m", "armv7-m")
285 .Cases("armv7em", "v7em", "armv7e-m")
286 .Cases("armv8", "v8", "armv8-a")
287 .Cases("armv8a", "v8a", "armv8-a")
288 .Cases("armv8.1a", "v8.1a", "armv8.1-a")
289 .Cases("aarch64", "arm64", "armv8-a")
293 // MArch is expected to be of the form (arm|thumb)?(eb)?(v.+)?(eb)?, but
294 // (iwmmxt|xscale)(eb)? is also permitted. If the former, return
295 // "v.+", if the latter, return unmodified string, minus 'eb'.
296 // If invalid, return empty string.
297 StringRef ARMTargetParser::getCanonicalArchName(StringRef Arch) {
298 size_t offset = StringRef::npos;
300 StringRef Error = "";
302 // Begins with "arm" / "thumb", move past it.
303 if (A.startswith("arm64"))
305 else if (A.startswith("arm"))
307 else if (A.startswith("thumb"))
309 else if (A.startswith("aarch64")) {
311 // AArch64 uses "_be", not "eb" suffix.
312 if (A.find("eb") != StringRef::npos)
314 if (A.substr(offset,3) == "_be")
318 // Ex. "armebv7", move past the "eb".
319 if (offset != StringRef::npos && A.substr(offset, 2) == "eb")
321 // Or, if it ends with eb ("armv7eb"), chop it off.
322 else if (A.endswith("eb"))
323 A = A.substr(0, A.size() - 2);
325 if (offset != StringRef::npos)
326 A = A.substr(offset);
328 // Empty string means offset reached the end, which means it's valid.
332 // Only match non-marketing names
333 if (offset != StringRef::npos) {
334 // Must start with 'vN'.
335 if (A[0] != 'v' || !std::isdigit(A[1]))
337 // Can't have an extra 'eb'.
338 if (A.find("eb") != StringRef::npos)
342 // Arch will either be a 'v' name (v7a) or a marketing name (xscale).
346 unsigned ARMTargetParser::parseFPU(StringRef FPU) {
347 StringRef Syn = getFPUSynonym(FPU);
348 for (const auto F : FPUNames) {
352 return ARM::FK_INVALID;
355 // Allows partial match, ex. "v7a" matches "armv7a".
356 unsigned ARMTargetParser::parseArch(StringRef Arch) {
357 StringRef Syn = getArchSynonym(Arch);
358 for (const auto A : ARCHNames) {
359 if (StringRef(A.Name).endswith(Syn))
362 return ARM::AK_INVALID;
365 unsigned ARMTargetParser::parseArchExt(StringRef ArchExt) {
366 for (const auto A : ARCHExtNames) {
367 if (ArchExt == A.Name)
370 return ARM::AEK_INVALID;
373 unsigned ARMTargetParser::parseCPUArch(StringRef CPU) {
374 for (const auto C : CPUNames) {
378 return ARM::AK_INVALID;
381 // ARM, Thumb, AArch64
382 unsigned ARMTargetParser::parseArchISA(StringRef Arch) {
383 return StringSwitch<unsigned>(Arch)
384 .StartsWith("aarch64", ARM::IK_AARCH64)
385 .StartsWith("arm64", ARM::IK_AARCH64)
386 .StartsWith("thumb", ARM::IK_THUMB)
387 .StartsWith("arm", ARM::IK_ARM)
388 .Default(ARM::EK_INVALID);
392 unsigned ARMTargetParser::parseArchEndian(StringRef Arch) {
393 if (Arch.startswith("armeb") ||
394 Arch.startswith("thumbeb") ||
395 Arch.startswith("aarch64_be"))
398 if (Arch.startswith("arm") || Arch.startswith("thumb")) {
399 if (Arch.endswith("eb"))
402 return ARM::EK_LITTLE;
405 if (Arch.startswith("aarch64"))
406 return ARM::EK_LITTLE;
408 return ARM::EK_INVALID;
412 unsigned ARMTargetParser::parseArchProfile(StringRef Arch) {
413 Arch = getCanonicalArchName(Arch);
414 switch(parseArch(Arch)) {
417 case ARM::AK_ARMV6SM:
418 case ARM::AK_ARMV7EM:
425 case ARM::AK_ARMV8_1A:
428 return ARM::PK_INVALID;
431 // Version number (ex. v7 = 7).
432 unsigned ARMTargetParser::parseArchVersion(StringRef Arch) {
433 Arch = getCanonicalArchName(Arch);
434 switch(parseArch(Arch)) {
446 case ARM::AK_ARMV5TE:
448 case ARM::AK_IWMMXT2:
451 case ARM::AK_ARMV5TEJ:
456 case ARM::AK_ARMV6T2:
458 case ARM::AK_ARMV6ZK:
460 case ARM::AK_ARMV6SM:
461 case ARM::AK_ARMV6HL:
468 case ARM::AK_ARMV7HL:
470 case ARM::AK_ARMV7EM:
473 case ARM::AK_ARMV8_1A: