1 //===-- Host.cpp - Implement OS Host Concept --------------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This header file implements the operating system Host concept.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/System/Host.h"
15 #include "llvm/Config/config.h"
18 // Include the platform-specific parts of this class.
20 #include "Unix/Host.inc"
23 #include "Win32/Host.inc"
26 //===----------------------------------------------------------------------===//
28 // Implementations of the CPU detection routines
30 //===----------------------------------------------------------------------===//
34 #if defined(i386) || defined(__i386__) || defined(__x86__) || defined(_M_IX86)\
35 || defined(__x86_64__) || defined(_M_AMD64) || defined (_M_X64)
37 /// GetX86CpuIDAndInfo - Execute the specified cpuid and return the 4 values in the
38 /// specified arguments. If we can't run cpuid on the host, return true.
39 static bool GetX86CpuIDAndInfo(unsigned value, unsigned *rEAX,
40 unsigned *rEBX, unsigned *rECX, unsigned *rEDX) {
41 #if defined(__x86_64__) || defined(_M_AMD64) || defined (_M_X64)
43 // gcc doesn't know cpuid would clobber ebx/rbx. Preseve it manually.
44 asm ("movq\t%%rbx, %%rsi\n\t"
46 "xchgq\t%%rbx, %%rsi\n\t"
53 #elif defined(_MSC_VER)
55 __cpuid(registers, value);
62 #elif defined(i386) || defined(__i386__) || defined(__x86__) || defined(_M_IX86)
64 asm ("movl\t%%ebx, %%esi\n\t"
66 "xchgl\t%%ebx, %%esi\n\t"
73 #elif defined(_MSC_VER)
78 mov dword ptr [esi],eax
80 mov dword ptr [esi],ebx
82 mov dword ptr [esi],ecx
84 mov dword ptr [esi],edx
92 static void DetectX86FamilyModel(unsigned EAX, unsigned &Family, unsigned &Model) {
93 Family = (EAX >> 8) & 0xf; // Bits 8 - 11
94 Model = (EAX >> 4) & 0xf; // Bits 4 - 7
95 if (Family == 6 || Family == 0xf) {
97 // Examine extended family ID if family ID is F.
98 Family += (EAX >> 20) & 0xff; // Bits 20 - 27
99 // Examine extended model ID if family ID is 6 or F.
100 Model += ((EAX >> 16) & 0xf) << 4; // Bits 16 - 19
106 std::string sys::getHostCPUName() {
107 #if defined(__x86_64__) || defined(__i386__)
108 unsigned EAX = 0, EBX = 0, ECX = 0, EDX = 0;
109 if (GetX86CpuIDAndInfo(0x1, &EAX, &EBX, &ECX, &EDX))
113 DetectX86FamilyModel(EAX, Family, Model);
115 GetX86CpuIDAndInfo(0x80000001, &EAX, &EBX, &ECX, &EDX);
116 bool Em64T = (EDX >> 29) & 0x1;
117 bool HasSSE3 = (ECX & 0x1);
124 GetX86CpuIDAndInfo(0, &EAX, text.u+0, text.u+2, text.u+1);
125 if (memcmp(text.c, "GenuineIntel", 12) == 0) {
133 case 4: return "pentium-mmx";
134 default: return "pentium";
138 case 1: return "pentiumpro";
141 case 6: return "pentium2";
145 case 11: return "pentium3";
147 case 13: return "pentium-m";
148 case 14: return "yonah";
150 case 22: // Celeron M 540
152 case 23: // 45nm: Penryn , Wolfdale, Yorkfield (XE)
154 default: return "i686";
160 case 6: // same as 4, but 65nm
161 return (Em64T) ? "nocona" : "prescott";
167 return (Em64T) ? "x86-64" : "pentium4";
174 } else if (memcmp(text.c, "AuthenticAMD", 12) == 0) {
175 // FIXME: this poorly matches the generated SubtargetFeatureKV table. There
176 // appears to be no way to generate the wide variety of AMD-specific targets
177 // from the information returned from CPUID.
185 case 8: return "k6-2";
187 case 13: return "k6-3";
188 default: return "pentium";
192 case 4: return "athlon-tbird";
195 case 8: return "athlon-mp";
196 case 10: return "athlon-xp";
197 default: return "athlon";
204 case 1: return "opteron";
205 case 5: return "athlon-fx"; // also opteron
206 default: return "athlon64";