1 //===-- Host.cpp - Implement OS Host Concept --------------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This header file implements the operating system Host concept.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/System/Host.h"
15 #include "llvm/Config/config.h"
18 // Include the platform-specific parts of this class.
20 #include "Unix/Host.inc"
23 #include "Win32/Host.inc"
29 //===----------------------------------------------------------------------===//
31 // Implementations of the CPU detection routines
33 //===----------------------------------------------------------------------===//
37 #if defined(i386) || defined(__i386__) || defined(__x86__) || defined(_M_IX86)\
38 || defined(__x86_64__) || defined(_M_AMD64) || defined (_M_X64)
40 /// GetX86CpuIDAndInfo - Execute the specified cpuid and return the 4 values in the
41 /// specified arguments. If we can't run cpuid on the host, return true.
42 static bool GetX86CpuIDAndInfo(unsigned value, unsigned *rEAX,
43 unsigned *rEBX, unsigned *rECX, unsigned *rEDX) {
44 #if defined(__x86_64__) || defined(_M_AMD64) || defined (_M_X64)
46 // gcc doesn't know cpuid would clobber ebx/rbx. Preseve it manually.
47 asm ("movq\t%%rbx, %%rsi\n\t"
49 "xchgq\t%%rbx, %%rsi\n\t"
56 #elif defined(_MSC_VER)
58 __cpuid(registers, value);
65 #elif defined(i386) || defined(__i386__) || defined(__x86__) || defined(_M_IX86)
67 asm ("movl\t%%ebx, %%esi\n\t"
69 "xchgl\t%%ebx, %%esi\n\t"
76 #elif defined(_MSC_VER)
81 mov dword ptr [esi],eax
83 mov dword ptr [esi],ebx
85 mov dword ptr [esi],ecx
87 mov dword ptr [esi],edx
95 static void DetectX86FamilyModel(unsigned EAX, unsigned &Family, unsigned &Model) {
96 Family = (EAX >> 8) & 0xf; // Bits 8 - 11
97 Model = (EAX >> 4) & 0xf; // Bits 4 - 7
98 if (Family == 6 || Family == 0xf) {
100 // Examine extended family ID if family ID is F.
101 Family += (EAX >> 20) & 0xff; // Bits 20 - 27
102 // Examine extended model ID if family ID is 6 or F.
103 Model += ((EAX >> 16) & 0xf) << 4; // Bits 16 - 19
109 std::string sys::getHostCPUName() {
110 #if defined(__x86_64__) || defined(__i386__)
111 unsigned EAX = 0, EBX = 0, ECX = 0, EDX = 0;
112 if (GetX86CpuIDAndInfo(0x1, &EAX, &EBX, &ECX, &EDX))
116 DetectX86FamilyModel(EAX, Family, Model);
118 GetX86CpuIDAndInfo(0x80000001, &EAX, &EBX, &ECX, &EDX);
119 bool Em64T = (EDX >> 29) & 0x1;
120 bool HasSSE3 = (ECX & 0x1);
127 GetX86CpuIDAndInfo(0, &EAX, text.u+0, text.u+2, text.u+1);
128 if (memcmp(text.c, "GenuineIntel", 12) == 0) {
134 case 0: // Intel486TM DX processors
135 case 1: // Intel486TM DX processors
136 case 2: // Intel486 SX processors
137 case 3: // Intel487TM processors, IntelDX2 OverDrive® processors,
138 // IntelDX2TM processors
139 case 4: // Intel486 SL processor
140 case 5: // IntelSX2TM processors
141 case 7: // Write-Back Enhanced IntelDX2 processors
142 case 8: // IntelDX4 OverDrive processors, IntelDX4TM processors
143 default: return "i486";
147 case 1: // Pentium OverDrive processor for Pentium processor (60, 66),
148 // Pentium® processors (60, 66)
149 case 2: // Pentium OverDrive processor for Pentium processor (75, 90,
150 // 100, 120, 133), Pentium processors (75, 90, 100, 120, 133,
152 case 3: // Pentium OverDrive processors for Intel486 processor-based
156 case 4: // Pentium OverDrive processor with MMXTM technology for Pentium
157 // processor (75, 90, 100, 120, 133), Pentium processor with
158 // MMXTM technology (166, 200)
159 return "pentium-mmx";
161 default: return "pentium";
165 case 1: // Pentium Pro processor
168 case 3: // Intel Pentium II OverDrive processor, Pentium II processor,
170 case 5: // Pentium II processor, model 05, Pentium II Xeon processor,
171 // model 05, and Intel® Celeron® processor, model 05
172 case 6: // Celeron processor, model 06
175 case 7: // Pentium III processor, model 07, and Pentium III Xeon
176 // processor, model 07
177 case 8: // Pentium III processor, model 08, Pentium III Xeon processor,
178 // model 08, and Celeron processor, model 08
179 case 10: // Pentium III Xeon processor, model 0Ah
180 case 11: // Pentium III processor, model 0Bh
183 case 9: // Intel Pentium M processor, Intel Celeron M processor model 09.
184 case 13: // Intel Pentium M processor, Intel Celeron M processor, model
185 // 0Dh. All processors are manufactured using the 90 nm process.
188 case 14: // Intel CoreTM Duo processor, Intel CoreTM Solo processor, model
189 // 0Eh. All processors are manufactured using the 65 nm process.
192 case 15: // Intel CoreTM2 Duo processor, Intel CoreTM2 Duo mobile
193 // processor, Intel CoreTM2 Quad processor, Intel CoreTM2 Quad
194 // mobile processor, Intel CoreTM2 Extreme processor, Intel
195 // Pentium Dual-Core processor, Intel Xeon processor, model
196 // 0Fh. All processors are manufactured using the 65 nm process.
197 case 22: // Intel Celeron processor model 16h. All processors are
198 // manufactured using the 65 nm process
201 case 21: // Intel EP80579 Integrated Processor and Intel EP80579
202 // Integrated Processor with Intel QuickAssist Technology
203 return "i686"; // FIXME: ???
205 case 23: // Intel CoreTM2 Extreme processor, Intel Xeon processor, model
206 // 17h. All processors are manufactured using the 45 nm process.
208 // 45nm: Penryn , Wolfdale, Yorkfield (XE)
211 case 26: // Intel Core i7 processor and Intel Xeon processor. All
212 // processors are manufactured using the 45 nm process.
213 case 29: // Intel Xeon processor MP. All processors are manufactured using
214 // the 45 nm process.
217 case 28: // Intel Atom processor. All processors are manufactured using
221 default: return "i686";
225 case 0: // Pentium 4 processor, Intel Xeon processor. All processors are
226 // model 00h and manufactured using the 0.18 micron process.
227 case 1: // Pentium 4 processor, Intel Xeon processor, Intel Xeon
228 // processor MP, and Intel Celeron processor. All processors are
229 // model 01h and manufactured using the 0.18 micron process.
230 case 2: // Pentium 4 processor, Mobile Intel Pentium 4 processor – M,
231 // Intel Xeon processor, Intel Xeon processor MP, Intel Celeron
232 // processor, and Mobile Intel Celeron processor. All processors
233 // are model 02h and manufactured using the 0.13 micron process.
234 return (Em64T) ? "x86-64" : "pentium4";
236 case 3: // Pentium 4 processor, Intel Xeon processor, Intel Celeron D
237 // processor. All processors are model 03h and manufactured using
238 // the 90 nm process.
239 case 4: // Pentium 4 processor, Pentium 4 processor Extreme Edition,
240 // Pentium D processor, Intel Xeon processor, Intel Xeon
241 // processor MP, Intel Celeron D processor. All processors are
242 // model 04h and manufactured using the 90 nm process.
243 case 6: // Pentium 4 processor, Pentium D processor, Pentium processor
244 // Extreme Edition, Intel Xeon processor, Intel Xeon processor
245 // MP, Intel Celeron D processor. All processors are model 06h
246 // and manufactured using the 65 nm process.
247 return (Em64T) ? "nocona" : "prescott";
250 return (Em64T) ? "x86-64" : "pentium4";
257 } else if (memcmp(text.c, "AuthenticAMD", 12) == 0) {
258 // FIXME: this poorly matches the generated SubtargetFeatureKV table. There
259 // appears to be no way to generate the wide variety of AMD-specific targets
260 // from the information returned from CPUID.
268 case 8: return "k6-2";
270 case 13: return "k6-3";
271 default: return "pentium";
275 case 4: return "athlon-tbird";
278 case 8: return "athlon-mp";
279 case 10: return "athlon-xp";
280 default: return "athlon";
287 case 1: return "opteron";
288 case 5: return "athlon-fx"; // also opteron
289 default: return "athlon64";