1 //===-- AArch64AsmPrinter.cpp - Print machine code to an AArch64 .s file --===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains a printer that converts from our internal representation
11 // of machine-dependent LLVM code to GAS-format AArch64 assembly language.
13 //===----------------------------------------------------------------------===//
15 #include "AArch64AsmPrinter.h"
16 #include "InstPrinter/AArch64InstPrinter.h"
17 #include "llvm/ADT/SmallString.h"
18 #include "llvm/CodeGen/MachineModuleInfoImpls.h"
19 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
20 #include "llvm/IR/DebugInfo.h"
21 #include "llvm/IR/Mangler.h"
22 #include "llvm/MC/MCAsmInfo.h"
23 #include "llvm/MC/MCInst.h"
24 #include "llvm/MC/MCSymbol.h"
25 #include "llvm/Support/TargetRegistry.h"
29 #define DEBUG_TYPE "asm-printer"
31 /// Try to print a floating-point register as if it belonged to a specified
32 /// register-class. For example the inline asm operand modifier "b" requires its
33 /// argument to be printed as "bN".
34 static bool printModifiedFPRAsmOperand(const MachineOperand &MO,
35 const TargetRegisterInfo *TRI,
36 char RegType, raw_ostream &O) {
40 for (MCRegAliasIterator AR(MO.getReg(), TRI, true); AR.isValid(); ++AR) {
41 if (AArch64::FPR8RegClass.contains(*AR)) {
42 O << RegType << TRI->getEncodingValue(MO.getReg());
47 // The register doesn't correspond to anything floating-point like.
51 /// Implements the 'w' and 'x' inline asm operand modifiers, which print a GPR
52 /// with the obvious type and an immediate 0 as either wzr or xzr.
53 static bool printModifiedGPRAsmOperand(const MachineOperand &MO,
54 const TargetRegisterInfo *TRI,
55 const TargetRegisterClass &RegClass,
57 char Prefix = &RegClass == &AArch64::GPR32RegClass ? 'w' : 'x';
59 if (MO.isImm() && MO.getImm() == 0) {
62 } else if (MO.isReg()) {
63 if (MO.getReg() == AArch64::XSP || MO.getReg() == AArch64::WSP) {
64 O << (Prefix == 'x' ? "sp" : "wsp");
68 for (MCRegAliasIterator AR(MO.getReg(), TRI, true); AR.isValid(); ++AR) {
69 if (RegClass.contains(*AR)) {
70 O << AArch64InstPrinter::getRegisterName(*AR);
79 bool AArch64AsmPrinter::printSymbolicAddress(const MachineOperand &MO,
80 bool PrintImmediatePrefix,
81 StringRef Suffix, raw_ostream &O) {
84 switch (MO.getType()) {
87 case MachineOperand::MO_GlobalAddress:
88 Name = getSymbol(MO.getGlobal())->getName();
90 // Global variables may be accessed either via a GOT or in various fun and
91 // interesting TLS-model specific ways. Set the prefix modifier as
93 if (const GlobalVariable *GV = dyn_cast<GlobalVariable>(MO.getGlobal())) {
94 Reloc::Model RelocM = TM.getRelocationModel();
95 if (GV->isThreadLocal()) {
96 switch (TM.getTLSModel(GV)) {
97 case TLSModel::GeneralDynamic:
100 case TLSModel::LocalDynamic:
103 case TLSModel::InitialExec:
104 Modifier = "gottprel";
106 case TLSModel::LocalExec:
110 } else if (Subtarget->GVIsIndirectSymbol(GV, RelocM)) {
115 case MachineOperand::MO_BlockAddress:
116 Name = GetBlockAddressSymbol(MO.getBlockAddress())->getName();
118 case MachineOperand::MO_ConstantPoolIndex:
119 Name = GetCPISymbol(MO.getIndex())->getName();
123 // Some instructions (notably ADRP) don't take the # prefix for
124 // immediates. Only print it if asked to.
125 if (PrintImmediatePrefix)
128 // Only need the joining "_" if both the prefix and the suffix are
129 // non-null. This little block simply takes care of the four possibly
130 // combinations involved there.
131 if (Modifier == "" && Suffix == "")
133 else if (Modifier == "" && Suffix != "")
134 O << ":" << Suffix << ':' << Name;
135 else if (Modifier != "" && Suffix == "")
136 O << ":" << Modifier << ':' << Name;
138 O << ":" << Modifier << '_' << Suffix << ':' << Name;
143 bool AArch64AsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
145 const char *ExtraCode, raw_ostream &O) {
146 const TargetRegisterInfo *TRI = MF->getTarget().getRegisterInfo();
151 switch(ExtraCode[0]) {
153 if (!AsmPrinter::PrintAsmOperand(MI, OpNum, AsmVariant, ExtraCode, O))
157 // Output 32-bit general register operand, constant zero as wzr, or stack
158 // pointer as wsp. Ignored when used with other operand types.
159 if (!printModifiedGPRAsmOperand(MI->getOperand(OpNum), TRI,
160 AArch64::GPR32RegClass, O))
164 // Output 64-bit general register operand, constant zero as xzr, or stack
165 // pointer as sp. Ignored when used with other operand types.
166 if (!printModifiedGPRAsmOperand(MI->getOperand(OpNum), TRI,
167 AArch64::GPR64RegClass, O))
171 // Output higher numbered of a 64-bit general register pair
173 // Output least significant register of a 64-bit general register pair
175 // Output most significant register of a 64-bit general register pair
177 // FIXME note: these three operand modifiers will require, to some extent,
178 // adding a paired GPR64 register class. Initial investigation suggests that
179 // assertions are hit unless it has a type and is made legal for that type
180 // in ISelLowering. After that step is made, the number of modifications
181 // needed explodes (operation legality, calling conventions, stores, reg
183 llvm_unreachable("FIXME: Unimplemented register pairs");
189 if (!printModifiedFPRAsmOperand(MI->getOperand(OpNum), TRI,
194 // Output symbolic address with appropriate relocation modifier (also
195 // suitable for ADRP).
196 if (!printSymbolicAddress(MI->getOperand(OpNum), false, "", O))
200 // Output bits 11:0 of symbolic address with appropriate :lo12: relocation
202 if (!printSymbolicAddress(MI->getOperand(OpNum), true, "lo12", O))
206 // Output bits 23:12 of symbolic address with appropriate :hi12: relocation
207 // modifier (currently only for TLS local exec).
208 if (!printSymbolicAddress(MI->getOperand(OpNum), true, "hi12", O))
212 return PrintAsmMemoryOperand(MI, OpNum, AsmVariant, ExtraCode, O);
215 // There's actually no operand modifier, which leads to a slightly eclectic
216 // set of behaviour which we have to handle here.
217 const MachineOperand &MO = MI->getOperand(OpNum);
218 switch (MO.getType()) {
220 llvm_unreachable("Unexpected operand for inline assembly");
221 case MachineOperand::MO_Register:
222 // GCC prints the unmodified operand of a 'w' constraint as the vector
223 // register. Technically, we could allocate the argument as a VPR128, but
224 // that leads to extremely dodgy copies being generated to get the data
226 if (printModifiedFPRAsmOperand(MO, TRI, 'v', O))
227 O << AArch64InstPrinter::getRegisterName(MO.getReg());
229 case MachineOperand::MO_Immediate:
230 O << '#' << MO.getImm();
232 case MachineOperand::MO_FPImmediate:
233 assert(MO.getFPImm()->isExactlyValue(0.0) && "Only FP 0.0 expected");
236 case MachineOperand::MO_BlockAddress:
237 case MachineOperand::MO_ConstantPoolIndex:
238 case MachineOperand::MO_GlobalAddress:
239 return printSymbolicAddress(MO, false, "", O);
245 bool AArch64AsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
248 const char *ExtraCode,
250 // Currently both the memory constraints (m and Q) behave the same and amount
251 // to the address as a single register. In future, we may allow "m" to provide
252 // both a base and an offset.
253 const MachineOperand &MO = MI->getOperand(OpNum);
254 assert(MO.isReg() && "unexpected inline assembly memory operand");
255 O << '[' << AArch64InstPrinter::getRegisterName(MO.getReg()) << ']';
259 #include "AArch64GenMCPseudoLowering.inc"
261 void AArch64AsmPrinter::EmitInstruction(const MachineInstr *MI) {
262 // Do any auto-generated pseudo lowerings.
263 if (emitPseudoExpansionLowering(OutStreamer, MI))
267 LowerAArch64MachineInstrToMCInst(MI, TmpInst, *this);
268 EmitToStreamer(OutStreamer, TmpInst);
271 void AArch64AsmPrinter::EmitEndOfAsmFile(Module &M) {
272 if (Subtarget->isTargetELF()) {
273 const TargetLoweringObjectFileELF &TLOFELF =
274 static_cast<const TargetLoweringObjectFileELF &>(getObjFileLowering());
276 MachineModuleInfoELF &MMIELF = MMI->getObjFileInfo<MachineModuleInfoELF>();
278 // Output stubs for external and common global variables.
279 MachineModuleInfoELF::SymbolListTy Stubs = MMIELF.GetGVStubList();
280 if (!Stubs.empty()) {
281 OutStreamer.SwitchSection(TLOFELF.getDataRelSection());
282 const DataLayout *TD = TM.getDataLayout();
284 for (unsigned i = 0, e = Stubs.size(); i != e; ++i) {
285 OutStreamer.EmitLabel(Stubs[i].first);
286 OutStreamer.EmitSymbolValue(Stubs[i].second.getPointer(),
287 TD->getPointerSize(0));
294 bool AArch64AsmPrinter::runOnMachineFunction(MachineFunction &MF) {
295 return AsmPrinter::runOnMachineFunction(MF);
298 // Force static initialization.
299 extern "C" void LLVMInitializeAArch64AsmPrinter() {
300 RegisterAsmPrinter<AArch64AsmPrinter> X(TheAArch64leTarget);
301 RegisterAsmPrinter<AArch64AsmPrinter> Y(TheAArch64beTarget);