1 //==- AArch64FrameLowering.h - Define frame lowering for AArch64 -*- C++ -*--=//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This class implements the AArch64-specific parts of the TargetFrameLowering
13 //===----------------------------------------------------------------------===//
15 #ifndef LLVM_AARCH64_FRAMEINFO_H
16 #define LLVM_AARCH64_FRAMEINFO_H
18 #include "AArch64Subtarget.h"
19 #include "llvm/Target/TargetFrameLowering.h"
22 class AArch64Subtarget;
24 class AArch64FrameLowering : public TargetFrameLowering {
26 // In order to unify the spilling and restoring of callee-saved registers into
27 // emitFrameMemOps, we need to be able to specify which instructions to use
28 // for the relevant memory operations on each register class. An array of the
29 // following struct is populated and passed in to achieve this.
30 struct LoadStoreMethod {
31 const TargetRegisterClass *RegClass; // E.g. GPR64RegClass
33 // The preferred instruction.
34 unsigned PairOpcode; // E.g. LSPair64_STR
36 // Sometimes only a single register can be handled at once.
37 unsigned SingleOpcode; // E.g. LS64_STR
40 const AArch64Subtarget &STI;
43 explicit AArch64FrameLowering(const AArch64Subtarget &sti)
44 : TargetFrameLowering(TargetFrameLowering::StackGrowsDown, 16, 0, 16),
48 /// emitProlog/emitEpilog - These methods insert prolog and epilog code into
50 virtual void emitPrologue(MachineFunction &MF) const;
51 virtual void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
53 /// Decides how much stack adjustment to perform in each phase of the prologue
55 void splitSPAdjustments(uint64_t Total, uint64_t &Initial,
56 uint64_t &Residual) const;
58 int64_t resolveFrameIndexReference(MachineFunction &MF, int FrameIndex,
59 unsigned &FrameReg, int SPAdj,
60 bool IsCalleeSaveOp) const;
62 virtual void processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
63 RegScavenger *RS) const;
65 virtual bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
66 MachineBasicBlock::iterator MI,
67 const std::vector<CalleeSavedInfo> &CSI,
68 const TargetRegisterInfo *TRI) const;
69 virtual bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
70 MachineBasicBlock::iterator MI,
71 const std::vector<CalleeSavedInfo> &CSI,
72 const TargetRegisterInfo *TRI) const;
74 void eliminateCallFramePseudoInstr(MachineFunction &MF,
75 MachineBasicBlock &MBB,
76 MachineBasicBlock::iterator MI) const;
78 /// If the register is X30 (i.e. LR) and the return address is used in the
79 /// function then the callee-save store doesn't actually kill the register,
80 /// otherwise it does.
81 bool determinePrologueDeath(MachineBasicBlock &MBB, unsigned Reg) const;
83 /// This function emits the loads or stores required during prologue and
84 /// epilogue as efficiently as possible.
86 /// The operations involved in setting up and tearing down the frame are
87 /// similar enough to warrant a shared function, particularly as discrepancies
88 /// between the two would be disastrous.
89 void emitFrameMemOps(bool isStore, MachineBasicBlock &MBB,
90 MachineBasicBlock::iterator MI,
91 const std::vector<CalleeSavedInfo> &CSI,
92 const TargetRegisterInfo *TRI,
93 LoadStoreMethod PossibleClasses[],
94 unsigned NumClasses) const;
97 virtual bool hasFP(const MachineFunction &MF) const;
99 virtual bool useFPForAddressing(const MachineFunction &MF) const;
102 virtual bool hasReservedCallFrame(const MachineFunction &MF) const;
106 } // End llvm namespace