lib/Target/AArch64/AArch64Schedule.td

   1 //===- AArch64Schedule.td - AArch64 Scheduling Definitions -*- tablegen -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9
  10 //===----------------------------------------------------------------------===//
  11 // Generic processor itineraries for legacy compatibility.
  12
  13 def GenericItineraries : ProcessorItineraries<[], [], []>;
  14
  15
  16 //===----------------------------------------------------------------------===//
  17 // Base SchedReadWrite types
  18
  19 // Basic ALU
  20 def WriteALU : SchedWrite;  // Generic: may contain shift and/or ALU operation
  21 def WriteALUs : SchedWrite; // Shift only with no ALU operation
  22 def ReadALU : SchedRead;    // Operand not needed for shifting
  23 def ReadALUs : SchedRead;   // Operand needed for shifting
  24
  25 // Multiply with optional accumulate
  26 def WriteMAC : SchedWrite;
  27 def ReadMAC : SchedRead;
  28
  29 // Compares
  30 def WriteCMP : SchedWrite;
  31 def ReadCMP : SchedRead;
  32
  33 // Division
  34 def WriteDiv : SchedWrite;
  35 def ReadDiv : SchedRead;
  36
  37 // Loads
  38 def WriteLd : SchedWrite;
  39 def WritePreLd : SchedWrite;
  40 def ReadLd : SchedRead;
  41 def ReadPreLd : SchedRead;
  42
  43 // Branches
  44 def WriteBr : SchedWrite;
  45 def WriteBrL : SchedWrite;
  46 def ReadBr : SchedRead;
  47
  48 // Floating Point ALU
  49 def WriteFPALU : SchedWrite;
  50 def ReadFPALU : SchedRead;
  51
  52 // Floating Point MAC, Mul, Div, Sqrt
  53 //   Most processors will simply send all of these down a dedicated pipe, but
  54 //   they're explicitly seperated here for flexibility of modeling later. May
  55 //   consider consolidating them into a single WriteFPXXXX type in the future.
  56 def WriteFPMAC : SchedWrite;
  57 def WriteFPMul : SchedWrite;
  58 def WriteFPDiv : SchedWrite;
  59 def WriteFPSqrt : SchedWrite;
  60 def ReadFPMAC : SchedRead;
  61 def ReadFPMul : SchedRead;
  62 def ReadFPDiv : SchedRead;
  63 def ReadFPSqrt : SchedRead;
  64
  65 // Noop
  66 def WriteNoop : SchedWrite;
  67
  68
  69 //===----------------------------------------------------------------------===//
  70 // Subtarget specific Machine Models.
  71
  72 include "AArch64ScheduleA53.td"