1 //===-- AArch64Subtarget.cpp - AArch64 Subtarget Information ----*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the AArch64 specific subclass of TargetSubtarget.
12 //===----------------------------------------------------------------------===//
14 #include "AArch64InstrInfo.h"
15 #include "AArch64PBQPRegAlloc.h"
16 #include "AArch64Subtarget.h"
17 #include "llvm/ADT/SmallVector.h"
18 #include "llvm/CodeGen/MachineScheduler.h"
19 #include "llvm/IR/GlobalValue.h"
20 #include "llvm/Support/TargetRegistry.h"
24 #define DEBUG_TYPE "aarch64-subtarget"
26 #define GET_SUBTARGETINFO_CTOR
27 #define GET_SUBTARGETINFO_TARGET_DESC
28 #include "AArch64GenSubtargetInfo.inc"
31 EnableEarlyIfConvert("aarch64-early-ifcvt", cl::desc("Enable the early if "
32 "converter pass"), cl::init(true), cl::Hidden);
35 AArch64Subtarget::initializeSubtargetDependencies(StringRef FS) {
36 // Determine default and user-specified characteristics
38 if (CPUString.empty())
39 CPUString = "generic";
41 ParseSubtargetFeatures(CPUString, FS);
45 AArch64Subtarget::AArch64Subtarget(const std::string &TT,
46 const std::string &CPU,
47 const std::string &FS,
48 const TargetMachine &TM, bool LittleEndian)
49 : AArch64GenSubtargetInfo(TT, CPU, FS), ARMProcFamily(Others),
50 HasFPARMv8(false), HasNEON(false), HasCrypto(false), HasCRC(false),
51 HasZeroCycleRegMove(false), HasZeroCycleZeroing(false), CPUString(CPU),
53 // This nested ternary is horrible, but DL needs to be properly
55 // before TLInfo is constructed.
57 ? "e-m:o-i64:64-i128:128-n32:64-S128"
58 : (LittleEndian ? "e-m:e-i64:64-i128:128-n32:64-S128"
59 : "E-m:e-i64:64-i128:128-n32:64-S128")),
60 FrameLowering(), InstrInfo(initializeSubtargetDependencies(FS)),
61 TSInfo(&DL), TLInfo(TM) {}
63 /// ClassifyGlobalReference - Find the target operand flags that describe
64 /// how a global value should be referenced for the current subtarget.
66 AArch64Subtarget::ClassifyGlobalReference(const GlobalValue *GV,
67 const TargetMachine &TM) const {
68 bool isDecl = GV->isDeclarationForLinker();
70 // MachO large model always goes via a GOT, simply to get a single 8-byte
71 // absolute relocation on all global addresses.
72 if (TM.getCodeModel() == CodeModel::Large && isTargetMachO())
73 return AArch64II::MO_GOT;
75 // The small code mode's direct accesses use ADRP, which cannot necessarily
76 // produce the value 0 (if the code is above 4GB).
77 if (TM.getCodeModel() == CodeModel::Small &&
78 GV->isWeakForLinker() && isDecl) {
79 // In PIC mode use the GOT, but in absolute mode use a constant pool load.
80 if (TM.getRelocationModel() == Reloc::Static)
81 return AArch64II::MO_CONSTPOOL;
83 return AArch64II::MO_GOT;
86 // If symbol visibility is hidden, the extra load is not needed if
87 // the symbol is definitely defined in the current translation unit.
89 // The handling of non-hidden symbols in PIC mode is rather target-dependent:
90 // + On MachO, if the symbol is defined in this module the GOT can be
92 // + On ELF, the R_AARCH64_COPY relocation means that even symbols actually
93 // defined could end up in unexpected places. Use a GOT.
94 if (TM.getRelocationModel() != Reloc::Static && GV->hasDefaultVisibility()) {
96 return (isDecl || GV->isWeakForLinker()) ? AArch64II::MO_GOT
97 : AArch64II::MO_NO_FLAG;
99 // No need to go through the GOT for local symbols on ELF.
100 return GV->hasLocalLinkage() ? AArch64II::MO_NO_FLAG : AArch64II::MO_GOT;
103 return AArch64II::MO_NO_FLAG;
106 /// This function returns the name of a function which has an interface
107 /// like the non-standard bzero function, if such a function exists on
108 /// the current subtarget and it is considered prefereable over
109 /// memset with zero passed as the second argument. Otherwise it
111 const char *AArch64Subtarget::getBZeroEntry() const {
112 // Prefer bzero on Darwin only.
119 void AArch64Subtarget::overrideSchedPolicy(MachineSchedPolicy &Policy,
120 MachineInstr *begin, MachineInstr *end,
121 unsigned NumRegionInstrs) const {
122 // LNT run (at least on Cyclone) showed reasonably significant gains for
123 // bi-directional scheduling. 253.perlbmk.
124 Policy.OnlyTopDown = false;
125 Policy.OnlyBottomUp = false;
128 bool AArch64Subtarget::enableEarlyIfConversion() const {
129 return EnableEarlyIfConvert;
132 std::unique_ptr<PBQPRAConstraint>
133 AArch64Subtarget::getCustomPBQPConstraints() const {
137 return llvm::make_unique<A57ChainingConstraint>();