1 //===--- AArch64Subtarget.h - Define Subtarget for the AArch64 -*- C++ -*--===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the AArch64 specific subclass of TargetSubtarget.
12 //===----------------------------------------------------------------------===//
14 #ifndef AArch64SUBTARGET_H
15 #define AArch64SUBTARGET_H
17 #include "AArch64FrameLowering.h"
18 #include "AArch64ISelLowering.h"
19 #include "AArch64InstrInfo.h"
20 #include "AArch64RegisterInfo.h"
21 #include "AArch64SelectionDAGInfo.h"
22 #include "llvm/IR/DataLayout.h"
23 #include "llvm/Target/TargetSubtargetInfo.h"
26 #define GET_SUBTARGETINFO_HEADER
27 #include "AArch64GenSubtargetInfo.inc"
33 class AArch64Subtarget : public AArch64GenSubtargetInfo {
35 enum ARMProcFamilyEnum {Others, CortexA53, CortexA57, Cyclone};
37 /// ARMProcFamily - ARM processor family: Cortex-A53, Cortex-A57, and others.
38 ARMProcFamilyEnum ARMProcFamily;
45 // HasZeroCycleRegMove - Has zero-cycle register mov instructions.
46 bool HasZeroCycleRegMove;
48 // HasZeroCycleZeroing - Has zero-cycle zeroing instructions.
49 bool HasZeroCycleZeroing;
51 /// CPUString - String name of used CPU.
52 std::string CPUString;
54 /// TargetTriple - What processor and OS we're targeting.
58 AArch64FrameLowering FrameLowering;
59 AArch64InstrInfo InstrInfo;
60 AArch64SelectionDAGInfo TSInfo;
61 AArch64TargetLowering TLInfo;
63 /// initializeSubtargetDependencies - Initializes using CPUString and the
64 /// passed in feature string so that we can use initializer lists for
65 /// subtarget initialization.
66 AArch64Subtarget &initializeSubtargetDependencies(StringRef FS);
69 /// This constructor initializes the data members to match that
70 /// of the specified triple.
71 AArch64Subtarget(const std::string &TT, const std::string &CPU,
72 const std::string &FS, TargetMachine &TM, bool LittleEndian);
74 const AArch64SelectionDAGInfo *getSelectionDAGInfo() const override {
77 const AArch64FrameLowering *getFrameLowering() const override {
78 return &FrameLowering;
80 const AArch64TargetLowering *getTargetLowering() const override {
83 const AArch64InstrInfo *getInstrInfo() const override { return &InstrInfo; }
84 const DataLayout *getDataLayout() const override { return &DL; }
85 const AArch64RegisterInfo *getRegisterInfo() const override {
86 return &getInstrInfo()->getRegisterInfo();
88 bool enableMachineScheduler() const override { return true; }
90 bool hasZeroCycleRegMove() const { return HasZeroCycleRegMove; }
92 bool hasZeroCycleZeroing() const { return HasZeroCycleZeroing; }
94 bool hasFPARMv8() const { return HasFPARMv8; }
95 bool hasNEON() const { return HasNEON; }
96 bool hasCrypto() const { return HasCrypto; }
97 bool hasCRC() const { return HasCRC; }
99 bool isLittleEndian() const { return DL.isLittleEndian(); }
101 bool isTargetDarwin() const { return TargetTriple.isOSDarwin(); }
102 bool isTargetIOS() const { return TargetTriple.isiOS(); }
103 bool isTargetLinux() const { return TargetTriple.isOSLinux(); }
104 bool isTargetWindows() const { return TargetTriple.isOSWindows(); }
106 bool isTargetCOFF() const { return TargetTriple.isOSBinFormatCOFF(); }
107 bool isTargetELF() const { return TargetTriple.isOSBinFormatELF(); }
108 bool isTargetMachO() const { return TargetTriple.isOSBinFormatMachO(); }
110 bool isCyclone() const { return CPUString == "cyclone"; }
111 bool isCortexA57() const { return CPUString == "cortex-a57"; }
112 bool isCortexA53() const { return CPUString == "cortex-a53"; }
114 /// getMaxInlineSizeThreshold - Returns the maximum memset / memcpy size
115 /// that still makes it profitable to inline the call.
116 unsigned getMaxInlineSizeThreshold() const { return 64; }
118 /// ParseSubtargetFeatures - Parses features string setting specified
119 /// subtarget options. Definition of function is auto generated by tblgen.
120 void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
122 /// ClassifyGlobalReference - Find the target operand flags that describe
123 /// how a global value should be referenced for the current subtarget.
124 unsigned char ClassifyGlobalReference(const GlobalValue *GV,
125 const TargetMachine &TM) const;
127 /// This function returns the name of a function which has an interface
128 /// like the non-standard bzero function, if such a function exists on
129 /// the current subtarget and it is considered prefereable over
130 /// memset with zero passed as the second argument. Otherwise it
132 const char *getBZeroEntry() const;
134 void overrideSchedPolicy(MachineSchedPolicy &Policy, MachineInstr *begin,
136 unsigned NumRegionInstrs) const override;
138 bool enableEarlyIfConversion() const override;
140 } // End llvm namespace
142 #endif // AArch64SUBTARGET_H