1 //===--- AArch64Subtarget.h - Define Subtarget for the AArch64 -*- C++ -*--===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the AArch64 specific subclass of TargetSubtarget.
12 //===----------------------------------------------------------------------===//
14 #ifndef AArch64SUBTARGET_H
15 #define AArch64SUBTARGET_H
17 #include "llvm/Target/TargetSubtargetInfo.h"
18 #include "AArch64RegisterInfo.h"
21 #define GET_SUBTARGETINFO_HEADER
22 #include "AArch64GenSubtargetInfo.inc"
28 class AArch64Subtarget : public AArch64GenSubtargetInfo {
30 enum ARMProcFamilyEnum {Others, CortexA53, CortexA57, Cyclone};
32 /// ARMProcFamily - ARM processor family: Cortex-A53, Cortex-A57, and others.
33 ARMProcFamilyEnum ARMProcFamily;
40 // HasZeroCycleRegMove - Has zero-cycle register mov instructions.
41 bool HasZeroCycleRegMove;
43 // HasZeroCycleZeroing - Has zero-cycle zeroing instructions.
44 bool HasZeroCycleZeroing;
46 /// CPUString - String name of used CPU.
47 std::string CPUString;
49 /// TargetTriple - What processor and OS we're targeting.
52 /// IsLittleEndian - Is the target little endian?
56 /// This constructor initializes the data members to match that
57 /// of the specified triple.
58 AArch64Subtarget(const std::string &TT, const std::string &CPU,
59 const std::string &FS, bool LittleEndian);
61 bool enableMachineScheduler() const override { return true; }
63 bool hasZeroCycleRegMove() const { return HasZeroCycleRegMove; }
65 bool hasZeroCycleZeroing() const { return HasZeroCycleZeroing; }
67 bool hasFPARMv8() const { return HasFPARMv8; }
68 bool hasNEON() const { return HasNEON; }
69 bool hasCrypto() const { return HasCrypto; }
70 bool hasCRC() const { return HasCRC; }
72 bool isLittleEndian() const { return IsLittleEndian; }
74 bool isTargetDarwin() const { return TargetTriple.isOSDarwin(); }
76 bool isTargetELF() const { return TargetTriple.isOSBinFormatELF(); }
78 bool isTargetMachO() const { return TargetTriple.isOSBinFormatMachO(); }
80 bool isCyclone() const { return CPUString == "cyclone"; }
82 /// getMaxInlineSizeThreshold - Returns the maximum memset / memcpy size
83 /// that still makes it profitable to inline the call.
84 unsigned getMaxInlineSizeThreshold() const { return 64; }
86 /// ParseSubtargetFeatures - Parses features string setting specified
87 /// subtarget options. Definition of function is auto generated by tblgen.
88 void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
90 /// ClassifyGlobalReference - Find the target operand flags that describe
91 /// how a global value should be referenced for the current subtarget.
92 unsigned char ClassifyGlobalReference(const GlobalValue *GV,
93 const TargetMachine &TM) const;
95 /// This function returns the name of a function which has an interface
96 /// like the non-standard bzero function, if such a function exists on
97 /// the current subtarget and it is considered prefereable over
98 /// memset with zero passed as the second argument. Otherwise it
100 const char *getBZeroEntry() const;
102 void overrideSchedPolicy(MachineSchedPolicy &Policy, MachineInstr *begin,
104 unsigned NumRegionInstrs) const override;
106 bool enableEarlyIfConversion() const override;
108 } // End llvm namespace
110 #endif // AArch64SUBTARGET_H