1 //==-- AArch64TargetMachine.h - Define TargetMachine for AArch64 -*- C++ -*-==//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the AArch64 specific subclass of TargetMachine.
12 //===----------------------------------------------------------------------===//
14 #ifndef AArch64TARGETMACHINE_H
15 #define AArch64TARGETMACHINE_H
17 #include "AArch64InstrInfo.h"
18 #include "AArch64ISelLowering.h"
19 #include "AArch64Subtarget.h"
20 #include "AArch64FrameLowering.h"
21 #include "AArch64SelectionDAGInfo.h"
22 #include "llvm/IR/DataLayout.h"
23 #include "llvm/Target/TargetMachine.h"
24 #include "llvm/MC/MCStreamer.h"
28 class AArch64TargetMachine : public LLVMTargetMachine {
30 AArch64Subtarget Subtarget;
34 AArch64InstrInfo InstrInfo;
35 AArch64TargetLowering TLInfo;
36 AArch64FrameLowering FrameLowering;
37 AArch64SelectionDAGInfo TSInfo;
40 AArch64TargetMachine(const Target &T, StringRef TT, StringRef CPU,
41 StringRef FS, const TargetOptions &Options,
42 Reloc::Model RM, CodeModel::Model CM,
43 CodeGenOpt::Level OL, bool IsLittleEndian);
45 const AArch64Subtarget *getSubtargetImpl() const override {
48 const AArch64TargetLowering *getTargetLowering() const override {
51 const DataLayout *getDataLayout() const override { return &DL; }
52 const AArch64FrameLowering *getFrameLowering() const override {
53 return &FrameLowering;
55 const AArch64InstrInfo *getInstrInfo() const override { return &InstrInfo; }
56 const AArch64RegisterInfo *getRegisterInfo() const override {
57 return &InstrInfo.getRegisterInfo();
59 const AArch64SelectionDAGInfo *getSelectionDAGInfo() const override {
63 // Pass Pipeline Configuration
64 TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
66 /// \brief Register AArch64 analysis passes with a pass manager.
67 void addAnalysisPasses(PassManagerBase &PM) override;
70 // AArch64leTargetMachine - AArch64 little endian target machine.
72 class AArch64leTargetMachine : public AArch64TargetMachine {
73 virtual void anchor();
75 AArch64leTargetMachine(const Target &T, StringRef TT, StringRef CPU,
76 StringRef FS, const TargetOptions &Options,
77 Reloc::Model RM, CodeModel::Model CM,
78 CodeGenOpt::Level OL);
81 // AArch64beTargetMachine - AArch64 big endian target machine.
83 class AArch64beTargetMachine : public AArch64TargetMachine {
84 virtual void anchor();
86 AArch64beTargetMachine(const Target &T, StringRef TT, StringRef CPU,
87 StringRef FS, const TargetOptions &Options,
88 Reloc::Model RM, CodeModel::Model CM,
89 CodeGenOpt::Level OL);
92 } // end namespace llvm