1 //=== AArch64TargetMachine.h - Define TargetMachine for AArch64 -*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the AArch64 specific subclass of TargetMachine.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_AARCH64TARGETMACHINE_H
15 #define LLVM_AARCH64TARGETMACHINE_H
17 #include "AArch64FrameLowering.h"
18 #include "AArch64ISelLowering.h"
19 #include "AArch64InstrInfo.h"
20 #include "AArch64SelectionDAGInfo.h"
21 #include "AArch64Subtarget.h"
22 #include "llvm/IR/DataLayout.h"
23 #include "llvm/Target/TargetMachine.h"
27 class AArch64TargetMachine : public LLVMTargetMachine {
28 AArch64Subtarget Subtarget;
29 AArch64InstrInfo InstrInfo;
31 AArch64TargetLowering TLInfo;
32 AArch64SelectionDAGInfo TSInfo;
33 AArch64FrameLowering FrameLowering;
36 AArch64TargetMachine(const Target &T, StringRef TT, StringRef CPU,
37 StringRef FS, const TargetOptions &Options,
38 Reloc::Model RM, CodeModel::Model CM,
42 const AArch64InstrInfo *getInstrInfo() const {
46 const AArch64FrameLowering *getFrameLowering() const {
47 return &FrameLowering;
50 const AArch64TargetLowering *getTargetLowering() const {
54 const AArch64SelectionDAGInfo *getSelectionDAGInfo() const {
58 const AArch64Subtarget *getSubtargetImpl() const { return &Subtarget; }
60 const DataLayout *getDataLayout() const { return &DL; }
62 const TargetRegisterInfo *getRegisterInfo() const {
63 return &InstrInfo.getRegisterInfo();
65 TargetPassConfig *createPassConfig(PassManagerBase &PM);
67 virtual void addAnalysisPasses(PassManagerBase &PM);
70 // AArch64leTargetMachine - AArch64 little endian target machine.
72 class AArch64leTargetMachine : public AArch64TargetMachine {
73 virtual void anchor();
75 AArch64leTargetMachine(const Target &T, StringRef TT,
76 StringRef CPU, StringRef FS, const TargetOptions &Options,
77 Reloc::Model RM, CodeModel::Model CM,
78 CodeGenOpt::Level OL);
81 // AArch64beTargetMachine - AArch64 big endian target machine.
83 class AArch64beTargetMachine : public AArch64TargetMachine {
84 virtual void anchor();
86 AArch64beTargetMachine(const Target &T, StringRef TT,
87 StringRef CPU, StringRef FS, const TargetOptions &Options,
88 Reloc::Model RM, CodeModel::Model CM,
89 CodeGenOpt::Level OL);
92 } // End llvm namespace