1 //==-- AArch64TargetMachine.h - Define TargetMachine for AArch64 -*- C++ -*-==//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the AArch64 specific subclass of TargetMachine.
12 //===----------------------------------------------------------------------===//
14 #ifndef AArch64TARGETMACHINE_H
15 #define AArch64TARGETMACHINE_H
17 #include "AArch64InstrInfo.h"
18 #include "AArch64Subtarget.h"
19 #include "llvm/IR/DataLayout.h"
20 #include "llvm/Target/TargetMachine.h"
24 class AArch64TargetMachine : public LLVMTargetMachine {
26 AArch64Subtarget Subtarget;
29 AArch64TargetMachine(const Target &T, StringRef TT, StringRef CPU,
30 StringRef FS, const TargetOptions &Options,
31 Reloc::Model RM, CodeModel::Model CM,
32 CodeGenOpt::Level OL, bool IsLittleEndian);
34 const AArch64Subtarget *getSubtargetImpl() const override {
37 const AArch64TargetLowering *getTargetLowering() const override {
38 return getSubtargetImpl()->getTargetLowering();
40 const DataLayout *getDataLayout() const override {
41 return getSubtargetImpl()->getDataLayout();
43 const AArch64FrameLowering *getFrameLowering() const override {
44 return getSubtargetImpl()->getFrameLowering();
46 const AArch64InstrInfo *getInstrInfo() const override {
47 return getSubtargetImpl()->getInstrInfo();
49 const AArch64RegisterInfo *getRegisterInfo() const override {
50 return &getInstrInfo()->getRegisterInfo();
52 const AArch64SelectionDAGInfo *getSelectionDAGInfo() const override {
53 return getSubtargetImpl()->getSelectionDAGInfo();
56 // Pass Pipeline Configuration
57 TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
59 /// \brief Register AArch64 analysis passes with a pass manager.
60 void addAnalysisPasses(PassManagerBase &PM) override;
63 // AArch64leTargetMachine - AArch64 little endian target machine.
65 class AArch64leTargetMachine : public AArch64TargetMachine {
66 virtual void anchor();
68 AArch64leTargetMachine(const Target &T, StringRef TT, StringRef CPU,
69 StringRef FS, const TargetOptions &Options,
70 Reloc::Model RM, CodeModel::Model CM,
71 CodeGenOpt::Level OL);
74 // AArch64beTargetMachine - AArch64 big endian target machine.
76 class AArch64beTargetMachine : public AArch64TargetMachine {
77 virtual void anchor();
79 AArch64beTargetMachine(const Target &T, StringRef TT, StringRef CPU,
80 StringRef FS, const TargetOptions &Options,
81 Reloc::Model RM, CodeModel::Model CM,
82 CodeGenOpt::Level OL);
85 } // end namespace llvm