1 //==-- AArch64TargetMachine.h - Define TargetMachine for AArch64 -*- C++ -*-==//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the AArch64 specific subclass of TargetMachine.
12 //===----------------------------------------------------------------------===//
14 #ifndef AArch64TARGETMACHINE_H
15 #define AArch64TARGETMACHINE_H
17 #include "AArch64InstrInfo.h"
18 #include "AArch64ISelLowering.h"
19 #include "AArch64Subtarget.h"
20 #include "AArch64FrameLowering.h"
21 #include "AArch64SelectionDAGInfo.h"
22 #include "llvm/IR/DataLayout.h"
23 #include "llvm/Target/TargetMachine.h"
24 #include "llvm/MC/MCStreamer.h"
28 class AArch64TargetMachine : public LLVMTargetMachine {
30 AArch64Subtarget Subtarget;
33 AArch64TargetMachine(const Target &T, StringRef TT, StringRef CPU,
34 StringRef FS, const TargetOptions &Options,
35 Reloc::Model RM, CodeModel::Model CM,
36 CodeGenOpt::Level OL, bool IsLittleEndian);
38 const AArch64Subtarget *getSubtargetImpl() const override {
41 const AArch64TargetLowering *getTargetLowering() const override {
42 return getSubtargetImpl()->getTargetLowering();
44 const DataLayout *getDataLayout() const override {
45 return getSubtargetImpl()->getDataLayout();
47 const AArch64FrameLowering *getFrameLowering() const override {
48 return getSubtargetImpl()->getFrameLowering();
50 const AArch64InstrInfo *getInstrInfo() const override {
51 return getSubtargetImpl()->getInstrInfo();
53 const AArch64RegisterInfo *getRegisterInfo() const override {
54 return &getInstrInfo()->getRegisterInfo();
56 const AArch64SelectionDAGInfo *getSelectionDAGInfo() const override {
57 return getSubtargetImpl()->getSelectionDAGInfo();
60 // Pass Pipeline Configuration
61 TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
63 /// \brief Register AArch64 analysis passes with a pass manager.
64 void addAnalysisPasses(PassManagerBase &PM) override;
67 // AArch64leTargetMachine - AArch64 little endian target machine.
69 class AArch64leTargetMachine : public AArch64TargetMachine {
70 virtual void anchor();
72 AArch64leTargetMachine(const Target &T, StringRef TT, StringRef CPU,
73 StringRef FS, const TargetOptions &Options,
74 Reloc::Model RM, CodeModel::Model CM,
75 CodeGenOpt::Level OL);
78 // AArch64beTargetMachine - AArch64 big endian target machine.
80 class AArch64beTargetMachine : public AArch64TargetMachine {
81 virtual void anchor();
83 AArch64beTargetMachine(const Target &T, StringRef TT, StringRef CPU,
84 StringRef FS, const TargetOptions &Options,
85 Reloc::Model RM, CodeModel::Model CM,
86 CodeGenOpt::Level OL);
89 } // end namespace llvm