1 //===-- AArch64TargetTransformInfo.h - AArch64 specific TTI -----*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 /// This file a TargetTransformInfo::Concept conforming object specific to the
11 /// AArch64 target machine. It uses the target's detailed information to
12 /// provide more precise answers to certain TTI queries, while letting the
13 /// target independent and default TTI implementations handle the rest.
15 //===----------------------------------------------------------------------===//
17 #ifndef LLVM_LIB_TARGET_AARCH64_AARCH64TARGETTRANSFORMINFO_H
18 #define LLVM_LIB_TARGET_AARCH64_AARCH64TARGETTRANSFORMINFO_H
21 #include "AArch64TargetMachine.h"
22 #include "llvm/Analysis/TargetTransformInfo.h"
23 #include "llvm/CodeGen/BasicTTIImpl.h"
24 #include "llvm/Target/TargetLowering.h"
29 class AArch64TTIImpl : public BasicTTIImplBase<AArch64TTIImpl> {
30 typedef BasicTTIImplBase<AArch64TTIImpl> BaseT;
31 typedef TargetTransformInfo TTI;
34 const AArch64Subtarget *ST;
35 const AArch64TargetLowering *TLI;
37 /// Estimate the overhead of scalarizing an instruction. Insert and Extract
38 /// are set if the result needs to be inserted and/or extracted from vectors.
39 unsigned getScalarizationOverhead(Type *Ty, bool Insert, bool Extract);
41 const AArch64Subtarget *getST() const { return ST; }
42 const AArch64TargetLowering *getTLI() const { return TLI; }
44 enum MemIntrinsicType {
45 VECTOR_LDST_TWO_ELEMENTS,
46 VECTOR_LDST_THREE_ELEMENTS,
47 VECTOR_LDST_FOUR_ELEMENTS
51 explicit AArch64TTIImpl(const AArch64TargetMachine *TM, Function &F)
52 : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)),
53 TLI(ST->getTargetLowering()) {}
55 // Provide value semantics. MSVC requires that we spell all of these out.
56 AArch64TTIImpl(const AArch64TTIImpl &Arg)
57 : BaseT(static_cast<const BaseT &>(Arg)), ST(Arg.ST), TLI(Arg.TLI) {}
58 AArch64TTIImpl(AArch64TTIImpl &&Arg)
59 : BaseT(std::move(static_cast<BaseT &>(Arg))), ST(std::move(Arg.ST)),
60 TLI(std::move(Arg.TLI)) {}
62 /// \name Scalar TTI Implementations
65 using BaseT::getIntImmCost;
66 int getIntImmCost(int64_t Val);
67 int getIntImmCost(const APInt &Imm, Type *Ty);
68 int getIntImmCost(unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty);
69 int getIntImmCost(Intrinsic::ID IID, unsigned Idx, const APInt &Imm,
71 TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth);
75 /// \name Vector TTI Implementations
78 bool enableInterleavedAccessVectorization() { return true; }
80 unsigned getNumberOfRegisters(bool Vector) {
89 unsigned getRegisterBitWidth(bool Vector) {
98 unsigned getMaxInterleaveFactor(unsigned VF);
100 int getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src);
102 int getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index);
104 int getArithmeticInstrCost(
105 unsigned Opcode, Type *Ty,
106 TTI::OperandValueKind Opd1Info = TTI::OK_AnyValue,
107 TTI::OperandValueKind Opd2Info = TTI::OK_AnyValue,
108 TTI::OperandValueProperties Opd1PropInfo = TTI::OP_None,
109 TTI::OperandValueProperties Opd2PropInfo = TTI::OP_None);
111 int getAddressComputationCost(Type *Ty, bool IsComplex);
113 int getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy);
115 int getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
116 unsigned AddressSpace);
118 int getCostOfKeepingLiveOverCall(ArrayRef<Type *> Tys);
120 void getUnrollingPreferences(Loop *L, TTI::UnrollingPreferences &UP);
122 Value *getOrCreateResultFromMemIntrinsic(IntrinsicInst *Inst,
125 bool getTgtMemIntrinsic(IntrinsicInst *Inst, MemIntrinsicInfo &Info);
127 int getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy, unsigned Factor,
128 ArrayRef<unsigned> Indices, unsigned Alignment,
129 unsigned AddressSpace);
133 } // end namespace llvm