1 //===-- AArch64MCTargetDesc.h - AArch64 Target Descriptions -----*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file provides AArch64 specific target descriptions.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_AARCH64MCTARGETDESC_H
15 #define LLVM_AARCH64MCTARGETDESC_H
17 #include "llvm/Support/DataTypes.h"
26 class MCSubtargetInfo;
31 extern Target TheAArch64leTarget;
32 extern Target TheAArch64beTarget;
34 namespace AArch64_MC {
35 MCSubtargetInfo *createAArch64MCSubtargetInfo(StringRef TT, StringRef CPU,
39 MCCodeEmitter *createAArch64MCCodeEmitter(const MCInstrInfo &MCII,
40 const MCRegisterInfo &MRI,
41 const MCSubtargetInfo &STI,
44 MCObjectWriter *createAArch64ELFObjectWriter(raw_ostream &OS,
48 MCAsmBackend *createAArch64leAsmBackend(const Target &T,
49 const MCRegisterInfo &MRI,
50 StringRef TT, StringRef CPU);
52 MCAsmBackend *createAArch64beAsmBackend(const Target &T,
53 const MCRegisterInfo &MRI,
54 StringRef TT, StringRef CPU);
56 } // End llvm namespace
58 // Defines symbolic names for AArch64 registers. This defines a mapping from
59 // register name to register number.
61 #define GET_REGINFO_ENUM
62 #include "AArch64GenRegisterInfo.inc"
64 // Defines symbolic names for the AArch64 instructions.
66 #define GET_INSTRINFO_ENUM
67 #include "AArch64GenInstrInfo.inc"
69 #define GET_SUBTARGETINFO_ENUM
70 #include "AArch64GenSubtargetInfo.inc"