lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.h

   1 //===-- AArch64MCTargetDesc.h - AArch64 Target Descriptions -----*- C++ -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file provides AArch64 specific target descriptions.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #ifndef LLVM_AARCH64MCTARGETDESC_H
  15 #define LLVM_AARCH64MCTARGETDESC_H
  16
  17 #include "llvm/Support/DataTypes.h"
  18
  19 namespace llvm {
  20 class MCAsmBackend;
  21 class MCCodeEmitter;
  22 class MCContext;
  23 class MCInstrInfo;
  24 class MCObjectWriter;
  25 class MCRegisterInfo;
  26 class MCSubtargetInfo;
  27 class StringRef;
  28 class Target;
  29 class raw_ostream;
  30
  31 extern Target TheAArch64leTarget;
  32 extern Target TheAArch64beTarget;
  33
  34 namespace AArch64_MC {
  35   MCSubtargetInfo *createAArch64MCSubtargetInfo(StringRef TT, StringRef CPU,
  36                                                 StringRef FS);
  37 }
  38
  39 MCCodeEmitter *createAArch64MCCodeEmitter(const MCInstrInfo &MCII,
  40                                           const MCRegisterInfo &MRI,
  41                                           const MCSubtargetInfo &STI,
  42                                           MCContext &Ctx);
  43
  44 MCObjectWriter *createAArch64ELFObjectWriter(raw_ostream &OS,
  45                                              uint8_t OSABI,
  46                                              bool IsLittleEndian);
  47
  48 MCAsmBackend *createAArch64leAsmBackend(const Target &T,
  49                                         const MCRegisterInfo &MRI,
  50                                         StringRef TT, StringRef CPU);
  51
  52 MCAsmBackend *createAArch64beAsmBackend(const Target &T,
  53                                         const MCRegisterInfo &MRI,
  54                                         StringRef TT, StringRef CPU);
  55
  56 } // End llvm namespace
  57
  58 // Defines symbolic names for AArch64 registers.  This defines a mapping from
  59 // register name to register number.
  60 //
  61 #define GET_REGINFO_ENUM
  62 #include "AArch64GenRegisterInfo.inc"
  63
  64 // Defines symbolic names for the AArch64 instructions.
  65 //
  66 #define GET_INSTRINFO_ENUM
  67 #include "AArch64GenInstrInfo.inc"
  68
  69 #define GET_SUBTARGETINFO_ENUM
  70 #include "AArch64GenSubtargetInfo.inc"
  71
  72 #endif