lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.h

   1 //===-- AArch64MCTargetDesc.h - AArch64 Target Descriptions -----*- C++ -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file provides AArch64 specific target descriptions.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #ifndef AArch64MCTARGETDESC_H
  15 #define AArch64MCTARGETDESC_H
  16
  17 #include "llvm/Support/DataTypes.h"
  18 #include <string>
  19
  20 namespace llvm {
  21 class MCAsmBackend;
  22 class MCCodeEmitter;
  23 class MCContext;
  24 class MCInstrInfo;
  25 class MCRegisterInfo;
  26 class MCObjectWriter;
  27 class MCSubtargetInfo;
  28 class StringRef;
  29 class Target;
  30 class raw_ostream;
  31
  32 extern Target TheAArch64leTarget;
  33 extern Target TheAArch64beTarget;
  34 extern Target TheARM64leTarget;
  35 extern Target TheARM64beTarget;
  36
  37 MCCodeEmitter *createAArch64MCCodeEmitter(const MCInstrInfo &MCII,
  38                                         const MCRegisterInfo &MRI,
  39                                         const MCSubtargetInfo &STI,
  40                                         MCContext &Ctx);
  41 MCAsmBackend *createAArch64leAsmBackend(const Target &T,
  42                                         const MCRegisterInfo &MRI, StringRef TT,
  43                                         StringRef CPU);
  44 MCAsmBackend *createAArch64beAsmBackend(const Target &T,
  45                                         const MCRegisterInfo &MRI, StringRef TT,
  46                                         StringRef CPU);
  47
  48 MCObjectWriter *createAArch64ELFObjectWriter(raw_ostream &OS, uint8_t OSABI,
  49                                              bool IsLittleEndian);
  50
  51 MCObjectWriter *createAArch64MachObjectWriter(raw_ostream &OS, uint32_t CPUType,
  52                                             uint32_t CPUSubtype);
  53
  54 } // End llvm namespace
  55
  56 // Defines symbolic names for AArch64 registers.  This defines a mapping from
  57 // register name to register number.
  58 //
  59 #define GET_REGINFO_ENUM
  60 #include "AArch64GenRegisterInfo.inc"
  61
  62 // Defines symbolic names for the AArch64 instructions.
  63 //
  64 #define GET_INSTRINFO_ENUM
  65 #include "AArch64GenInstrInfo.inc"
  66
  67 #define GET_SUBTARGETINFO_ENUM
  68 #include "AArch64GenSubtargetInfo.inc"
  69
  70 #endif