1 //===-- AArch64MCTargetDesc.h - AArch64 Target Descriptions -----*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file provides AArch64 specific target descriptions.
12 //===----------------------------------------------------------------------===//
14 #ifndef AArch64MCTARGETDESC_H
15 #define AArch64MCTARGETDESC_H
17 #include "llvm/Support/DataTypes.h"
27 class MCSubtargetInfo;
32 extern Target TheAArch64leTarget;
33 extern Target TheAArch64beTarget;
34 extern Target TheARM64Target;
36 MCCodeEmitter *createAArch64MCCodeEmitter(const MCInstrInfo &MCII,
37 const MCRegisterInfo &MRI,
38 const MCSubtargetInfo &STI,
40 MCAsmBackend *createAArch64leAsmBackend(const Target &T,
41 const MCRegisterInfo &MRI, StringRef TT,
43 MCAsmBackend *createAArch64beAsmBackend(const Target &T,
44 const MCRegisterInfo &MRI, StringRef TT,
47 MCObjectWriter *createAArch64ELFObjectWriter(raw_ostream &OS, uint8_t OSABI,
50 MCObjectWriter *createAArch64MachObjectWriter(raw_ostream &OS, uint32_t CPUType,
53 } // End llvm namespace
55 // Defines symbolic names for AArch64 registers. This defines a mapping from
56 // register name to register number.
58 #define GET_REGINFO_ENUM
59 #include "AArch64GenRegisterInfo.inc"
61 // Defines symbolic names for the AArch64 instructions.
63 #define GET_INSTRINFO_ENUM
64 #include "AArch64GenInstrInfo.inc"
66 #define GET_SUBTARGETINFO_ENUM
67 #include "AArch64GenSubtargetInfo.inc"