AMDGPU: Add core backend files for R600/SI codegen v6
[oota-llvm.git] / lib / Target / AMDGPU / AMDGPUTargetMachine.h
1 //===-- AMDGPUTargetMachine.h - AMDGPU TargetMachine Interface --*- C++ -*-===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 //  The AMDGPU TargetMachine interface definition for hw codgen targets.
11 //
12 //===----------------------------------------------------------------------===//
13
14 #ifndef AMDGPU_TARGET_MACHINE_H
15 #define AMDGPU_TARGET_MACHINE_H
16
17 #include "AMDGPUInstrInfo.h"
18 #include "AMDGPUSubtarget.h"
19 #include "AMDILFrameLowering.h"
20 #include "AMDILIntrinsicInfo.h"
21 #include "R600ISelLowering.h"
22 #include "llvm/ADT/OwningPtr.h"
23 #include "llvm/Target/TargetData.h"
24
25 namespace llvm {
26
27 MCAsmInfo* createMCAsmInfo(const Target &T, StringRef TT);
28
29 class AMDGPUTargetMachine : public LLVMTargetMachine {
30
31   AMDGPUSubtarget Subtarget;
32   const TargetData DataLayout;
33   AMDILFrameLowering FrameLowering;
34   AMDILIntrinsicInfo IntrinsicInfo;
35   const AMDGPUInstrInfo * InstrInfo;
36   AMDGPUTargetLowering * TLInfo;
37   const InstrItineraryData* InstrItins;
38   bool mDump;
39
40 public:
41    AMDGPUTargetMachine(const Target &T, StringRef TT, StringRef FS,
42                        StringRef CPU,
43                        TargetOptions Options,
44                        Reloc::Model RM, CodeModel::Model CM,
45                        CodeGenOpt::Level OL);
46    ~AMDGPUTargetMachine();
47    virtual const AMDILFrameLowering* getFrameLowering() const {
48      return &FrameLowering;
49    }
50    virtual const AMDILIntrinsicInfo* getIntrinsicInfo() const {
51      return &IntrinsicInfo;
52    }
53    virtual const AMDGPUInstrInfo *getInstrInfo() const {return InstrInfo;}
54    virtual const AMDGPUSubtarget *getSubtargetImpl() const {return &Subtarget; }
55    virtual const AMDGPURegisterInfo *getRegisterInfo() const {
56       return &InstrInfo->getRegisterInfo();
57    }
58    virtual AMDGPUTargetLowering * getTargetLowering() const {
59       return TLInfo;
60    }
61    virtual const InstrItineraryData* getInstrItineraryData() const {
62       return InstrItins;
63    }
64    virtual const TargetData* getTargetData() const { return &DataLayout; }
65    virtual TargetPassConfig *createPassConfig(PassManagerBase &PM);
66    virtual bool addPassesToEmitFile(PassManagerBase &PM,
67                                               formatted_raw_ostream &Out,
68                                               CodeGenFileType FileType,
69                                               bool DisableVerify,
70                                               AnalysisID StartAfter = 0,
71                                               AnalysisID StopAfter = 0);
72 };
73
74 } // End namespace llvm
75
76 #endif // AMDGPU_TARGET_MACHINE_H