1 set(LLVM_TARGET_DEFINITIONS AMDGPU.td)
3 tablegen(LLVM AMDGPUGenRegisterInfo.inc -gen-register-info)
4 tablegen(LLVM AMDGPUGenInstrInfo.inc -gen-instr-info)
5 tablegen(LLVM AMDGPUGenDAGISel.inc -gen-dag-isel)
6 tablegen(LLVM AMDGPUGenCallingConv.inc -gen-callingconv)
7 tablegen(LLVM AMDGPUGenSubtargetInfo.inc -gen-subtarget)
8 tablegen(LLVM AMDGPUGenIntrinsics.inc -gen-tgt-intrinsic)
9 tablegen(LLVM AMDGPUGenMCCodeEmitter.inc -gen-emitter)
10 tablegen(LLVM AMDGPUGenDFAPacketizer.inc -gen-dfa-packetizer)
11 tablegen(LLVM AMDGPUGenAsmWriter.inc -gen-asm-writer)
12 tablegen(LLVM AMDGPUGenAsmMatcher.inc -gen-asm-matcher)
13 add_public_tablegen_target(AMDGPUCommonTableGen)
15 add_llvm_target(AMDGPUCodeGen
16 AMDILCFGStructurizer.cpp
17 AMDGPUAlwaysInlinePass.cpp
18 AMDGPUAnnotateKernelFeatures.cpp
19 AMDGPUAnnotateUniformValues.cpp
21 AMDGPUDiagnosticInfoUnsupported.cpp
22 AMDGPUFrameLowering.cpp
23 AMDGPUTargetObjectFile.cpp
24 AMDGPUIntrinsicInfo.cpp
25 AMDGPUISelDAGToDAG.cpp
27 AMDGPUMachineFunction.cpp
28 AMDGPUOpenCLImageTypeLoweringPass.cpp
30 AMDGPUTargetMachine.cpp
31 AMDGPUTargetTransformInfo.cpp
32 AMDGPUISelLowering.cpp
34 AMDGPUPromoteAlloca.cpp
35 AMDGPURegisterInfo.cpp
36 R600ClauseMergePass.cpp
37 R600ControlFlowFinalizer.cpp
38 R600EmitClauseMarkers.cpp
39 R600ExpandSpecialInstrs.cpp
42 R600MachineFunctionInfo.cpp
43 R600MachineScheduler.cpp
44 R600OptimizeVectorRegisters.cpp
47 R600TextureIntrinsicsReplacer.cpp
48 SIAnnotateControlFlow.cpp
49 SIFixControlFlowLiveIntervals.cpp
51 SIFixSGPRLiveRanges.cpp
57 SILoadStoreOptimizer.cpp
58 SILowerControlFlow.cpp
60 SIMachineFunctionInfo.cpp
62 SIShrinkInstructions.cpp
66 add_subdirectory(AsmParser)
67 add_subdirectory(InstPrinter)
68 add_subdirectory(TargetInfo)
69 add_subdirectory(MCTargetDesc)
70 add_subdirectory(Utils)