1 set(LLVM_TARGET_DEFINITIONS AMDGPU.td)
3 tablegen(LLVM AMDGPUGenRegisterInfo.inc -gen-register-info)
4 tablegen(LLVM AMDGPUGenInstrInfo.inc -gen-instr-info)
5 tablegen(LLVM AMDGPUGenDAGISel.inc -gen-dag-isel)
6 tablegen(LLVM AMDGPUGenCallingConv.inc -gen-callingconv)
7 tablegen(LLVM AMDGPUGenSubtargetInfo.inc -gen-subtarget)
8 tablegen(LLVM AMDGPUGenIntrinsics.inc -gen-tgt-intrinsic)
9 tablegen(LLVM AMDGPUGenMCCodeEmitter.inc -gen-emitter)
10 tablegen(LLVM AMDGPUGenDFAPacketizer.inc -gen-dfa-packetizer)
11 tablegen(LLVM AMDGPUGenAsmWriter.inc -gen-asm-writer)
12 tablegen(LLVM AMDGPUGenAsmMatcher.inc -gen-asm-matcher)
13 add_public_tablegen_target(AMDGPUCommonTableGen)
15 add_llvm_target(AMDGPUCodeGen
16 AMDILCFGStructurizer.cpp
17 AMDGPUAlwaysInlinePass.cpp
18 AMDGPUAnnotateKernelFeatures.cpp
20 AMDGPUDiagnosticInfoUnsupported.cpp
21 AMDGPUFrameLowering.cpp
22 AMDGPUHSATargetObjectFile.cpp
23 AMDGPUIntrinsicInfo.cpp
24 AMDGPUISelDAGToDAG.cpp
26 AMDGPUMachineFunction.cpp
27 AMDGPUOpenCLImageTypeLoweringPass.cpp
29 AMDGPUTargetMachine.cpp
30 AMDGPUTargetTransformInfo.cpp
31 AMDGPUISelLowering.cpp
33 AMDGPUPromoteAlloca.cpp
34 AMDGPURegisterInfo.cpp
35 R600ClauseMergePass.cpp
36 R600ControlFlowFinalizer.cpp
37 R600EmitClauseMarkers.cpp
38 R600ExpandSpecialInstrs.cpp
41 R600MachineFunctionInfo.cpp
42 R600MachineScheduler.cpp
43 R600OptimizeVectorRegisters.cpp
46 R600TextureIntrinsicsReplacer.cpp
47 SIAnnotateControlFlow.cpp
48 SIFixControlFlowLiveIntervals.cpp
50 SIFixSGPRLiveRanges.cpp
56 SILoadStoreOptimizer.cpp
57 SILowerControlFlow.cpp
59 SIMachineFunctionInfo.cpp
61 SIShrinkInstructions.cpp
65 add_subdirectory(AsmParser)
66 add_subdirectory(InstPrinter)
67 add_subdirectory(TargetInfo)
68 add_subdirectory(MCTargetDesc)
69 add_subdirectory(Utils)