lib/Target/AMDGPU/Processors.td

   1 //===-- Processors.td - R600 Processor definitions ------------------------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9
  10 class Proc<string Name, ProcessorItineraries itin, list<SubtargetFeature> Features>
  11 : Processor<Name, itin, Features>;
  12
  13 //===----------------------------------------------------------------------===//
  14 // R600
  15 //===----------------------------------------------------------------------===//
  16 def : Proc<"",           R600_VLIW5_Itin,
  17     [FeatureR600, FeatureVertexCache]>;
  18
  19 def : Proc<"r600",       R600_VLIW5_Itin,
  20     [FeatureR600 , FeatureVertexCache, FeatureWavefrontSize64]>;
  21
  22 def : Proc<"r630",       R600_VLIW5_Itin,
  23     [FeatureR600, FeatureVertexCache, FeatureWavefrontSize32]>;
  24
  25 def : Proc<"rs880",      R600_VLIW5_Itin,
  26     [FeatureR600, FeatureWavefrontSize16]>;
  27
  28 def : Proc<"rv670",      R600_VLIW5_Itin,
  29     [FeatureR600, FeatureFP64, FeatureVertexCache, FeatureWavefrontSize64]>;
  30
  31 //===----------------------------------------------------------------------===//
  32 // R700
  33 //===----------------------------------------------------------------------===//
  34
  35 def : Proc<"rv710",      R600_VLIW5_Itin,
  36     [FeatureR700, FeatureVertexCache, FeatureWavefrontSize32]>;
  37
  38 def : Proc<"rv730",      R600_VLIW5_Itin,
  39     [FeatureR700, FeatureVertexCache, FeatureWavefrontSize32]>;
  40
  41 def : Proc<"rv770",      R600_VLIW5_Itin,
  42     [FeatureR700, FeatureFP64, FeatureVertexCache, FeatureWavefrontSize64]>;
  43
  44 //===----------------------------------------------------------------------===//
  45 // Evergreen
  46 //===----------------------------------------------------------------------===//
  47
  48 def : Proc<"cedar",      R600_VLIW5_Itin,
  49     [FeatureEvergreen, FeatureVertexCache, FeatureWavefrontSize32,
  50      FeatureCFALUBug]>;
  51
  52 def : Proc<"redwood",    R600_VLIW5_Itin,
  53     [FeatureEvergreen, FeatureVertexCache, FeatureWavefrontSize64,
  54      FeatureCFALUBug]>;
  55
  56 def : Proc<"sumo",       R600_VLIW5_Itin,
  57     [FeatureEvergreen, FeatureWavefrontSize64, FeatureCFALUBug]>;
  58
  59 def : Proc<"juniper",    R600_VLIW5_Itin,
  60     [FeatureEvergreen, FeatureVertexCache, FeatureWavefrontSize64]>;
  61
  62 def : Proc<"cypress",    R600_VLIW5_Itin,
  63     [FeatureEvergreen, FeatureFP64, FeatureVertexCache,
  64      FeatureWavefrontSize64]>;
  65
  66 //===----------------------------------------------------------------------===//
  67 // Northern Islands
  68 //===----------------------------------------------------------------------===//
  69
  70 def : Proc<"barts",      R600_VLIW5_Itin,
  71     [FeatureNorthernIslands, FeatureVertexCache, FeatureCFALUBug]>;
  72
  73 def : Proc<"turks",      R600_VLIW5_Itin,
  74     [FeatureNorthernIslands, FeatureVertexCache, FeatureCFALUBug]>;
  75
  76 def : Proc<"caicos",     R600_VLIW5_Itin,
  77     [FeatureNorthernIslands, FeatureCFALUBug]>;
  78
  79 def : Proc<"cayman",     R600_VLIW4_Itin,
  80     [FeatureNorthernIslands, FeatureFP64, FeatureCaymanISA]>;
  81
  82 //===----------------------------------------------------------------------===//
  83 // Southern Islands
  84 //===----------------------------------------------------------------------===//
  85
  86 def : ProcessorModel<"SI", SIFullSpeedModel,
  87   [FeatureSouthernIslands, FeatureFastFMAF32]
  88 >;
  89
  90 def : ProcessorModel<"tahiti",   SIFullSpeedModel,
  91   [FeatureSouthernIslands, FeatureFastFMAF32]
  92 >;
  93
  94 def : ProcessorModel<"pitcairn", SIQuarterSpeedModel, [FeatureSouthernIslands]>;
  95
  96 def : ProcessorModel<"verde",    SIQuarterSpeedModel, [FeatureSouthernIslands]>;
  97
  98 def : ProcessorModel<"oland",    SIQuarterSpeedModel, [FeatureSouthernIslands]>;
  99
 100 def : ProcessorModel<"hainan",   SIQuarterSpeedModel, [FeatureSouthernIslands]>;
 101
 102 //===----------------------------------------------------------------------===//
 103 // Sea Islands
 104 //===----------------------------------------------------------------------===//
 105
 106 def : ProcessorModel<"bonaire",    SIQuarterSpeedModel,
 107   [FeatureSeaIslands, FeatureLDSBankCount32, FeatureISAVersion7_0_0]
 108 >;
 109
 110 def : ProcessorModel<"kabini",     SIQuarterSpeedModel,
 111   [FeatureSeaIslands, FeatureLDSBankCount16]
 112 >;
 113
 114 def : ProcessorModel<"kaveri",     SIQuarterSpeedModel,
 115   [FeatureSeaIslands, FeatureLDSBankCount32, FeatureISAVersion7_0_0]
 116 >;
 117
 118 def : ProcessorModel<"hawaii", SIFullSpeedModel,
 119   [FeatureSeaIslands, FeatureFastFMAF32, FeatureLDSBankCount32,
 120    FeatureISAVersion7_0_1]
 121 >;
 122
 123 def : ProcessorModel<"mullins",    SIQuarterSpeedModel,
 124   [FeatureSeaIslands, FeatureLDSBankCount16]>;
 125
 126 //===----------------------------------------------------------------------===//
 127 // Volcanic Islands
 128 //===----------------------------------------------------------------------===//
 129
 130 def : ProcessorModel<"tonga",   SIQuarterSpeedModel,
 131   [FeatureVolcanicIslands, FeatureSGPRInitBug, FeatureISAVersion8_0_0]
 132 >;
 133
 134 def : ProcessorModel<"iceland", SIQuarterSpeedModel,
 135   [FeatureVolcanicIslands, FeatureSGPRInitBug, FeatureISAVersion8_0_0]
 136 >;
 137
 138 def : ProcessorModel<"carrizo", SIQuarterSpeedModel,
 139   [FeatureVolcanicIslands, FeatureISAVersion8_0_1]
 140 >;
 141
 142 def : ProcessorModel<"fiji", SIQuarterSpeedModel,
 143   [FeatureVolcanicIslands, FeatureISAVersion8_0_1]
 144 >;
 145
 146 def : ProcessorModel<"stoney", SIQuarterSpeedModel,
 147   [FeatureVolcanicIslands, FeatureISAVersion8_0_1]
 148 >;