1 //===- ARM.td - Describe the ARM Target Machine -----------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
13 //===----------------------------------------------------------------------===//
14 // Target-independent interfaces which we are implementing
15 //===----------------------------------------------------------------------===//
17 include "llvm/Target/Target.td"
19 //===----------------------------------------------------------------------===//
20 // ARM Subtarget features.
23 def ArchV4T : SubtargetFeature<"v4t", "ARMArchVersion", "V4T",
25 def ArchV5T : SubtargetFeature<"v5t", "ARMArchVersion", "V5T",
27 def ArchV5TE : SubtargetFeature<"v5te", "ARMArchVersion", "V5TE",
28 "ARM v5TE, v5TEj, v5TExp">;
29 def ArchV6 : SubtargetFeature<"v6", "ARMArchVersion", "V6",
31 def ArchV7A : SubtargetFeature<"v7a", "ARMArchVersion", "V7A",
33 def FeatureVFP2 : SubtargetFeature<"vfp2", "ARMFPUType", "VFPv2",
34 "Enable VFP2 instructions">;
35 def FeatureVFP3 : SubtargetFeature<"vfp3", "ARMFPUType", "VFPv3",
36 "Enable VFP3 instructions">;
37 def FeatureNEON : SubtargetFeature<"neon", "ARMFPUType", "NEON",
38 "Enable NEON instructions">;
39 def FeatureThumb2 : SubtargetFeature<"thumb2", "ThumbMode", "Thumb2",
40 "Enable Thumb2 instructions">;
42 //===----------------------------------------------------------------------===//
43 // ARM Processors supported.
46 class Proc<string Name, list<SubtargetFeature> Features>
47 : Processor<Name, NoItineraries, Features>;
50 def : Proc<"generic", []>;
51 def : Proc<"arm8", []>;
52 def : Proc<"arm810", []>;
53 def : Proc<"strongarm", []>;
54 def : Proc<"strongarm110", []>;
55 def : Proc<"strongarm1100", []>;
56 def : Proc<"strongarm1110", []>;
59 def : Proc<"arm7tdmi", [ArchV4T]>;
60 def : Proc<"arm7tdmi-s", [ArchV4T]>;
61 def : Proc<"arm710t", [ArchV4T]>;
62 def : Proc<"arm720t", [ArchV4T]>;
63 def : Proc<"arm9", [ArchV4T]>;
64 def : Proc<"arm9tdmi", [ArchV4T]>;
65 def : Proc<"arm920", [ArchV4T]>;
66 def : Proc<"arm920t", [ArchV4T]>;
67 def : Proc<"arm922t", [ArchV4T]>;
68 def : Proc<"arm940t", [ArchV4T]>;
69 def : Proc<"ep9312", [ArchV4T]>;
72 def : Proc<"arm10tdmi", [ArchV5T]>;
73 def : Proc<"arm1020t", [ArchV5T]>;
76 def : Proc<"arm9e", [ArchV5TE]>;
77 def : Proc<"arm926ej-s", [ArchV5TE]>;
78 def : Proc<"arm946e-s", [ArchV5TE]>;
79 def : Proc<"arm966e-s", [ArchV5TE]>;
80 def : Proc<"arm968e-s", [ArchV5TE]>;
81 def : Proc<"arm10e", [ArchV5TE]>;
82 def : Proc<"arm1020e", [ArchV5TE]>;
83 def : Proc<"arm1022e", [ArchV5TE]>;
84 def : Proc<"xscale", [ArchV5TE]>;
85 def : Proc<"iwmmxt", [ArchV5TE]>;
88 def : Proc<"arm1136j-s", [ArchV6]>;
89 def : Proc<"arm1136jf-s", [ArchV6, FeatureVFP2]>;
90 def : Proc<"arm1176jz-s", [ArchV6]>;
91 def : Proc<"arm1176jzf-s", [ArchV6, FeatureVFP2]>;
92 def : Proc<"mpcorenovfp", [ArchV6]>;
93 def : Proc<"mpcore", [ArchV6, FeatureVFP2]>;
95 def : Proc<"arm1156t2-s", [ArchV6, FeatureThumb2]>;
96 def : Proc<"arm1156t2f-s", [ArchV6, FeatureThumb2, FeatureVFP2]>;
98 def : Proc<"cortex-a8", [ArchV7A, FeatureThumb2, FeatureNEON]>;
99 def : Proc<"cortex-a9", [ArchV7A, FeatureThumb2, FeatureNEON]>;
101 //===----------------------------------------------------------------------===//
102 // Register File Description
103 //===----------------------------------------------------------------------===//
105 include "ARMRegisterInfo.td"
107 include "ARMCallingConv.td"
109 //===----------------------------------------------------------------------===//
110 // Instruction Descriptions
111 //===----------------------------------------------------------------------===//
113 include "ARMInstrInfo.td"
115 def ARMInstrInfo : InstrInfo {
116 // Define how we want to layout our target-specific information field.
117 let TSFlagsFields = ["AddrModeBits",
122 let TSFlagsShifts = [0,
129 //===----------------------------------------------------------------------===//
130 // Declare the target which we are implementing
131 //===----------------------------------------------------------------------===//
134 // Pull in Instruction Info:
135 let InstructionSet = ARMInstrInfo;