1 //===-- ARMAsmBackend.cpp - ARM Assembler Backend -------------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 #include "ARMAddressingModes.h"
12 #include "ARMFixupKinds.h"
13 #include "llvm/ADT/Twine.h"
14 #include "llvm/MC/MCAssembler.h"
15 #include "llvm/MC/MCExpr.h"
16 #include "llvm/MC/MCObjectFormat.h"
17 #include "llvm/MC/MCObjectWriter.h"
18 #include "llvm/MC/MCSectionELF.h"
19 #include "llvm/MC/MCSectionMachO.h"
20 #include "llvm/Object/MachOFormat.h"
21 #include "llvm/Support/ELF.h"
22 #include "llvm/Support/ErrorHandling.h"
23 #include "llvm/Support/raw_ostream.h"
24 #include "llvm/Target/TargetAsmBackend.h"
25 #include "llvm/Target/TargetRegistry.h"
29 class ARMAsmBackend : public TargetAsmBackend {
31 ARMAsmBackend(const Target &T) : TargetAsmBackend() {}
33 bool MayNeedRelaxation(const MCInst &Inst) const;
35 void RelaxInstruction(const MCInst &Inst, MCInst &Res) const;
37 bool WriteNopData(uint64_t Count, MCObjectWriter *OW) const;
39 unsigned getPointerSize() const {
43 } // end anonymous namespace
45 bool ARMAsmBackend::MayNeedRelaxation(const MCInst &Inst) const {
46 // FIXME: Thumb targets, different move constant targets..
50 void ARMAsmBackend::RelaxInstruction(const MCInst &Inst, MCInst &Res) const {
51 assert(0 && "ARMAsmBackend::RelaxInstruction() unimplemented");
55 bool ARMAsmBackend::WriteNopData(uint64_t Count, MCObjectWriter *OW) const {
56 // FIXME: Zero fill for now. That's not right, but at least will get the
57 // section size right.
58 for (uint64_t i = 0; i != Count; ++i)
63 static unsigned adjustFixupValue(unsigned Kind, uint64_t Value) {
66 llvm_unreachable("Unknown fixup kind!");
69 case ARM::fixup_arm_movt_hi16:
70 case ARM::fixup_arm_movw_lo16: {
71 unsigned Hi4 = (Value & 0xF000) >> 12;
72 unsigned Lo12 = Value & 0x0FFF;
75 Value = (Hi4 << 16) | (Lo12);
78 case ARM::fixup_arm_ldst_pcrel_12: {
80 // ARM PC-relative values are offset by 8.
82 if ((int64_t)Value < 0) {
86 assert ((Value < 4096) && "Out of range pc-relative fixup value!");
90 case ARM::fixup_arm_adr_pcrel_12: {
91 // ARM PC-relative values are offset by 8.
93 unsigned opc = 4; // bits {24-21}. Default to add: 0b0100
94 if ((int64_t)Value < 0) {
98 assert(ARM_AM::getSOImmVal(Value) != -1 &&
99 "Out of range pc-relative fixup value!");
100 // Encode the immediate and shift the opcode into place.
101 return ARM_AM::getSOImmVal(Value) | (opc << 21);
103 case ARM::fixup_arm_branch:
104 // These values don't encode the low two bits since they're always zero.
105 // Offset by 8 just as above.
106 return 0xFFFFFF & ((Value - 8) >> 2);
107 case ARM::fixup_arm_pcrel_10: {
108 // Offset by 8 just as above.
111 if ((int64_t)Value < 0) {
115 // These values don't encode the low two bits since they're always zero.
117 assert ((Value < 256) && "Out of range pc-relative fixup value!");
118 Value |= isAdd << 23;
125 // FIXME: This should be in a separate file.
126 // ELF is an ELF of course...
127 class ELFARMAsmBackend : public ARMAsmBackend {
128 MCELFObjectFormat Format;
131 Triple::OSType OSType;
132 ELFARMAsmBackend(const Target &T, Triple::OSType _OSType)
133 : ARMAsmBackend(T), OSType(_OSType) {
134 HasScatteredSymbols = true;
137 virtual const MCObjectFormat &getObjectFormat() const {
141 void ApplyFixup(const MCFixup &Fixup, MCDataFragment &DF,
142 uint64_t Value) const;
144 MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
145 return createELFObjectWriter(OS, /*Is64Bit=*/false,
147 /*IsLittleEndian=*/true,
148 /*HasRelocationAddend=*/false);
152 // Fixme: Raise this to share code between Darwin and ELF.
153 void ELFARMAsmBackend::ApplyFixup(const MCFixup &Fixup, MCDataFragment &DF,
154 uint64_t Value) const {
156 // Fixme: 2 for Thumb
157 unsigned NumBytes = 4;
158 Value = adjustFixupValue(Fixup.getKind(), Value);
160 assert((Fixup.getOffset() % NumBytes == 0)
161 && "Offset mod NumBytes is nonzero!");
162 // For each byte of the fragment that the fixup touches, mask in the
163 // bits from the fixup value.
164 // The Value has been "split up" into the appropriate bitfields above.
165 for (unsigned i = 0; i != NumBytes; ++i) {
166 DF.getContents()[Fixup.getOffset() + i] |= uint8_t(Value >> (i * 8));
171 // FIXME: This should be in a separate file.
172 class DarwinARMAsmBackend : public ARMAsmBackend {
173 MCMachOObjectFormat Format;
175 DarwinARMAsmBackend(const Target &T) : ARMAsmBackend(T) {
176 HasScatteredSymbols = true;
179 virtual const MCObjectFormat &getObjectFormat() const {
183 void ApplyFixup(const MCFixup &Fixup, MCDataFragment &DF,
184 uint64_t Value) const;
186 MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
187 // FIXME: Subtarget info should be derived. Force v7 for now.
188 return createMachObjectWriter(OS, /*Is64Bit=*/false,
189 object::mach::CTM_ARM,
190 object::mach::CSARM_V7,
191 /*IsLittleEndian=*/true);
194 virtual bool doesSectionRequireSymbols(const MCSection &Section) const {
198 } // end anonymous namespace
200 static unsigned getFixupKindNumBytes(unsigned Kind) {
202 default: llvm_unreachable("Unknown fixup kind!");
203 case FK_Data_4: return 4;
204 case ARM::fixup_arm_ldst_pcrel_12: return 3;
205 case ARM::fixup_arm_pcrel_10: return 3;
206 case ARM::fixup_arm_adr_pcrel_12: return 3;
207 case ARM::fixup_arm_branch: return 3;
211 void DarwinARMAsmBackend::ApplyFixup(const MCFixup &Fixup, MCDataFragment &DF,
212 uint64_t Value) const {
213 unsigned NumBytes = getFixupKindNumBytes(Fixup.getKind());
214 Value = adjustFixupValue(Fixup.getKind(), Value);
216 assert(Fixup.getOffset() + NumBytes <= DF.getContents().size() &&
217 "Invalid fixup offset!");
218 // For each byte of the fragment that the fixup touches, mask in the
219 // bits from the fixup value.
220 for (unsigned i = 0; i != NumBytes; ++i)
221 DF.getContents()[Fixup.getOffset() + i] |= uint8_t(Value >> (i * 8));
223 } // end anonymous namespace
225 TargetAsmBackend *llvm::createARMAsmBackend(const Target &T,
226 const std::string &TT) {
227 switch (Triple(TT).getOS()) {
229 return new DarwinARMAsmBackend(T);
230 case Triple::MinGW32:
233 assert(0 && "Windows not supported on ARM");
235 return new ELFARMAsmBackend(T, Triple(TT).getOS());