1 //===-- ARMAsmBackend.cpp - ARM Assembler Backend -------------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #include "llvm/Target/TargetAsmBackend.h"
12 #include "ARMFixupKinds.h"
13 #include "llvm/ADT/Twine.h"
14 #include "llvm/MC/ELFObjectWriter.h"
15 #include "llvm/MC/MCAssembler.h"
16 #include "llvm/MC/MCExpr.h"
17 #include "llvm/MC/MCObjectFormat.h"
18 #include "llvm/MC/MCObjectWriter.h"
19 #include "llvm/MC/MCSectionELF.h"
20 #include "llvm/MC/MCSectionMachO.h"
21 #include "llvm/MC/MachObjectWriter.h"
22 #include "llvm/Support/ELF.h"
23 #include "llvm/Support/MachO.h"
24 #include "llvm/Support/ErrorHandling.h"
25 #include "llvm/Support/raw_ostream.h"
26 #include "llvm/Target/TargetRegistry.h"
27 #include "llvm/Target/TargetAsmBackend.h"
31 class ARMAsmBackend : public TargetAsmBackend {
33 ARMAsmBackend(const Target &T)
34 : TargetAsmBackend(T) {
37 bool MayNeedRelaxation(const MCInst &Inst) const;
39 void RelaxInstruction(const MCInst &Inst, MCInst &Res) const;
41 bool WriteNopData(uint64_t Count, MCObjectWriter *OW) const;
43 unsigned getPointerSize() const {
48 bool ARMAsmBackend::MayNeedRelaxation(const MCInst &Inst) const {
49 // FIXME: Thumb targets, different move constant targets..
53 void ARMAsmBackend::RelaxInstruction(const MCInst &Inst, MCInst &Res) const {
54 assert(0 && "ARMAsmBackend::RelaxInstruction() unimplemented");
58 bool ARMAsmBackend::WriteNopData(uint64_t Count, MCObjectWriter *OW) const {
59 if ((Count % 4) != 0) {
60 // Fixme: % 2 for Thumb?
65 } // end anonymous namespace
68 // FIXME: This should be in a separate file.
69 // ELF is an ELF of course...
70 class ELFARMAsmBackend : public ARMAsmBackend {
71 MCELFObjectFormat Format;
74 Triple::OSType OSType;
75 ELFARMAsmBackend(const Target &T, Triple::OSType _OSType)
76 : ARMAsmBackend(T), OSType(_OSType) {
77 HasScatteredSymbols = true;
80 virtual const MCObjectFormat &getObjectFormat() const {
84 void ApplyFixup(const MCFixup &Fixup, MCDataFragment &DF,
85 uint64_t Value) const;
87 bool isVirtualSection(const MCSection &Section) const {
88 const MCSectionELF &SE = static_cast<const MCSectionELF&>(Section);
89 return SE.getType() == MCSectionELF::SHT_NOBITS;
92 MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
93 return new ELFObjectWriter(OS, /*Is64Bit=*/false,
95 /*IsLittleEndian=*/true,
96 /*HasRelocationAddend=*/false);
100 // Fixme: can we raise this to share code between Darwin and ELF?
101 void ELFARMAsmBackend::ApplyFixup(const MCFixup &Fixup, MCDataFragment &DF,
102 uint64_t Value) const {
103 assert(0 && "ELFARMAsmBackend::ApplyFixup() unimplemented");
106 // FIXME: This should be in a separate file.
107 class DarwinARMAsmBackend : public ARMAsmBackend {
108 MCMachOObjectFormat Format;
111 DarwinARMAsmBackend(const Target &T)
113 HasScatteredSymbols = true;
116 virtual const MCObjectFormat &getObjectFormat() const {
120 void ApplyFixup(const MCFixup &Fixup, MCDataFragment &DF,
121 uint64_t Value) const;
123 bool isVirtualSection(const MCSection &Section) const {
124 const MCSectionMachO &SMO = static_cast<const MCSectionMachO&>(Section);
125 return (SMO.getType() == MCSectionMachO::S_ZEROFILL ||
126 SMO.getType() == MCSectionMachO::S_GB_ZEROFILL ||
127 SMO.getType() == MCSectionMachO::S_THREAD_LOCAL_ZEROFILL);
130 MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
131 // FIXME: Subtarget info should be derived. Force v7 for now.
132 return new MachObjectWriter(OS, /*Is64Bit=*/false, MachO::CPUTypeARM,
133 MachO::CPUSubType_ARM_V7);
136 virtual bool doesSectionRequireSymbols(const MCSection &Section) const {
141 static unsigned getFixupKindLog2Size(unsigned Kind) {
143 default: llvm_unreachable("Unknown fixup kind!");
144 case FK_Data_4: return 2;
145 case ARM::fixup_arm_pcrel_12: return 2;
146 case ARM::fixup_arm_vfp_pcrel_12: return 1;
150 static unsigned adjustFixupValue(unsigned Kind, uint64_t Value) {
153 llvm_unreachable("Unknown fixup kind!");
155 case ARM::fixup_arm_pcrel_12:
156 // ARM PC-relative values are offset by 8.
158 case ARM::fixup_arm_vfp_pcrel_12:
159 // The VFP ld/st immediate value doesn't encode the low two bits since
160 // they're always zero. Offset by 8 just as above.
161 return (Value - 8) >> 2;
165 void DarwinARMAsmBackend::ApplyFixup(const MCFixup &Fixup, MCDataFragment &DF,
166 uint64_t Value) const {
167 unsigned NumBytes = getFixupKindLog2Size(Fixup.getKind());
168 Value = adjustFixupValue(Fixup.getKind(), Value);
170 assert(Fixup.getOffset() + NumBytes <= DF.getContents().size() &&
171 "Invalid fixup offset!");
172 // For each byte of the fragment that the fixup touches, mask in the
173 // bits from the fixup value.
174 for (unsigned i = 0; i != NumBytes; ++i)
175 DF.getContents()[Fixup.getOffset() + i] |= uint8_t(Value >> (i * 8));
177 } // end anonymous namespace
179 TargetAsmBackend *llvm::createARMAsmBackend(const Target &T,
180 const std::string &TT) {
181 switch (Triple(TT).getOS()) {
183 return new DarwinARMAsmBackend(T);
184 case Triple::MinGW32:
187 assert(0 && "Windows not supported on ARM");
189 return new ELFARMAsmBackend(T, Triple(TT).getOS());