1 //===-- ARMAsmPrinter.cpp - ARM LLVM assembly writer ----------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the "Instituto Nokia de Tecnologia" and
6 // is distributed under the University of Illinois Open Source
7 // License. See LICENSE.TXT for details.
9 //===----------------------------------------------------------------------===//
11 // This file contains a printer that converts from our internal representation
12 // of machine-dependent LLVM code to GAS-format ARM assembly language.
14 //===----------------------------------------------------------------------===//
16 #define DEBUG_TYPE "asm-printer"
18 #include "ARMTargetMachine.h"
19 #include "ARMAddressingModes.h"
20 #include "ARMConstantPoolValue.h"
21 #include "ARMMachineFunctionInfo.h"
22 #include "llvm/Constants.h"
23 #include "llvm/Module.h"
24 #include "llvm/CodeGen/AsmPrinter.h"
25 #include "llvm/CodeGen/DwarfWriter.h"
26 #include "llvm/CodeGen/MachineModuleInfo.h"
27 #include "llvm/CodeGen/MachineFunctionPass.h"
28 #include "llvm/CodeGen/MachineJumpTableInfo.h"
29 #include "llvm/Target/TargetAsmInfo.h"
30 #include "llvm/Target/TargetData.h"
31 #include "llvm/Target/TargetMachine.h"
32 #include "llvm/Target/TargetOptions.h"
33 #include "llvm/ADT/Statistic.h"
34 #include "llvm/ADT/StringExtras.h"
35 #include "llvm/Support/Compiler.h"
36 #include "llvm/Support/Mangler.h"
37 #include "llvm/Support/MathExtras.h"
41 STATISTIC(EmittedInsts, "Number of machine instrs printed");
44 struct VISIBILITY_HIDDEN ARMAsmPrinter : public AsmPrinter {
45 ARMAsmPrinter(std::ostream &O, TargetMachine &TM, const TargetAsmInfo *T)
46 : AsmPrinter(O, TM, T), DW(O, this, T), AFI(NULL), InCPMode(false) {
47 Subtarget = &TM.getSubtarget<ARMSubtarget>();
52 /// Subtarget - Keep a pointer to the ARMSubtarget around so that we can
53 /// make the right decision when printing asm code for different targets.
54 const ARMSubtarget *Subtarget;
56 /// AFI - Keep a pointer to ARMFunctionInfo for the current
60 /// We name each basic block in a Function with a unique number, so
61 /// that we can consistently refer to them later. This is cleared
62 /// at the beginning of each call to runOnMachineFunction().
64 typedef std::map<const Value *, unsigned> ValueMapTy;
65 ValueMapTy NumberForBB;
67 /// Keeps the set of GlobalValues that require non-lazy-pointers for
69 std::set<std::string> GVNonLazyPtrs;
71 /// Keeps the set of external function GlobalAddresses that the asm
72 /// printer should generate stubs for.
73 std::set<std::string> FnStubs;
75 /// True if asm printer is printing a series of CONSTPOOL_ENTRY.
78 virtual const char *getPassName() const {
79 return "ARM Assembly Printer";
82 void printOperand(const MachineInstr *MI, int opNum,
83 const char *Modifier = 0);
84 void printSOImmOperand(const MachineInstr *MI, int opNum);
85 void printSOImm2PartOperand(const MachineInstr *MI, int opNum);
86 void printSORegOperand(const MachineInstr *MI, int opNum);
87 void printAddrMode2Operand(const MachineInstr *MI, int OpNo);
88 void printAddrMode2OffsetOperand(const MachineInstr *MI, int OpNo);
89 void printAddrMode3Operand(const MachineInstr *MI, int OpNo);
90 void printAddrMode3OffsetOperand(const MachineInstr *MI, int OpNo);
91 void printAddrMode4Operand(const MachineInstr *MI, int OpNo,
92 const char *Modifier = 0);
93 void printAddrMode5Operand(const MachineInstr *MI, int OpNo,
94 const char *Modifier = 0);
95 void printAddrModePCOperand(const MachineInstr *MI, int OpNo,
96 const char *Modifier = 0);
97 void printThumbAddrModeRROperand(const MachineInstr *MI, int OpNo);
98 void printThumbAddrModeRI5Operand(const MachineInstr *MI, int OpNo,
100 void printThumbAddrModeS1Operand(const MachineInstr *MI, int OpNo);
101 void printThumbAddrModeS2Operand(const MachineInstr *MI, int OpNo);
102 void printThumbAddrModeS4Operand(const MachineInstr *MI, int OpNo);
103 void printThumbAddrModeSPOperand(const MachineInstr *MI, int OpNo);
104 void printCCOperand(const MachineInstr *MI, int opNum);
105 void printPCLabel(const MachineInstr *MI, int opNum);
106 void printRegisterList(const MachineInstr *MI, int opNum);
107 void printCPInstOperand(const MachineInstr *MI, int opNum,
108 const char *Modifier);
109 void printJTBlockOperand(const MachineInstr *MI, int opNum);
111 virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
112 unsigned AsmVariant, const char *ExtraCode);
114 bool printInstruction(const MachineInstr *MI); // autogenerated.
115 void printMachineInstruction(const MachineInstr *MI);
116 bool runOnMachineFunction(MachineFunction &F);
117 bool doInitialization(Module &M);
118 bool doFinalization(Module &M);
120 virtual void EmitMachineConstantPoolValue(MachineConstantPoolValue *MCPV) {
121 printDataDirective(MCPV->getType());
123 ARMConstantPoolValue *ACPV = (ARMConstantPoolValue*)MCPV;
124 GlobalValue *GV = ACPV->getGV();
125 std::string Name = GV ? Mang->getValueName(GV) : TAI->getGlobalPrefix();
127 Name += ACPV->getSymbol();
128 if (ACPV->isNonLazyPointer()) {
129 GVNonLazyPtrs.insert(Name);
130 O << TAI->getPrivateGlobalPrefix() << Name << "$non_lazy_ptr";
131 } else if (ACPV->isStub()) {
132 FnStubs.insert(Name);
133 O << TAI->getPrivateGlobalPrefix() << Name << "$stub";
136 if (ACPV->hasModifier()) O << "(" << ACPV->getModifier() << ")";
137 if (ACPV->getPCAdjustment() != 0) {
138 O << "-(" << TAI->getPrivateGlobalPrefix() << "PC"
139 << utostr(ACPV->getLabelId())
140 << "+" << (unsigned)ACPV->getPCAdjustment();
141 if (ACPV->mustAddCurrentAddress())
147 // If the constant pool value is a extern weak symbol, remember to emit
148 // the weak reference.
149 if (GV && GV->hasExternalWeakLinkage())
150 ExtWeakSymbols.insert(GV);
153 void getAnalysisUsage(AnalysisUsage &AU) const {
154 AU.setPreservesAll();
155 AU.addRequired<MachineModuleInfo>();
158 } // end of anonymous namespace
160 #include "ARMGenAsmWriter.inc"
162 /// createARMCodePrinterPass - Returns a pass that prints the ARM
163 /// assembly code for a MachineFunction to the given output stream,
164 /// using the given target machine description. This should work
165 /// regardless of whether the function is in SSA form.
167 FunctionPass *llvm::createARMCodePrinterPass(std::ostream &o,
168 ARMTargetMachine &tm) {
169 return new ARMAsmPrinter(o, tm, tm.getTargetAsmInfo());
172 /// runOnMachineFunction - This uses the printInstruction()
173 /// method to print assembly for each instruction.
175 bool ARMAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
176 AFI = MF.getInfo<ARMFunctionInfo>();
178 DW.SetModuleInfo(&getAnalysis<MachineModuleInfo>());
180 SetupMachineFunction(MF);
183 // NOTE: we don't print out constant pools here, they are handled as
187 // Print out labels for the function.
188 const Function *F = MF.getFunction();
189 switch (F->getLinkage()) {
190 default: assert(0 && "Unknown linkage type!");
191 case Function::InternalLinkage:
192 SwitchToTextSection("\t.text", F);
194 case Function::ExternalLinkage:
195 SwitchToTextSection("\t.text", F);
196 O << "\t.globl\t" << CurrentFnName << "\n";
198 case Function::WeakLinkage:
199 case Function::LinkOnceLinkage:
200 if (Subtarget->isTargetDarwin()) {
202 ".section __TEXT,__textcoal_nt,coalesced,pure_instructions", F);
203 O << "\t.globl\t" << CurrentFnName << "\n";
204 O << "\t.weak_definition\t" << CurrentFnName << "\n";
206 O << TAI->getWeakRefDirective() << CurrentFnName << "\n";
211 const char *VisibilityDirective = NULL;
212 if (F->hasHiddenVisibility())
213 VisibilityDirective = TAI->getHiddenDirective();
214 else if (F->hasProtectedVisibility())
215 VisibilityDirective = TAI->getProtectedDirective();
217 if (VisibilityDirective)
218 O << VisibilityDirective << CurrentFnName << "\n";
220 if (AFI->isThumbFunction()) {
221 EmitAlignment(AFI->getAlign(), F);
222 O << "\t.code\t16\n";
223 O << "\t.thumb_func";
224 if (Subtarget->isTargetDarwin())
225 O << "\t" << CurrentFnName;
231 O << CurrentFnName << ":\n";
232 // Emit pre-function debug information.
233 DW.BeginFunction(&MF);
235 // Print out code for the function.
236 for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
238 // Print a label for the basic block.
239 if (I != MF.begin()) {
240 printBasicBlockLabel(I, true);
243 for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
245 // Print the assembly for the instruction.
246 printMachineInstruction(II);
250 if (TAI->hasDotTypeDotSizeDirective())
251 O << "\t.size " << CurrentFnName << ", .-" << CurrentFnName << "\n";
253 // Emit post-function debug information.
259 void ARMAsmPrinter::printOperand(const MachineInstr *MI, int opNum,
260 const char *Modifier) {
261 const MachineOperand &MO = MI->getOperand(opNum);
262 switch (MO.getType()) {
263 case MachineOperand::MO_Register:
264 if (MRegisterInfo::isPhysicalRegister(MO.getReg()))
265 O << TM.getRegisterInfo()->get(MO.getReg()).Name;
267 assert(0 && "not implemented");
269 case MachineOperand::MO_Immediate: {
270 if (!Modifier || strcmp(Modifier, "no_hash") != 0)
273 O << (int)MO.getImmedValue();
276 case MachineOperand::MO_MachineBasicBlock:
277 printBasicBlockLabel(MO.getMachineBasicBlock());
279 case MachineOperand::MO_GlobalAddress: {
280 bool isCallOp = Modifier && !strcmp(Modifier, "call");
281 GlobalValue *GV = MO.getGlobal();
282 std::string Name = Mang->getValueName(GV);
283 bool isExt = (GV->isDeclaration() || GV->hasWeakLinkage() ||
284 GV->hasLinkOnceLinkage());
285 if (isExt && isCallOp && Subtarget->isTargetDarwin() &&
286 TM.getRelocationModel() != Reloc::Static) {
287 O << TAI->getPrivateGlobalPrefix() << Name << "$stub";
288 FnStubs.insert(Name);
292 if (MO.getOffset() > 0)
293 O << '+' << MO.getOffset();
294 else if (MO.getOffset() < 0)
297 if (isCallOp && Subtarget->isTargetELF() &&
298 TM.getRelocationModel() == Reloc::PIC_)
300 if (GV->hasExternalWeakLinkage())
301 ExtWeakSymbols.insert(GV);
304 case MachineOperand::MO_ExternalSymbol: {
305 bool isCallOp = Modifier && !strcmp(Modifier, "call");
306 std::string Name(TAI->getGlobalPrefix());
307 Name += MO.getSymbolName();
308 if (isCallOp && Subtarget->isTargetDarwin() &&
309 TM.getRelocationModel() != Reloc::Static) {
310 O << TAI->getPrivateGlobalPrefix() << Name << "$stub";
311 FnStubs.insert(Name);
314 if (isCallOp && Subtarget->isTargetELF() &&
315 TM.getRelocationModel() == Reloc::PIC_)
319 case MachineOperand::MO_ConstantPoolIndex:
320 O << TAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber()
321 << '_' << MO.getConstantPoolIndex();
323 case MachineOperand::MO_JumpTableIndex:
324 O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
325 << '_' << MO.getJumpTableIndex();
328 O << "<unknown operand type>"; abort (); break;
332 static void printSOImm(std::ostream &O, int64_t V, const TargetAsmInfo *TAI) {
333 assert(V < (1 << 12) && "Not a valid so_imm value!");
334 unsigned Imm = ARM_AM::getSOImmValImm(V);
335 unsigned Rot = ARM_AM::getSOImmValRot(V);
337 // Print low-level immediate formation info, per
338 // A5.1.3: "Data-processing operands - Immediate".
340 O << "#" << Imm << ", " << Rot;
341 // Pretty printed version.
342 O << ' ' << TAI->getCommentString() << ' ' << (int)ARM_AM::rotr32(Imm, Rot);
348 /// printSOImmOperand - SOImm is 4-bit rotate amount in bits 8-11 with 8-bit
349 /// immediate in bits 0-7.
350 void ARMAsmPrinter::printSOImmOperand(const MachineInstr *MI, int OpNum) {
351 const MachineOperand &MO = MI->getOperand(OpNum);
352 assert(MO.isImmediate() && "Not a valid so_imm value!");
353 printSOImm(O, MO.getImmedValue(), TAI);
356 /// printSOImm2PartOperand - SOImm is broken into two pieces using a mov
357 /// followed by a or to materialize.
358 void ARMAsmPrinter::printSOImm2PartOperand(const MachineInstr *MI, int OpNum) {
359 const MachineOperand &MO = MI->getOperand(OpNum);
360 assert(MO.isImmediate() && "Not a valid so_imm value!");
361 unsigned V1 = ARM_AM::getSOImmTwoPartFirst(MO.getImmedValue());
362 unsigned V2 = ARM_AM::getSOImmTwoPartSecond(MO.getImmedValue());
363 printSOImm(O, ARM_AM::getSOImmVal(V1), TAI);
369 printSOImm(O, ARM_AM::getSOImmVal(V2), TAI);
372 // so_reg is a 4-operand unit corresponding to register forms of the A5.1
373 // "Addressing Mode 1 - Data-processing operands" forms. This includes:
375 // REG REG 0,SH_OPC - e.g. R5, ROR R3
376 // REG 0 IMM,SH_OPC - e.g. R5, LSL #3
377 void ARMAsmPrinter::printSORegOperand(const MachineInstr *MI, int Op) {
378 const MachineOperand &MO1 = MI->getOperand(Op);
379 const MachineOperand &MO2 = MI->getOperand(Op+1);
380 const MachineOperand &MO3 = MI->getOperand(Op+2);
382 assert(MRegisterInfo::isPhysicalRegister(MO1.getReg()));
383 O << TM.getRegisterInfo()->get(MO1.getReg()).Name;
385 // Print the shift opc.
387 << ARM_AM::getShiftOpcStr(ARM_AM::getSORegShOp(MO3.getImmedValue()))
391 assert(MRegisterInfo::isPhysicalRegister(MO2.getReg()));
392 O << TM.getRegisterInfo()->get(MO2.getReg()).Name;
393 assert(ARM_AM::getSORegOffset(MO3.getImm()) == 0);
395 O << "#" << ARM_AM::getSORegOffset(MO3.getImm());
399 void ARMAsmPrinter::printAddrMode2Operand(const MachineInstr *MI, int Op) {
400 const MachineOperand &MO1 = MI->getOperand(Op);
401 const MachineOperand &MO2 = MI->getOperand(Op+1);
402 const MachineOperand &MO3 = MI->getOperand(Op+2);
404 if (!MO1.isRegister()) { // FIXME: This is for CP entries, but isn't right.
405 printOperand(MI, Op);
409 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).Name;
412 if (ARM_AM::getAM2Offset(MO3.getImm())) // Don't print +0.
414 << (char)ARM_AM::getAM2Op(MO3.getImm())
415 << ARM_AM::getAM2Offset(MO3.getImm());
421 << (char)ARM_AM::getAM2Op(MO3.getImm())
422 << TM.getRegisterInfo()->get(MO2.getReg()).Name;
424 if (unsigned ShImm = ARM_AM::getAM2Offset(MO3.getImm()))
426 << ARM_AM::getShiftOpcStr(ARM_AM::getAM2ShiftOpc(MO3.getImmedValue()))
431 void ARMAsmPrinter::printAddrMode2OffsetOperand(const MachineInstr *MI, int Op){
432 const MachineOperand &MO1 = MI->getOperand(Op);
433 const MachineOperand &MO2 = MI->getOperand(Op+1);
436 unsigned ImmOffs = ARM_AM::getAM2Offset(MO2.getImm());
437 assert(ImmOffs && "Malformed indexed load / store!");
439 << (char)ARM_AM::getAM2Op(MO2.getImm())
444 O << (char)ARM_AM::getAM2Op(MO2.getImm())
445 << TM.getRegisterInfo()->get(MO1.getReg()).Name;
447 if (unsigned ShImm = ARM_AM::getAM2Offset(MO2.getImm()))
449 << ARM_AM::getShiftOpcStr(ARM_AM::getAM2ShiftOpc(MO2.getImmedValue()))
453 void ARMAsmPrinter::printAddrMode3Operand(const MachineInstr *MI, int Op) {
454 const MachineOperand &MO1 = MI->getOperand(Op);
455 const MachineOperand &MO2 = MI->getOperand(Op+1);
456 const MachineOperand &MO3 = MI->getOperand(Op+2);
458 assert(MRegisterInfo::isPhysicalRegister(MO1.getReg()));
459 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).Name;
463 << (char)ARM_AM::getAM3Op(MO3.getImm())
464 << TM.getRegisterInfo()->get(MO2.getReg()).Name
469 if (unsigned ImmOffs = ARM_AM::getAM3Offset(MO3.getImm()))
471 << (char)ARM_AM::getAM3Op(MO3.getImm())
476 void ARMAsmPrinter::printAddrMode3OffsetOperand(const MachineInstr *MI, int Op){
477 const MachineOperand &MO1 = MI->getOperand(Op);
478 const MachineOperand &MO2 = MI->getOperand(Op+1);
481 O << (char)ARM_AM::getAM3Op(MO2.getImm())
482 << TM.getRegisterInfo()->get(MO1.getReg()).Name;
486 unsigned ImmOffs = ARM_AM::getAM3Offset(MO2.getImm());
487 assert(ImmOffs && "Malformed indexed load / store!");
489 << (char)ARM_AM::getAM3Op(MO2.getImm())
493 void ARMAsmPrinter::printAddrMode4Operand(const MachineInstr *MI, int Op,
494 const char *Modifier) {
495 const MachineOperand &MO1 = MI->getOperand(Op);
496 const MachineOperand &MO2 = MI->getOperand(Op+1);
497 ARM_AM::AMSubMode Mode = ARM_AM::getAM4SubMode(MO2.getImm());
498 if (Modifier && strcmp(Modifier, "submode") == 0) {
499 if (MO1.getReg() == ARM::SP) {
500 bool isLDM = (MI->getOpcode() == ARM::LDM ||
501 MI->getOpcode() == ARM::LDM_RET);
502 O << ARM_AM::getAMSubModeAltStr(Mode, isLDM);
504 O << ARM_AM::getAMSubModeStr(Mode);
506 printOperand(MI, Op);
507 if (ARM_AM::getAM4WBFlag(MO2.getImm()))
512 void ARMAsmPrinter::printAddrMode5Operand(const MachineInstr *MI, int Op,
513 const char *Modifier) {
514 const MachineOperand &MO1 = MI->getOperand(Op);
515 const MachineOperand &MO2 = MI->getOperand(Op+1);
517 if (!MO1.isRegister()) { // FIXME: This is for CP entries, but isn't right.
518 printOperand(MI, Op);
522 assert(MRegisterInfo::isPhysicalRegister(MO1.getReg()));
524 if (Modifier && strcmp(Modifier, "submode") == 0) {
525 ARM_AM::AMSubMode Mode = ARM_AM::getAM5SubMode(MO2.getImm());
526 if (MO1.getReg() == ARM::SP) {
527 bool isFLDM = (MI->getOpcode() == ARM::FLDMD ||
528 MI->getOpcode() == ARM::FLDMS);
529 O << ARM_AM::getAMSubModeAltStr(Mode, isFLDM);
531 O << ARM_AM::getAMSubModeStr(Mode);
533 } else if (Modifier && strcmp(Modifier, "base") == 0) {
534 // Used for FSTM{D|S} and LSTM{D|S} operations.
535 O << TM.getRegisterInfo()->get(MO1.getReg()).Name;
536 if (ARM_AM::getAM5WBFlag(MO2.getImm()))
541 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).Name;
543 if (unsigned ImmOffs = ARM_AM::getAM5Offset(MO2.getImm())) {
545 << (char)ARM_AM::getAM5Op(MO2.getImm())
551 void ARMAsmPrinter::printAddrModePCOperand(const MachineInstr *MI, int Op,
552 const char *Modifier) {
553 if (Modifier && strcmp(Modifier, "label") == 0) {
554 printPCLabel(MI, Op+1);
558 const MachineOperand &MO1 = MI->getOperand(Op);
559 assert(MRegisterInfo::isPhysicalRegister(MO1.getReg()));
560 O << "[pc, +" << TM.getRegisterInfo()->get(MO1.getReg()).Name << "]";
564 ARMAsmPrinter::printThumbAddrModeRROperand(const MachineInstr *MI, int Op) {
565 const MachineOperand &MO1 = MI->getOperand(Op);
566 const MachineOperand &MO2 = MI->getOperand(Op+1);
567 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).Name;
568 O << ", " << TM.getRegisterInfo()->get(MO2.getReg()).Name << "]";
572 ARMAsmPrinter::printThumbAddrModeRI5Operand(const MachineInstr *MI, int Op,
574 const MachineOperand &MO1 = MI->getOperand(Op);
575 const MachineOperand &MO2 = MI->getOperand(Op+1);
576 const MachineOperand &MO3 = MI->getOperand(Op+2);
578 if (!MO1.isRegister()) { // FIXME: This is for CP entries, but isn't right.
579 printOperand(MI, Op);
583 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).Name;
585 O << ", " << TM.getRegisterInfo()->get(MO3.getReg()).Name;
586 else if (unsigned ImmOffs = MO2.getImm()) {
587 O << ", #" << ImmOffs;
595 ARMAsmPrinter::printThumbAddrModeS1Operand(const MachineInstr *MI, int Op) {
596 printThumbAddrModeRI5Operand(MI, Op, 1);
599 ARMAsmPrinter::printThumbAddrModeS2Operand(const MachineInstr *MI, int Op) {
600 printThumbAddrModeRI5Operand(MI, Op, 2);
603 ARMAsmPrinter::printThumbAddrModeS4Operand(const MachineInstr *MI, int Op) {
604 printThumbAddrModeRI5Operand(MI, Op, 4);
607 void ARMAsmPrinter::printThumbAddrModeSPOperand(const MachineInstr *MI,int Op) {
608 const MachineOperand &MO1 = MI->getOperand(Op);
609 const MachineOperand &MO2 = MI->getOperand(Op+1);
610 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).Name;
611 if (unsigned ImmOffs = MO2.getImm())
612 O << ", #" << ImmOffs << " * 4";
616 void ARMAsmPrinter::printCCOperand(const MachineInstr *MI, int opNum) {
617 int CC = (int)MI->getOperand(opNum).getImmedValue();
618 O << ARMCondCodeToString((ARMCC::CondCodes)CC);
621 void ARMAsmPrinter::printPCLabel(const MachineInstr *MI, int opNum) {
622 int Id = (int)MI->getOperand(opNum).getImmedValue();
623 O << TAI->getPrivateGlobalPrefix() << "PC" << Id;
626 void ARMAsmPrinter::printRegisterList(const MachineInstr *MI, int opNum) {
628 for (unsigned i = opNum, e = MI->getNumOperands(); i != e; ++i) {
630 if (i != e-1) O << ", ";
635 void ARMAsmPrinter::printCPInstOperand(const MachineInstr *MI, int OpNo,
636 const char *Modifier) {
637 assert(Modifier && "This operand only works with a modifier!");
638 // There are two aspects to a CONSTANTPOOL_ENTRY operand, the label and the
640 if (!strcmp(Modifier, "label")) {
641 unsigned ID = MI->getOperand(OpNo).getImm();
642 O << TAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber()
643 << '_' << ID << ":\n";
645 assert(!strcmp(Modifier, "cpentry") && "Unknown modifier for CPE");
646 unsigned CPI = MI->getOperand(OpNo).getConstantPoolIndex();
648 const MachineConstantPoolEntry &MCPE = // Chasing pointers is fun?
649 MI->getParent()->getParent()->getConstantPool()->getConstants()[CPI];
651 if (MCPE.isMachineConstantPoolEntry())
652 EmitMachineConstantPoolValue(MCPE.Val.MachineCPVal);
654 EmitGlobalConstant(MCPE.Val.ConstVal);
655 // remember to emit the weak reference
656 if (const GlobalValue *GV = dyn_cast<GlobalValue>(MCPE.Val.ConstVal))
657 if (GV->hasExternalWeakLinkage())
658 ExtWeakSymbols.insert(GV);
663 void ARMAsmPrinter::printJTBlockOperand(const MachineInstr *MI, int OpNo) {
664 const MachineOperand &MO1 = MI->getOperand(OpNo);
665 const MachineOperand &MO2 = MI->getOperand(OpNo+1); // Unique Id
666 unsigned JTI = MO1.getJumpTableIndex();
667 O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
668 << '_' << JTI << '_' << MO2.getImmedValue() << ":\n";
670 const char *JTEntryDirective = TAI->getJumpTableDirective();
671 if (!JTEntryDirective)
672 JTEntryDirective = TAI->getData32bitsDirective();
674 const MachineFunction *MF = MI->getParent()->getParent();
675 MachineJumpTableInfo *MJTI = MF->getJumpTableInfo();
676 const std::vector<MachineJumpTableEntry> &JT = MJTI->getJumpTables();
677 const std::vector<MachineBasicBlock*> &JTBBs = JT[JTI].MBBs;
678 bool UseSet= TAI->getSetDirective() && TM.getRelocationModel() == Reloc::PIC_;
679 std::set<MachineBasicBlock*> JTSets;
680 for (unsigned i = 0, e = JTBBs.size(); i != e; ++i) {
681 MachineBasicBlock *MBB = JTBBs[i];
682 if (UseSet && JTSets.insert(MBB).second)
683 printSetLabel(JTI, MO2.getImmedValue(), MBB);
685 O << JTEntryDirective << ' ';
687 O << TAI->getPrivateGlobalPrefix() << getFunctionNumber()
688 << '_' << JTI << '_' << MO2.getImmedValue()
689 << "_set_" << MBB->getNumber();
690 else if (TM.getRelocationModel() == Reloc::PIC_) {
691 printBasicBlockLabel(MBB, false, false);
692 // If the arch uses custom Jump Table directives, don't calc relative to JT
693 if (!TAI->getJumpTableDirective())
694 O << '-' << TAI->getPrivateGlobalPrefix() << "JTI"
695 << getFunctionNumber() << '_' << JTI << '_' << MO2.getImmedValue();
697 printBasicBlockLabel(MBB, false, false);
704 bool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
705 unsigned AsmVariant, const char *ExtraCode){
706 // Does this asm operand have a single letter operand modifier?
707 if (ExtraCode && ExtraCode[0]) {
708 if (ExtraCode[1] != 0) return true; // Unknown modifier.
710 switch (ExtraCode[0]) {
711 default: return true; // Unknown modifier.
712 case 'c': // Don't print "$" before a global var name or constant.
713 case 'P': // Print a VFP double precision register.
714 printOperand(MI, OpNo);
717 if (TM.getTargetData()->isLittleEndian())
721 if (TM.getTargetData()->isBigEndian())
724 case 'H': // Write second word of DI / DF reference.
725 // Verify that this operand has two consecutive registers.
726 if (!MI->getOperand(OpNo).isRegister() ||
727 OpNo+1 == MI->getNumOperands() ||
728 !MI->getOperand(OpNo+1).isRegister())
730 ++OpNo; // Return the high-part.
734 printOperand(MI, OpNo);
738 void ARMAsmPrinter::printMachineInstruction(const MachineInstr *MI) {
741 int Opc = MI->getOpcode();
743 case ARM::CONSTPOOL_ENTRY:
744 if (!InCPMode && AFI->isThumbFunction()) {
750 if (InCPMode && AFI->isThumbFunction())
763 // Call the autogenerated instruction printer routines.
764 printInstruction(MI);
767 bool ARMAsmPrinter::doInitialization(Module &M) {
768 // Emit initial debug information.
771 return AsmPrinter::doInitialization(M);
774 bool ARMAsmPrinter::doFinalization(Module &M) {
775 const TargetData *TD = TM.getTargetData();
777 for (Module::const_global_iterator I = M.global_begin(), E = M.global_end();
779 if (!I->hasInitializer()) // External global require no code
782 if (EmitSpecialLLVMGlobal(I)) {
783 if (Subtarget->isTargetDarwin() &&
784 TM.getRelocationModel() == Reloc::Static) {
785 if (I->getName() == "llvm.global_ctors")
786 O << ".reference .constructors_used\n";
787 else if (I->getName() == "llvm.global_dtors")
788 O << ".reference .destructors_used\n";
793 std::string name = Mang->getValueName(I);
794 Constant *C = I->getInitializer();
795 const Type *Type = C->getType();
796 unsigned Size = TD->getTypeSize(Type);
797 unsigned Align = TD->getPreferredAlignmentLog(I);
799 const char *VisibilityDirective = NULL;
800 if (I->hasHiddenVisibility())
801 VisibilityDirective = TAI->getHiddenDirective();
802 else if (I->hasProtectedVisibility())
803 VisibilityDirective = TAI->getProtectedDirective();
805 if (VisibilityDirective)
806 O << VisibilityDirective << name << "\n";
808 if (Subtarget->isTargetELF())
809 O << "\t.type " << name << ",%object\n";
811 if (C->isNullValue()) {
812 if (I->hasExternalLinkage()) {
813 if (const char *Directive = TAI->getZeroFillDirective()) {
814 O << "\t.globl\t" << name << "\n";
815 O << Directive << "__DATA__, __common, " << name << ", "
816 << Size << ", " << Align << "\n";
821 if (!I->hasSection() &&
822 (I->hasInternalLinkage() || I->hasWeakLinkage() ||
823 I->hasLinkOnceLinkage())) {
824 if (Size == 0) Size = 1; // .comm Foo, 0 is undefined, avoid it.
825 if (!NoZerosInBSS && TAI->getBSSSection())
826 SwitchToDataSection(TAI->getBSSSection(), I);
828 SwitchToDataSection(TAI->getDataSection(), I);
829 if (TAI->getLCOMMDirective() != NULL) {
830 if (I->hasInternalLinkage()) {
831 O << TAI->getLCOMMDirective() << name << "," << Size;
832 if (Subtarget->isTargetDarwin())
835 O << TAI->getCOMMDirective() << name << "," << Size;
837 if (I->hasInternalLinkage())
838 O << "\t.local\t" << name << "\n";
839 O << TAI->getCOMMDirective() << name << "," << Size;
840 if (TAI->getCOMMDirectiveTakesAlignment())
841 O << "," << (TAI->getAlignmentIsInBytes() ? (1 << Align) : Align);
843 O << "\t\t" << TAI->getCommentString() << " " << I->getName() << "\n";
848 switch (I->getLinkage()) {
849 case GlobalValue::LinkOnceLinkage:
850 case GlobalValue::WeakLinkage:
851 if (Subtarget->isTargetDarwin()) {
852 O << "\t.globl " << name << "\n"
853 << "\t.weak_definition " << name << "\n";
854 SwitchToDataSection("\t.section __DATA,__const_coal,coalesced", I);
856 std::string SectionName("\t.section\t.llvm.linkonce.d." +
858 ",\"aw\",%progbits");
859 SwitchToDataSection(SectionName.c_str(), I);
860 O << "\t.weak " << name << "\n";
863 case GlobalValue::AppendingLinkage:
864 // FIXME: appending linkage variables should go into a section of
865 // their name or something. For now, just emit them as external.
866 case GlobalValue::ExternalLinkage:
867 O << "\t.globl " << name << "\n";
869 case GlobalValue::InternalLinkage: {
870 if (I->isConstant()) {
871 const ConstantArray *CVA = dyn_cast<ConstantArray>(C);
872 if (TAI->getCStringSection() && CVA && CVA->isCString()) {
873 SwitchToDataSection(TAI->getCStringSection(), I);
877 // FIXME: special handling for ".ctors" & ".dtors" sections
878 if (I->hasSection() &&
879 (I->getSection() == ".ctors" ||
880 I->getSection() == ".dtors")) {
881 assert(!Subtarget->isTargetDarwin());
882 std::string SectionName = ".section " + I->getSection();
883 SectionName += ",\"aw\",%progbits";
884 SwitchToDataSection(SectionName.c_str());
886 if (C->isNullValue() && !NoZerosInBSS && TAI->getBSSSection())
887 SwitchToDataSection(I->isThreadLocal() ? TAI->getTLSBSSSection() :
888 TAI->getBSSSection(), I);
889 else if (!I->isConstant())
890 SwitchToDataSection(I->isThreadLocal() ? TAI->getTLSDataSection() :
891 TAI->getDataSection(), I);
892 else if (I->isThreadLocal())
893 SwitchToDataSection(TAI->getTLSDataSection());
896 bool HasReloc = C->ContainsRelocations();
898 Subtarget->isTargetDarwin() &&
899 TM.getRelocationModel() != Reloc::Static)
900 SwitchToDataSection("\t.const_data\n");
901 else if (!HasReloc && Size == 4 &&
902 TAI->getFourByteConstantSection())
903 SwitchToDataSection(TAI->getFourByteConstantSection(), I);
904 else if (!HasReloc && Size == 8 &&
905 TAI->getEightByteConstantSection())
906 SwitchToDataSection(TAI->getEightByteConstantSection(), I);
907 else if (!HasReloc && Size == 16 &&
908 TAI->getSixteenByteConstantSection())
909 SwitchToDataSection(TAI->getSixteenByteConstantSection(), I);
910 else if (TAI->getReadOnlySection())
911 SwitchToDataSection(TAI->getReadOnlySection(), I);
913 SwitchToDataSection(TAI->getDataSection(), I);
920 assert(0 && "Unknown linkage type!");
924 EmitAlignment(Align, I);
925 O << name << ":\t\t\t\t" << TAI->getCommentString() << " " << I->getName()
927 if (TAI->hasDotTypeDotSizeDirective())
928 O << "\t.size " << name << ", " << Size << "\n";
929 // If the initializer is a extern weak symbol, remember to emit the weak
931 if (const GlobalValue *GV = dyn_cast<GlobalValue>(C))
932 if (GV->hasExternalWeakLinkage())
933 ExtWeakSymbols.insert(GV);
935 EmitGlobalConstant(C);
939 if (Subtarget->isTargetDarwin()) {
940 SwitchToDataSection("");
942 // Output stubs for dynamically-linked functions
944 for (std::set<std::string>::iterator i = FnStubs.begin(), e = FnStubs.end();
946 if (TM.getRelocationModel() == Reloc::PIC_)
947 SwitchToTextSection(".section __TEXT,__picsymbolstub4,symbol_stubs,"
950 SwitchToTextSection(".section __TEXT,__symbol_stub4,symbol_stubs,"
954 O << "\t.code\t32\n";
956 O << "L" << *i << "$stub:\n";
957 O << "\t.indirect_symbol " << *i << "\n";
958 O << "\tldr ip, L" << *i << "$slp\n";
959 if (TM.getRelocationModel() == Reloc::PIC_) {
960 O << "L" << *i << "$scv:\n";
961 O << "\tadd ip, pc, ip\n";
963 O << "\tldr pc, [ip, #0]\n";
964 O << "L" << *i << "$slp:\n";
965 if (TM.getRelocationModel() == Reloc::PIC_)
966 O << "\t.long\tL" << *i << "$lazy_ptr-(L" << *i << "$scv+8)\n";
968 O << "\t.long\tL" << *i << "$lazy_ptr\n";
969 SwitchToDataSection(".lazy_symbol_pointer", 0);
970 O << "L" << *i << "$lazy_ptr:\n";
971 O << "\t.indirect_symbol " << *i << "\n";
972 O << "\t.long\tdyld_stub_binding_helper\n";
976 // Output non-lazy-pointers for external and common global variables.
977 if (GVNonLazyPtrs.begin() != GVNonLazyPtrs.end())
978 SwitchToDataSection(".non_lazy_symbol_pointer", 0);
979 for (std::set<std::string>::iterator i = GVNonLazyPtrs.begin(),
980 e = GVNonLazyPtrs.end(); i != e; ++i) {
981 O << "L" << *i << "$non_lazy_ptr:\n";
982 O << "\t.indirect_symbol " << *i << "\n";
986 // Emit initial debug information.
989 // Funny Darwin hack: This flag tells the linker that no global symbols
990 // contain code that falls through to other global symbols (e.g. the obvious
991 // implementation of multiple entry points). If this doesn't occur, the
992 // linker can safely perform dead code stripping. Since LLVM never
993 // generates code that does this, it is always safe to set.
994 O << "\t.subsections_via_symbols\n";
996 // Emit final debug information for ELF.
1000 AsmPrinter::doFinalization(M);
1001 return false; // success