1 //===-------- ARMBuildAttrs.h - ARM Build Attributes ------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains enumerations and support routines for ARM build attributes
11 // as defined in ARM ABI addenda document (ABI release 2.08).
13 //===----------------------------------------------------------------------===//
15 #ifndef __TARGET_ARMBUILDATTRS_H__
16 #define __TARGET_ARMBUILDATTRS_H__
18 namespace ARMBuildAttrs {
20 // This is for the .cpu asm attr. It translates into one or more
21 // AttrType (below) entries in the .ARM.attributes section in the ELF.
26 // Rest correspond to ELF/.ARM.attributes
38 Advanced_SIMD_arch = 12,
47 ABI_FP_exceptions = 21,
48 ABI_FP_user_exceptions = 22,
49 ABI_FP_number_model = 23,
50 ABI_align8_needed = 24,
51 ABI_align8_preserved = 25,
56 ABI_optimization_goals = 30,
57 ABI_FP_optimization_goals = 31,
59 CPU_unaligned_access = 34,
60 VFP_HP_extension = 36,
61 ABI_FP_16bit_format = 38,
62 MPextension_use = 42, // was 70, 2.08 ABI
65 also_compatible_with = 65,
68 Virtualization_use = 68,
69 MPextension_use_old = 70
72 // Magic numbers for .ARM.attributes
77 // Legal Values for CPU_arch, (=6), uleb128
81 v4T = 2, // e.g. ARM7TDMI
82 v5T = 3, // e.g. ARM9TDMI
83 v5TE = 4, // e.g. ARM946E_S
84 v5TEJ = 5, // e.g. ARM926EJ_S
85 v6 = 6, // e.g. ARM1136J_S
86 v6KZ = 7, // e.g. ARM1176JZ_S
87 v6T2 = 8, // e.g. ARM1156T2F_S
88 v6K = 9, // e.g. ARM1136J_S
89 v7 = 10, // e.g. Cortex A8, Cortex M3
90 v6_M = 11, // e.g. Cortex M1
91 v6S_M = 12, // v6_M with the System extensions
92 v7E_M = 13 // v7_M with DSP extensions
95 enum CPUArchProfile { // (=7), uleb128
96 Not_Applicable = 0, // pre v7, or cross-profile code
97 ApplicationProfile = (0x41), // 'A' (e.g. for Cortex A8)
98 RealTimeProfile = (0x52), // 'R' (e.g. for Cortex R4)
99 MicroControllerProfile = (0x4D), // 'M' (e.g. for Cortex M3)
100 SystemProfile = (0x53) // 'S' Application or real-time profile
103 // The following have a lot of common use cases
105 //ARMISAUse (=8), uleb128 and THUMBISAUse (=9), uleb128
109 // FP_arch (=10), uleb128 (formerly Tag_VFP_arch = 10)
110 AllowFPv2 = 2, // v2 FP ISA permitted (implies use of the v1 FP ISA)
111 AllowFPv3A = 3, // v3 FP ISA permitted (implies use of the v2 FP ISA)
112 AllowFPv3B = 4, // v3 FP ISA permitted, but only D0-D15, S0-S31
113 AllowFPv4A = 5, // v4 FP ISA permitted (implies use of v3 FP ISA)
114 AllowFPv4B = 6, // v4 FP ISA was permitted, but only D0-D15, S0-S31
116 // Tag_WMMX_arch, (=11), uleb128
117 AllowThumb32 = 2, // 32-bit Thumb (implies 16-bit instructions)
119 // Tag_WMMX_arch, (=11), uleb128
120 AllowWMMXv1 = 2, // The user permitted this entity to use WMMX v2
122 // Tag_ABI_FP_denormal, (=20), uleb128
123 PreserveFPSign = 2, // sign when flushed-to-zero is preserved
125 // Tag_ABI_FP_number_model, (=23), uleb128
126 AllowRTABI = 2, // numbers, infinities, and one quiet NaN (see [RTABI])
127 AllowIEE754 = 3 // this code to use all the IEEE 754-defined FP encodings
131 #endif // __TARGET_ARMBUILDATTRS_H__