1 //===-- ARMBuildAttrs.h - ARM Build Attributes ------------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains enumerations and support routines for ARM build attributes
11 // as defined in ARM ABI addenda document (ABI release 2.08).
13 //===----------------------------------------------------------------------===//
15 #ifndef __TARGET_ARMBUILDATTRS_H__
16 #define __TARGET_ARMBUILDATTRS_H__
19 namespace ARMBuildAttrs {
22 // This is for the .cpu asm attr. It translates into one or more
23 // AttrType (below) entries in the .ARM.attributes section in the ELF.
28 // Rest correspond to ELF/.ARM.attributes
40 Advanced_SIMD_arch = 12,
49 ABI_FP_exceptions = 21,
50 ABI_FP_user_exceptions = 22,
51 ABI_FP_number_model = 23,
52 ABI_align8_needed = 24,
53 ABI_align8_preserved = 25,
58 ABI_optimization_goals = 30,
59 ABI_FP_optimization_goals = 31,
61 CPU_unaligned_access = 34,
63 ABI_FP_16bit_format = 38,
64 MPextension_use = 42, // was 70, 2.08 ABI
67 also_compatible_with = 65,
70 Virtualization_use = 68,
71 MPextension_use_old = 70
74 // Magic numbers for .ARM.attributes
79 // Legal Values for CPU_arch, (=6), uleb128
83 v4T = 2, // e.g. ARM7TDMI
84 v5T = 3, // e.g. ARM9TDMI
85 v5TE = 4, // e.g. ARM946E_S
86 v5TEJ = 5, // e.g. ARM926EJ_S
87 v6 = 6, // e.g. ARM1136J_S
88 v6KZ = 7, // e.g. ARM1176JZ_S
89 v6T2 = 8, // e.g. ARM1156T2F_S
90 v6K = 9, // e.g. ARM1136J_S
91 v7 = 10, // e.g. Cortex A8, Cortex M3
92 v6_M = 11, // e.g. Cortex M1
93 v6S_M = 12, // v6_M with the System extensions
94 v7E_M = 13, // v7_M with DSP extensions
95 v8 = 14 // v8, AArch32
98 enum CPUArchProfile { // (=7), uleb128
99 Not_Applicable = 0, // pre v7, or cross-profile code
100 ApplicationProfile = (0x41), // 'A' (e.g. for Cortex A8)
101 RealTimeProfile = (0x52), // 'R' (e.g. for Cortex R4)
102 MicroControllerProfile = (0x4D), // 'M' (e.g. for Cortex M3)
103 SystemProfile = (0x53) // 'S' Application or real-time profile
106 // The following have a lot of common use cases
111 // Tag_ARM_ISA_use (=8), uleb128
113 // Tag_THUMB_ISA_use, (=9), uleb128
114 AllowThumb32 = 2, // 32-bit Thumb (implies 16-bit instructions)
116 // Tag_FP_arch (=10), uleb128 (formerly Tag_VFP_arch = 10)
117 AllowFPv2 = 2, // v2 FP ISA permitted (implies use of the v1 FP ISA)
118 AllowFPv3A = 3, // v3 FP ISA permitted (implies use of the v2 FP ISA)
119 AllowFPv3B = 4, // v3 FP ISA permitted, but only D0-D15, S0-S31
120 AllowFPv4A = 5, // v4 FP ISA permitted (implies use of v3 FP ISA)
121 AllowFPv4B = 6, // v4 FP ISA was permitted, but only D0-D15, S0-S31
122 AllowFPARMv8A = 7, // Use of the ARM v8-A FP ISA was permitted
123 AllowFPARMv8B = 8, // Use of the ARM v8-A FP ISA was permitted, but only D0-D15, S0-S31
125 // Tag_WMMX_arch, (=11), uleb128
126 AllowWMMXv1 = 1, // The user permitted this entity to use WMMX v1
127 AllowWMMXv2 = 2, // The user permitted this entity to use WMMX v2
129 // Tag_Advanced_SIMD_arch, (=12), uleb128
130 AllowNeon = 1, // SIMDv1 was permitted
131 AllowNeon2 = 2, // SIMDv2 was permitted (Half-precision FP, MAC operations)
132 AllowNeonARMv8 = 3, // ARM v8-A SIMD was permitted
134 // Tag_ABI_FP_denormal, (=20), uleb128
135 PreserveFPSign = 2, // sign when flushed-to-zero is preserved
137 // Tag_ABI_FP_number_model, (=23), uleb128
138 AllowRTABI = 2, // numbers, infinities, and one quiet NaN (see [RTABI])
139 AllowIEE754 = 3, // this code to use all the IEEE 754-defined FP encodings
141 // Tag_ABI_HardFP_use, (=27), uleb128
142 HardFPImplied = 0, // FP use should be implied by Tag_FP_arch
143 HardFPSinglePrecision = 1, // Single-precision only
145 // Tag_ABI_VFP_args, (=28), uleb128
149 // Tag_FP_HP_extension, (=36), uleb128
150 AllowHPFP = 1, // Allow use of Half Precision FP
152 // Tag_MPextension_use, (=42), uleb128
153 AllowMP = 1, // Allow use of MP extensions
155 // Tag_DIV_use, (=44), uleb128
156 AllowDIVIfExists = 0, // Allow hardware divide if available in arch, or no info exists.
157 DisallowDIV = 1, // Hardware divide explicitly disallowed
158 AllowDIVExt = 2, // Allow hardware divide as optional architecture extension above
159 // the base arch specified by Tag_CPU_arch and Tag_CPU_arch_profile.
161 // Tag_Virtualization_use, (=68), uleb128
163 AllowVirtualization = 2,
164 AllowTZVirtualization = 3
167 } // namespace ARMBuildAttrs
170 #endif // __TARGET_ARMBUILDATTRS_H__