1 //===- ARMCallingConv.td - Calling Conventions for ARM -----*- tablegen -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
9 // This describes the calling conventions for ARM architecture.
10 //===----------------------------------------------------------------------===//
12 /// CCIfSubtarget - Match if the current subtarget has a feature F.
13 class CCIfSubtarget<string F, CCAction A>:
14 CCIf<!strconcat("State.getTarget().getSubtarget<ARMSubtarget>().", F), A>;
16 /// CCIfAlign - Match of the original alignment of the arg
17 class CCIfAlign<string Align, CCAction A>:
18 CCIf<!strconcat("ArgFlags.getOrigAlign() == ", Align), A>;
20 //===----------------------------------------------------------------------===//
21 // ARM APCS Calling Convention
22 //===----------------------------------------------------------------------===//
23 def CC_ARM_APCS : CallingConv<[
25 // Handles byval parameters.
26 CCIfByVal<CCPassByVal<4, 4>>,
28 CCIfType<[i1, i8, i16], CCPromoteToType<i32>>,
30 // Handle all vector types as either f64 or v2f64.
31 CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType<f64>>,
32 CCIfType<[v2i64, v4i32, v8i16, v16i8, v4f32], CCBitConvertToType<v2f64>>,
34 // f64 and v2f64 are passed in adjacent GPRs, possibly split onto the stack
35 CCIfType<[f64, v2f64], CCCustom<"CC_ARM_APCS_Custom_f64">>,
37 CCIfType<[f32], CCBitConvertToType<i32>>,
38 CCIfType<[i32], CCAssignToReg<[R0, R1, R2, R3]>>,
40 CCIfType<[i32], CCAssignToStack<4, 4>>,
41 CCIfType<[f64], CCAssignToStack<8, 4>>,
42 CCIfType<[v2f64], CCAssignToStack<16, 4>>
45 def RetCC_ARM_APCS : CallingConv<[
46 CCIfType<[i1, i8, i16], CCPromoteToType<i32>>,
47 CCIfType<[f32], CCBitConvertToType<i32>>,
49 // Handle all vector types as either f64 or v2f64.
50 CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType<f64>>,
51 CCIfType<[v2i64, v4i32, v8i16, v16i8, v4f32], CCBitConvertToType<v2f64>>,
53 CCIfType<[f64, v2f64], CCCustom<"RetCC_ARM_APCS_Custom_f64">>,
55 CCIfType<[i32], CCAssignToReg<[R0, R1, R2, R3]>>,
56 CCIfType<[i64], CCAssignToRegWithShadow<[R0, R2], [R1, R3]>>
59 //===----------------------------------------------------------------------===//
60 // ARM APCS Calling Convention for FastCC (when VFP2 or later is available)
61 //===----------------------------------------------------------------------===//
62 def FastCC_ARM_APCS : CallingConv<[
63 // Handle all vector types as either f64 or v2f64.
64 CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType<f64>>,
65 CCIfType<[v2i64, v4i32, v8i16, v16i8, v4f32], CCBitConvertToType<v2f64>>,
67 CCIfType<[v2f64], CCAssignToReg<[Q0, Q1, Q2, Q3]>>,
68 CCIfType<[f64], CCAssignToReg<[D0, D1, D2, D3, D4, D5, D6, D7]>>,
69 CCIfType<[f32], CCAssignToReg<[S0, S1, S2, S3, S4, S5, S6, S7, S8,
70 S9, S10, S11, S12, S13, S14, S15]>>,
71 CCDelegateTo<CC_ARM_APCS>
74 def RetFastCC_ARM_APCS : CallingConv<[
75 // Handle all vector types as either f64 or v2f64.
76 CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType<f64>>,
77 CCIfType<[v2i64, v4i32, v8i16, v16i8, v4f32], CCBitConvertToType<v2f64>>,
79 CCIfType<[v2f64], CCAssignToReg<[Q0, Q1, Q2, Q3]>>,
80 CCIfType<[f64], CCAssignToReg<[D0, D1, D2, D3, D4, D5, D6, D7]>>,
81 CCIfType<[f32], CCAssignToReg<[S0, S1, S2, S3, S4, S5, S6, S7, S8,
82 S9, S10, S11, S12, S13, S14, S15]>>,
83 CCDelegateTo<RetCC_ARM_APCS>
87 //===----------------------------------------------------------------------===//
88 // ARM AAPCS (EABI) Calling Convention, common parts
89 //===----------------------------------------------------------------------===//
91 def CC_ARM_AAPCS_Common : CallingConv<[
93 CCIfType<[i1, i8, i16], CCPromoteToType<i32>>,
95 // i64/f64 is passed in even pairs of GPRs
96 // i64 is 8-aligned i32 here, so we may need to eat R1 as a pad register
97 // (and the same is true for f64 if VFP is not enabled)
98 CCIfType<[i32], CCIfAlign<"8", CCAssignToRegWithShadow<[R0, R2], [R0, R1]>>>,
99 CCIfType<[i32], CCIf<"State.getNextStackOffset() == 0 &&"
100 "ArgFlags.getOrigAlign() != 8",
101 CCAssignToReg<[R0, R1, R2, R3]>>>,
103 CCIfType<[i32], CCIfAlign<"8", CCAssignToStackWithShadow<4, 8, R3>>>,
104 CCIfType<[i32, f32], CCAssignToStack<4, 4>>,
105 CCIfType<[f64], CCAssignToStack<8, 8>>,
106 CCIfType<[v2f64], CCAssignToStack<16, 8>>
109 def RetCC_ARM_AAPCS_Common : CallingConv<[
110 CCIfType<[i1, i8, i16], CCPromoteToType<i32>>,
111 CCIfType<[i32], CCAssignToReg<[R0, R1, R2, R3]>>,
112 CCIfType<[i64], CCAssignToRegWithShadow<[R0, R2], [R1, R3]>>
115 //===----------------------------------------------------------------------===//
116 // ARM AAPCS (EABI) Calling Convention
117 //===----------------------------------------------------------------------===//
119 def CC_ARM_AAPCS : CallingConv<[
120 // Handle all vector types as either f64 or v2f64.
121 CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType<f64>>,
122 CCIfType<[v2i64, v4i32, v8i16, v16i8, v4f32], CCBitConvertToType<v2f64>>,
124 CCIfType<[f64, v2f64], CCCustom<"CC_ARM_AAPCS_Custom_f64">>,
125 CCIfType<[f32], CCBitConvertToType<i32>>,
126 CCDelegateTo<CC_ARM_AAPCS_Common>
129 def RetCC_ARM_AAPCS : CallingConv<[
130 // Handle all vector types as either f64 or v2f64.
131 CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType<f64>>,
132 CCIfType<[v2i64, v4i32, v8i16, v16i8, v4f32], CCBitConvertToType<v2f64>>,
134 CCIfType<[f64, v2f64], CCCustom<"RetCC_ARM_AAPCS_Custom_f64">>,
135 CCIfType<[f32], CCBitConvertToType<i32>>,
136 CCDelegateTo<RetCC_ARM_AAPCS_Common>
139 //===----------------------------------------------------------------------===//
140 // ARM AAPCS-VFP (EABI) Calling Convention
141 // Also used for FastCC (when VFP2 or later is available)
142 //===----------------------------------------------------------------------===//
144 def CC_ARM_AAPCS_VFP : CallingConv<[
145 // Handle all vector types as either f64 or v2f64.
146 CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType<f64>>,
147 CCIfType<[v2i64, v4i32, v8i16, v16i8, v4f32], CCBitConvertToType<v2f64>>,
149 CCIfType<[v2f64], CCAssignToReg<[Q0, Q1, Q2, Q3]>>,
150 CCIfType<[f64], CCAssignToReg<[D0, D1, D2, D3, D4, D5, D6, D7]>>,
151 CCIfType<[f32], CCAssignToReg<[S0, S1, S2, S3, S4, S5, S6, S7, S8,
152 S9, S10, S11, S12, S13, S14, S15]>>,
153 CCDelegateTo<CC_ARM_AAPCS_Common>
156 def RetCC_ARM_AAPCS_VFP : CallingConv<[
157 // Handle all vector types as either f64 or v2f64.
158 CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType<f64>>,
159 CCIfType<[v2i64, v4i32, v8i16, v16i8, v4f32], CCBitConvertToType<v2f64>>,
161 CCIfType<[v2f64], CCAssignToReg<[Q0, Q1, Q2, Q3]>>,
162 CCIfType<[f64], CCAssignToReg<[D0, D1, D2, D3, D4, D5, D6, D7]>>,
163 CCIfType<[f32], CCAssignToReg<[S0, S1, S2, S3, S4, S5, S6, S7, S8,
164 S9, S10, S11, S12, S13, S14, S15]>>,
165 CCDelegateTo<RetCC_ARM_AAPCS_Common>