1 //===-- ARMConstantIslandPass.cpp - ARM constant islands --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains a pass that splits the constant pool up into 'islands'
11 // which are scattered through-out the function. This is required due to the
12 // limited pc-relative displacements that ARM has.
14 //===----------------------------------------------------------------------===//
16 #define DEBUG_TYPE "arm-cp-islands"
18 #include "ARMAddressingModes.h"
19 #include "ARMMachineFunctionInfo.h"
20 #include "ARMInstrInfo.h"
21 #include "llvm/CodeGen/MachineConstantPool.h"
22 #include "llvm/CodeGen/MachineFunctionPass.h"
23 #include "llvm/CodeGen/MachineInstrBuilder.h"
24 #include "llvm/Target/TargetData.h"
25 #include "llvm/Target/TargetMachine.h"
26 #include "llvm/Support/Compiler.h"
27 #include "llvm/Support/Debug.h"
28 #include "llvm/Support/ErrorHandling.h"
29 #include "llvm/ADT/SmallVector.h"
30 #include "llvm/ADT/STLExtras.h"
31 #include "llvm/ADT/Statistic.h"
34 STATISTIC(NumCPEs, "Number of constpool entries");
35 STATISTIC(NumSplit, "Number of uncond branches inserted");
36 STATISTIC(NumCBrFixed, "Number of cond branches fixed");
37 STATISTIC(NumUBrFixed, "Number of uncond branches fixed");
40 /// ARMConstantIslands - Due to limited PC-relative displacements, ARM
41 /// requires constant pool entries to be scattered among the instructions
42 /// inside a function. To do this, it completely ignores the normal LLVM
43 /// constant pool; instead, it places constants wherever it feels like with
44 /// special instructions.
46 /// The terminology used in this pass includes:
47 /// Islands - Clumps of constants placed in the function.
48 /// Water - Potential places where an island could be formed.
49 /// CPE - A constant pool entry that has been placed somewhere, which
50 /// tracks a list of users.
51 class VISIBILITY_HIDDEN ARMConstantIslands : public MachineFunctionPass {
52 /// BBSizes - The size of each MachineBasicBlock in bytes of code, indexed
53 /// by MBB Number. The two-byte pads required for Thumb alignment are
54 /// counted as part of the following block (i.e., the offset and size for
55 /// a padded block will both be ==2 mod 4).
56 std::vector<unsigned> BBSizes;
58 /// BBOffsets - the offset of each MBB in bytes, starting from 0.
59 /// The two-byte pads required for Thumb alignment are counted as part of
60 /// the following block.
61 std::vector<unsigned> BBOffsets;
63 /// WaterList - A sorted list of basic blocks where islands could be placed
64 /// (i.e. blocks that don't fall through to the following block, due
65 /// to a return, unreachable, or unconditional branch).
66 std::vector<MachineBasicBlock*> WaterList;
68 /// CPUser - One user of a constant pool, keeping the machine instruction
69 /// pointer, the constant pool being referenced, and the max displacement
70 /// allowed from the instruction to the CP.
77 CPUser(MachineInstr *mi, MachineInstr *cpemi, unsigned maxdisp,
79 : MI(mi), CPEMI(cpemi), MaxDisp(maxdisp), NegOk(neg), IsSoImm(soimm) {}
82 /// CPUsers - Keep track of all of the machine instructions that use various
83 /// constant pools and their max displacement.
84 std::vector<CPUser> CPUsers;
86 /// CPEntry - One per constant pool entry, keeping the machine instruction
87 /// pointer, the constpool index, and the number of CPUser's which
88 /// reference this entry.
93 CPEntry(MachineInstr *cpemi, unsigned cpi, unsigned rc = 0)
94 : CPEMI(cpemi), CPI(cpi), RefCount(rc) {}
97 /// CPEntries - Keep track of all of the constant pool entry machine
98 /// instructions. For each original constpool index (i.e. those that
99 /// existed upon entry to this pass), it keeps a vector of entries.
100 /// Original elements are cloned as we go along; the clones are
101 /// put in the vector of the original element, but have distinct CPIs.
102 std::vector<std::vector<CPEntry> > CPEntries;
104 /// ImmBranch - One per immediate branch, keeping the machine instruction
105 /// pointer, conditional or unconditional, the max displacement,
106 /// and (if isCond is true) the corresponding unconditional branch
110 unsigned MaxDisp : 31;
113 ImmBranch(MachineInstr *mi, unsigned maxdisp, bool cond, int ubr)
114 : MI(mi), MaxDisp(maxdisp), isCond(cond), UncondBr(ubr) {}
117 /// ImmBranches - Keep track of all the immediate branch instructions.
119 std::vector<ImmBranch> ImmBranches;
121 /// PushPopMIs - Keep track of all the Thumb push / pop instructions.
123 SmallVector<MachineInstr*, 4> PushPopMIs;
125 /// HasFarJump - True if any far jump instruction has been emitted during
126 /// the branch fix up pass.
129 const TargetInstrInfo *TII;
130 ARMFunctionInfo *AFI;
136 ARMConstantIslands() : MachineFunctionPass(&ID) {}
138 virtual bool runOnMachineFunction(MachineFunction &Fn);
140 virtual const char *getPassName() const {
141 return "ARM constant island placement and branch shortening pass";
145 void DoInitialPlacement(MachineFunction &Fn,
146 std::vector<MachineInstr*> &CPEMIs);
147 CPEntry *findConstPoolEntry(unsigned CPI, const MachineInstr *CPEMI);
148 void InitialFunctionScan(MachineFunction &Fn,
149 const std::vector<MachineInstr*> &CPEMIs);
150 MachineBasicBlock *SplitBlockBeforeInstr(MachineInstr *MI);
151 void UpdateForInsertedWaterBlock(MachineBasicBlock *NewBB);
152 void AdjustBBOffsetsAfter(MachineBasicBlock *BB, int delta);
153 bool DecrementOldEntry(unsigned CPI, MachineInstr* CPEMI);
154 int LookForExistingCPEntry(CPUser& U, unsigned UserOffset);
155 bool LookForWater(CPUser&U, unsigned UserOffset,
156 MachineBasicBlock** NewMBB);
157 MachineBasicBlock* AcceptWater(MachineBasicBlock *WaterBB,
158 std::vector<MachineBasicBlock*>::iterator IP);
159 void CreateNewWater(unsigned CPUserIndex, unsigned UserOffset,
160 MachineBasicBlock** NewMBB);
161 bool HandleConstantPoolUser(MachineFunction &Fn, unsigned CPUserIndex);
162 void RemoveDeadCPEMI(MachineInstr *CPEMI);
163 bool RemoveUnusedCPEntries();
164 bool CPEIsInRange(MachineInstr *MI, unsigned UserOffset,
165 MachineInstr *CPEMI, unsigned Disp, bool NegOk,
166 bool DoDump = false);
167 bool WaterIsInRange(unsigned UserOffset, MachineBasicBlock *Water,
169 bool OffsetIsInRange(unsigned UserOffset, unsigned TrialOffset,
170 unsigned Disp, bool NegativeOK, bool IsSoImm = false);
171 bool BBIsInRange(MachineInstr *MI, MachineBasicBlock *BB, unsigned Disp);
172 bool FixUpImmediateBr(MachineFunction &Fn, ImmBranch &Br);
173 bool FixUpConditionalBr(MachineFunction &Fn, ImmBranch &Br);
174 bool FixUpUnconditionalBr(MachineFunction &Fn, ImmBranch &Br);
175 bool UndoLRSpillRestore();
177 unsigned GetOffsetOf(MachineInstr *MI) const;
179 void verify(MachineFunction &Fn);
181 char ARMConstantIslands::ID = 0;
184 /// verify - check BBOffsets, BBSizes, alignment of islands
185 void ARMConstantIslands::verify(MachineFunction &Fn) {
186 assert(BBOffsets.size() == BBSizes.size());
187 for (unsigned i = 1, e = BBOffsets.size(); i != e; ++i)
188 assert(BBOffsets[i-1]+BBSizes[i-1] == BBOffsets[i]);
192 for (MachineFunction::iterator MBBI = Fn.begin(), E = Fn.end();
194 MachineBasicBlock *MBB = MBBI;
196 MBB->begin()->getOpcode() == ARM::CONSTPOOL_ENTRY) {
197 unsigned MBBId = MBB->getNumber();
198 assert((BBOffsets[MBBId]%4 == 0 && BBSizes[MBBId]%4 == 0) ||
199 (BBOffsets[MBBId]%4 != 0 && BBSizes[MBBId]%4 != 0));
205 /// print block size and offset information - debugging
206 void ARMConstantIslands::dumpBBs() {
207 for (unsigned J = 0, E = BBOffsets.size(); J !=E; ++J) {
208 DOUT << "block " << J << " offset " << BBOffsets[J] <<
209 " size " << BBSizes[J] << "\n";
213 /// createARMConstantIslandPass - returns an instance of the constpool
215 FunctionPass *llvm::createARMConstantIslandPass() {
216 return new ARMConstantIslands();
219 bool ARMConstantIslands::runOnMachineFunction(MachineFunction &Fn) {
220 MachineConstantPool &MCP = *Fn.getConstantPool();
222 TII = Fn.getTarget().getInstrInfo();
223 AFI = Fn.getInfo<ARMFunctionInfo>();
224 isThumb = AFI->isThumbFunction();
225 isThumb1 = AFI->isThumb1OnlyFunction();
226 isThumb2 = AFI->isThumb2Function();
230 // Renumber all of the machine basic blocks in the function, guaranteeing that
231 // the numbers agree with the position of the block in the function.
234 // Thumb1 functions containing constant pools get 2-byte alignment.
235 // This is so we can keep exact track of where the alignment padding goes.
237 // Set default. Thumb1 function is 1-byte aligned, ARM and Thumb2 are 2-byte
239 AFI->setAlign(isThumb1 ? 1U : 2U);
241 // Perform the initial placement of the constant pool entries. To start with,
242 // we put them all at the end of the function.
243 std::vector<MachineInstr*> CPEMIs;
244 if (!MCP.isEmpty()) {
245 DoInitialPlacement(Fn, CPEMIs);
250 /// The next UID to take is the first unused one.
251 AFI->initConstPoolEntryUId(CPEMIs.size());
253 // Do the initial scan of the function, building up information about the
254 // sizes of each block, the location of all the water, and finding all of the
255 // constant pool users.
256 InitialFunctionScan(Fn, CPEMIs);
259 /// Remove dead constant pool entries.
260 RemoveUnusedCPEntries();
262 // Iteratively place constant pool entries and fix up branches until there
264 bool MadeChange = false;
267 for (unsigned i = 0, e = CPUsers.size(); i != e; ++i)
268 Change |= HandleConstantPoolUser(Fn, i);
270 for (unsigned i = 0, e = ImmBranches.size(); i != e; ++i)
271 Change |= FixUpImmediateBr(Fn, ImmBranches[i]);
278 // After a while, this might be made debug-only, but it is not expensive.
281 // If LR has been forced spilled and no far jumps (i.e. BL) has been issued.
282 // Undo the spill / restore of LR if possible.
283 if (!HasFarJump && AFI->isLRSpilledForFarJump() && isThumb)
284 MadeChange |= UndoLRSpillRestore();
297 /// DoInitialPlacement - Perform the initial placement of the constant pool
298 /// entries. To start with, we put them all at the end of the function.
299 void ARMConstantIslands::DoInitialPlacement(MachineFunction &Fn,
300 std::vector<MachineInstr*> &CPEMIs) {
301 // Create the basic block to hold the CPE's.
302 MachineBasicBlock *BB = Fn.CreateMachineBasicBlock();
305 // Add all of the constants from the constant pool to the end block, use an
306 // identity mapping of CPI's to CPE's.
307 const std::vector<MachineConstantPoolEntry> &CPs =
308 Fn.getConstantPool()->getConstants();
310 const TargetData &TD = *Fn.getTarget().getTargetData();
311 for (unsigned i = 0, e = CPs.size(); i != e; ++i) {
312 unsigned Size = TD.getTypeAllocSize(CPs[i].getType());
313 // Verify that all constant pool entries are a multiple of 4 bytes. If not,
314 // we would have to pad them out or something so that instructions stay
316 assert((Size & 3) == 0 && "CP Entry not multiple of 4 bytes!");
317 MachineInstr *CPEMI =
318 BuildMI(BB, DebugLoc::getUnknownLoc(), TII->get(ARM::CONSTPOOL_ENTRY))
319 .addImm(i).addConstantPoolIndex(i).addImm(Size);
320 CPEMIs.push_back(CPEMI);
322 // Add a new CPEntry, but no corresponding CPUser yet.
323 std::vector<CPEntry> CPEs;
324 CPEs.push_back(CPEntry(CPEMI, i));
325 CPEntries.push_back(CPEs);
327 DOUT << "Moved CPI#" << i << " to end of function as #" << i << "\n";
331 /// BBHasFallthrough - Return true if the specified basic block can fallthrough
332 /// into the block immediately after it.
333 static bool BBHasFallthrough(MachineBasicBlock *MBB) {
334 // Get the next machine basic block in the function.
335 MachineFunction::iterator MBBI = MBB;
336 if (next(MBBI) == MBB->getParent()->end()) // Can't fall off end of function.
339 MachineBasicBlock *NextBB = next(MBBI);
340 for (MachineBasicBlock::succ_iterator I = MBB->succ_begin(),
341 E = MBB->succ_end(); I != E; ++I)
348 /// findConstPoolEntry - Given the constpool index and CONSTPOOL_ENTRY MI,
349 /// look up the corresponding CPEntry.
350 ARMConstantIslands::CPEntry
351 *ARMConstantIslands::findConstPoolEntry(unsigned CPI,
352 const MachineInstr *CPEMI) {
353 std::vector<CPEntry> &CPEs = CPEntries[CPI];
354 // Number of entries per constpool index should be small, just do a
356 for (unsigned i = 0, e = CPEs.size(); i != e; ++i) {
357 if (CPEs[i].CPEMI == CPEMI)
363 /// InitialFunctionScan - Do the initial scan of the function, building up
364 /// information about the sizes of each block, the location of all the water,
365 /// and finding all of the constant pool users.
366 void ARMConstantIslands::InitialFunctionScan(MachineFunction &Fn,
367 const std::vector<MachineInstr*> &CPEMIs) {
369 for (MachineFunction::iterator MBBI = Fn.begin(), E = Fn.end();
371 MachineBasicBlock &MBB = *MBBI;
373 // If this block doesn't fall through into the next MBB, then this is
374 // 'water' that a constant pool island could be placed.
375 if (!BBHasFallthrough(&MBB))
376 WaterList.push_back(&MBB);
378 unsigned MBBSize = 0;
379 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
381 // Add instruction size to MBBSize.
382 MBBSize += TII->GetInstSizeInBytes(I);
384 int Opc = I->getOpcode();
385 if (I->getDesc().isBranch()) {
392 // A Thumb1 table jump may involve padding; for the offsets to
393 // be right, functions containing these must be 4-byte aligned.
395 if ((Offset+MBBSize)%4 != 0)
396 MBBSize += 2; // padding
397 continue; // Does not get an entry in ImmBranches
399 continue; // Ignore other JT branches
430 // Record this immediate branch.
431 unsigned MaxOffs = ((1 << (Bits-1))-1) * Scale;
432 ImmBranches.push_back(ImmBranch(I, MaxOffs, isCond, UOpc));
435 if (Opc == ARM::tPUSH || Opc == ARM::tPOP_RET)
436 PushPopMIs.push_back(I);
438 if (Opc == ARM::CONSTPOOL_ENTRY)
441 // Scan the instructions for constant pool operands.
442 for (unsigned op = 0, e = I->getNumOperands(); op != e; ++op)
443 if (I->getOperand(op).isCPI()) {
444 // We found one. The addressing mode tells us the max displacement
445 // from the PC that this instruction permits.
447 // Basic size info comes from the TSFlags field.
451 bool IsSoImm = false;
455 llvm_unreachable("Unknown addressing mode for CP reference!");
458 // Taking the address of a CP entry.
460 // This takes a SoImm, which is 8 bit immediate rotated. We'll
461 // pretend the maximum offset is 255 * 4. Since each instruction
462 // 4 byte wide, this is always correct. We'llc heck for other
463 // displacements that fits in a SoImm as well.
469 case ARM::t2LEApcrel:
481 Bits = 12; // +-offset_12
488 Scale = 4; // +(offset_8*4)
494 Scale = 4; // +-(offset_8*4)
499 // Remember that this is a user of a CP entry.
500 unsigned CPI = I->getOperand(op).getIndex();
501 MachineInstr *CPEMI = CPEMIs[CPI];
502 unsigned MaxOffs = ((1 << Bits)-1) * Scale;
503 CPUsers.push_back(CPUser(I, CPEMI, MaxOffs, NegOk, IsSoImm));
505 // Increment corresponding CPEntry reference count.
506 CPEntry *CPE = findConstPoolEntry(CPI, CPEMI);
507 assert(CPE && "Cannot find a corresponding CPEntry!");
510 // Instructions can only use one CP entry, don't bother scanning the
511 // rest of the operands.
516 // In thumb mode, if this block is a constpool island, we may need padding
517 // so it's aligned on 4 byte boundary.
520 MBB.begin()->getOpcode() == ARM::CONSTPOOL_ENTRY &&
524 BBSizes.push_back(MBBSize);
525 BBOffsets.push_back(Offset);
530 /// GetOffsetOf - Return the current offset of the specified machine instruction
531 /// from the start of the function. This offset changes as stuff is moved
532 /// around inside the function.
533 unsigned ARMConstantIslands::GetOffsetOf(MachineInstr *MI) const {
534 MachineBasicBlock *MBB = MI->getParent();
536 // The offset is composed of two things: the sum of the sizes of all MBB's
537 // before this instruction's block, and the offset from the start of the block
539 unsigned Offset = BBOffsets[MBB->getNumber()];
541 // If we're looking for a CONSTPOOL_ENTRY in Thumb, see if this block has
542 // alignment padding, and compensate if so.
544 MI->getOpcode() == ARM::CONSTPOOL_ENTRY &&
548 // Sum instructions before MI in MBB.
549 for (MachineBasicBlock::iterator I = MBB->begin(); ; ++I) {
550 assert(I != MBB->end() && "Didn't find MI in its own basic block?");
551 if (&*I == MI) return Offset;
552 Offset += TII->GetInstSizeInBytes(I);
556 /// CompareMBBNumbers - Little predicate function to sort the WaterList by MBB
558 static bool CompareMBBNumbers(const MachineBasicBlock *LHS,
559 const MachineBasicBlock *RHS) {
560 return LHS->getNumber() < RHS->getNumber();
563 /// UpdateForInsertedWaterBlock - When a block is newly inserted into the
564 /// machine function, it upsets all of the block numbers. Renumber the blocks
565 /// and update the arrays that parallel this numbering.
566 void ARMConstantIslands::UpdateForInsertedWaterBlock(MachineBasicBlock *NewBB) {
567 // Renumber the MBB's to keep them consequtive.
568 NewBB->getParent()->RenumberBlocks(NewBB);
570 // Insert a size into BBSizes to align it properly with the (newly
571 // renumbered) block numbers.
572 BBSizes.insert(BBSizes.begin()+NewBB->getNumber(), 0);
574 // Likewise for BBOffsets.
575 BBOffsets.insert(BBOffsets.begin()+NewBB->getNumber(), 0);
577 // Next, update WaterList. Specifically, we need to add NewMBB as having
578 // available water after it.
579 std::vector<MachineBasicBlock*>::iterator IP =
580 std::lower_bound(WaterList.begin(), WaterList.end(), NewBB,
582 WaterList.insert(IP, NewBB);
586 /// Split the basic block containing MI into two blocks, which are joined by
587 /// an unconditional branch. Update datastructures and renumber blocks to
588 /// account for this change and returns the newly created block.
589 MachineBasicBlock *ARMConstantIslands::SplitBlockBeforeInstr(MachineInstr *MI) {
590 MachineBasicBlock *OrigBB = MI->getParent();
591 MachineFunction &MF = *OrigBB->getParent();
593 // Create a new MBB for the code after the OrigBB.
594 MachineBasicBlock *NewBB =
595 MF.CreateMachineBasicBlock(OrigBB->getBasicBlock());
596 MachineFunction::iterator MBBI = OrigBB; ++MBBI;
597 MF.insert(MBBI, NewBB);
599 // Splice the instructions starting with MI over to NewBB.
600 NewBB->splice(NewBB->end(), OrigBB, MI, OrigBB->end());
602 // Add an unconditional branch from OrigBB to NewBB.
603 // Note the new unconditional branch is not being recorded.
604 // There doesn't seem to be meaningful DebugInfo available; this doesn't
605 // correspond to anything in the source.
606 unsigned Opc = isThumb ? (isThumb2 ? ARM::t2B : ARM::tB) : ARM::B;
607 BuildMI(OrigBB, DebugLoc::getUnknownLoc(), TII->get(Opc)).addMBB(NewBB);
610 // Update the CFG. All succs of OrigBB are now succs of NewBB.
611 while (!OrigBB->succ_empty()) {
612 MachineBasicBlock *Succ = *OrigBB->succ_begin();
613 OrigBB->removeSuccessor(Succ);
614 NewBB->addSuccessor(Succ);
616 // This pass should be run after register allocation, so there should be no
617 // PHI nodes to update.
618 assert((Succ->empty() || Succ->begin()->getOpcode() != TargetInstrInfo::PHI)
619 && "PHI nodes should be eliminated by now!");
622 // OrigBB branches to NewBB.
623 OrigBB->addSuccessor(NewBB);
625 // Update internal data structures to account for the newly inserted MBB.
626 // This is almost the same as UpdateForInsertedWaterBlock, except that
627 // the Water goes after OrigBB, not NewBB.
628 MF.RenumberBlocks(NewBB);
630 // Insert a size into BBSizes to align it properly with the (newly
631 // renumbered) block numbers.
632 BBSizes.insert(BBSizes.begin()+NewBB->getNumber(), 0);
634 // Likewise for BBOffsets.
635 BBOffsets.insert(BBOffsets.begin()+NewBB->getNumber(), 0);
637 // Next, update WaterList. Specifically, we need to add OrigMBB as having
638 // available water after it (but not if it's already there, which happens
639 // when splitting before a conditional branch that is followed by an
640 // unconditional branch - in that case we want to insert NewBB).
641 std::vector<MachineBasicBlock*>::iterator IP =
642 std::lower_bound(WaterList.begin(), WaterList.end(), OrigBB,
644 MachineBasicBlock* WaterBB = *IP;
645 if (WaterBB == OrigBB)
646 WaterList.insert(next(IP), NewBB);
648 WaterList.insert(IP, OrigBB);
650 // Figure out how large the first NewMBB is. (It cannot
651 // contain a constpool_entry or tablejump.)
652 unsigned NewBBSize = 0;
653 for (MachineBasicBlock::iterator I = NewBB->begin(), E = NewBB->end();
655 NewBBSize += TII->GetInstSizeInBytes(I);
657 unsigned OrigBBI = OrigBB->getNumber();
658 unsigned NewBBI = NewBB->getNumber();
659 // Set the size of NewBB in BBSizes.
660 BBSizes[NewBBI] = NewBBSize;
662 // We removed instructions from UserMBB, subtract that off from its size.
663 // Add 2 or 4 to the block to count the unconditional branch we added to it.
664 unsigned delta = isThumb1 ? 2 : 4;
665 BBSizes[OrigBBI] -= NewBBSize - delta;
667 // ...and adjust BBOffsets for NewBB accordingly.
668 BBOffsets[NewBBI] = BBOffsets[OrigBBI] + BBSizes[OrigBBI];
670 // All BBOffsets following these blocks must be modified.
671 AdjustBBOffsetsAfter(NewBB, delta);
676 /// OffsetIsInRange - Checks whether UserOffset (the location of a constant pool
677 /// reference) is within MaxDisp of TrialOffset (a proposed location of a
678 /// constant pool entry).
679 bool ARMConstantIslands::OffsetIsInRange(unsigned UserOffset,
680 unsigned TrialOffset, unsigned MaxDisp,
681 bool NegativeOK, bool IsSoImm) {
682 // On Thumb offsets==2 mod 4 are rounded down by the hardware for
683 // purposes of the displacement computation; compensate for that here.
684 // Effectively, the valid range of displacements is 2 bytes smaller for such
686 if (isThumb && UserOffset%4 !=0)
688 // CPEs will be rounded up to a multiple of 4.
689 if (isThumb && TrialOffset%4 != 0)
692 if (UserOffset <= TrialOffset) {
693 // User before the Trial.
694 if (TrialOffset - UserOffset <= MaxDisp)
696 // FIXME: Make use full range of soimm values.
697 } else if (NegativeOK) {
698 if (UserOffset - TrialOffset <= MaxDisp)
700 // FIXME: Make use full range of soimm values.
705 /// WaterIsInRange - Returns true if a CPE placed after the specified
706 /// Water (a basic block) will be in range for the specific MI.
708 bool ARMConstantIslands::WaterIsInRange(unsigned UserOffset,
709 MachineBasicBlock* Water, CPUser &U) {
710 unsigned MaxDisp = U.MaxDisp;
711 unsigned CPEOffset = BBOffsets[Water->getNumber()] +
712 BBSizes[Water->getNumber()];
714 // If the CPE is to be inserted before the instruction, that will raise
715 // the offset of the instruction. (Currently applies only to ARM, so
716 // no alignment compensation attempted here.)
717 if (CPEOffset < UserOffset)
718 UserOffset += U.CPEMI->getOperand(2).getImm();
720 return OffsetIsInRange(UserOffset, CPEOffset, MaxDisp, U.NegOk, U.IsSoImm);
723 /// CPEIsInRange - Returns true if the distance between specific MI and
724 /// specific ConstPool entry instruction can fit in MI's displacement field.
725 bool ARMConstantIslands::CPEIsInRange(MachineInstr *MI, unsigned UserOffset,
726 MachineInstr *CPEMI, unsigned MaxDisp,
727 bool NegOk, bool DoDump) {
728 unsigned CPEOffset = GetOffsetOf(CPEMI);
729 assert(CPEOffset%4 == 0 && "Misaligned CPE");
732 DOUT << "User of CPE#" << CPEMI->getOperand(0).getImm()
733 << " max delta=" << MaxDisp
734 << " insn address=" << UserOffset
735 << " CPE address=" << CPEOffset
736 << " offset=" << int(CPEOffset-UserOffset) << "\t" << *MI;
739 return OffsetIsInRange(UserOffset, CPEOffset, MaxDisp, NegOk);
743 /// BBIsJumpedOver - Return true of the specified basic block's only predecessor
744 /// unconditionally branches to its only successor.
745 static bool BBIsJumpedOver(MachineBasicBlock *MBB) {
746 if (MBB->pred_size() != 1 || MBB->succ_size() != 1)
749 MachineBasicBlock *Succ = *MBB->succ_begin();
750 MachineBasicBlock *Pred = *MBB->pred_begin();
751 MachineInstr *PredMI = &Pred->back();
752 if (PredMI->getOpcode() == ARM::B || PredMI->getOpcode() == ARM::tB
753 || PredMI->getOpcode() == ARM::t2B)
754 return PredMI->getOperand(0).getMBB() == Succ;
759 void ARMConstantIslands::AdjustBBOffsetsAfter(MachineBasicBlock *BB,
761 MachineFunction::iterator MBBI = BB; MBBI = next(MBBI);
762 for(unsigned i = BB->getNumber()+1, e = BB->getParent()->getNumBlockIDs();
764 BBOffsets[i] += delta;
765 // If some existing blocks have padding, adjust the padding as needed, a
766 // bit tricky. delta can be negative so don't use % on that.
769 MachineBasicBlock *MBB = MBBI;
771 // Constant pool entries require padding.
772 if (MBB->begin()->getOpcode() == ARM::CONSTPOOL_ENTRY) {
773 unsigned oldOffset = BBOffsets[i] - delta;
774 if (oldOffset%4==0 && BBOffsets[i]%4!=0) {
778 } else if (oldOffset%4!=0 && BBOffsets[i]%4==0) {
779 // remove existing padding
784 // Thumb1 jump tables require padding. They should be at the end;
785 // following unconditional branches are removed by AnalyzeBranch.
786 MachineInstr *ThumbJTMI = prior(MBB->end());
787 if (ThumbJTMI->getOpcode() == ARM::tBR_JTr) {
788 unsigned newMIOffset = GetOffsetOf(ThumbJTMI);
789 unsigned oldMIOffset = newMIOffset - delta;
790 if (oldMIOffset%4 == 0 && newMIOffset%4 != 0) {
791 // remove existing padding
794 } else if (oldMIOffset%4 != 0 && newMIOffset%4 == 0) {
807 /// DecrementOldEntry - find the constant pool entry with index CPI
808 /// and instruction CPEMI, and decrement its refcount. If the refcount
809 /// becomes 0 remove the entry and instruction. Returns true if we removed
810 /// the entry, false if we didn't.
812 bool ARMConstantIslands::DecrementOldEntry(unsigned CPI, MachineInstr *CPEMI) {
813 // Find the old entry. Eliminate it if it is no longer used.
814 CPEntry *CPE = findConstPoolEntry(CPI, CPEMI);
815 assert(CPE && "Unexpected!");
816 if (--CPE->RefCount == 0) {
817 RemoveDeadCPEMI(CPEMI);
825 /// LookForCPEntryInRange - see if the currently referenced CPE is in range;
826 /// if not, see if an in-range clone of the CPE is in range, and if so,
827 /// change the data structures so the user references the clone. Returns:
828 /// 0 = no existing entry found
829 /// 1 = entry found, and there were no code insertions or deletions
830 /// 2 = entry found, and there were code insertions or deletions
831 int ARMConstantIslands::LookForExistingCPEntry(CPUser& U, unsigned UserOffset)
833 MachineInstr *UserMI = U.MI;
834 MachineInstr *CPEMI = U.CPEMI;
836 // Check to see if the CPE is already in-range.
837 if (CPEIsInRange(UserMI, UserOffset, CPEMI, U.MaxDisp, U.NegOk, true)) {
838 DOUT << "In range\n";
842 // No. Look for previously created clones of the CPE that are in range.
843 unsigned CPI = CPEMI->getOperand(1).getIndex();
844 std::vector<CPEntry> &CPEs = CPEntries[CPI];
845 for (unsigned i = 0, e = CPEs.size(); i != e; ++i) {
846 // We already tried this one
847 if (CPEs[i].CPEMI == CPEMI)
849 // Removing CPEs can leave empty entries, skip
850 if (CPEs[i].CPEMI == NULL)
852 if (CPEIsInRange(UserMI, UserOffset, CPEs[i].CPEMI, U.MaxDisp, U.NegOk)) {
853 DOUT << "Replacing CPE#" << CPI << " with CPE#" << CPEs[i].CPI << "\n";
854 // Point the CPUser node to the replacement
855 U.CPEMI = CPEs[i].CPEMI;
856 // Change the CPI in the instruction operand to refer to the clone.
857 for (unsigned j = 0, e = UserMI->getNumOperands(); j != e; ++j)
858 if (UserMI->getOperand(j).isCPI()) {
859 UserMI->getOperand(j).setIndex(CPEs[i].CPI);
862 // Adjust the refcount of the clone...
864 // ...and the original. If we didn't remove the old entry, none of the
865 // addresses changed, so we don't need another pass.
866 return DecrementOldEntry(CPI, CPEMI) ? 2 : 1;
872 /// getUnconditionalBrDisp - Returns the maximum displacement that can fit in
873 /// the specific unconditional branch instruction.
874 static inline unsigned getUnconditionalBrDisp(int Opc) {
877 return ((1<<10)-1)*2;
879 return ((1<<23)-1)*2;
884 return ((1<<23)-1)*4;
887 /// AcceptWater - Small amount of common code factored out of the following.
889 MachineBasicBlock* ARMConstantIslands::AcceptWater(MachineBasicBlock *WaterBB,
890 std::vector<MachineBasicBlock*>::iterator IP) {
891 DOUT << "found water in range\n";
892 // Remove the original WaterList entry; we want subsequent
893 // insertions in this vicinity to go after the one we're
894 // about to insert. This considerably reduces the number
895 // of times we have to move the same CPE more than once.
897 // CPE goes before following block (NewMBB).
898 return next(MachineFunction::iterator(WaterBB));
901 /// LookForWater - look for an existing entry in the WaterList in which
902 /// we can place the CPE referenced from U so it's within range of U's MI.
903 /// Returns true if found, false if not. If it returns true, *NewMBB
904 /// is set to the WaterList entry.
905 /// For ARM, we prefer the water that's farthest away. For Thumb, prefer
906 /// water that will not introduce padding to water that will; within each
907 /// group, prefer the water that's farthest away.
908 bool ARMConstantIslands::LookForWater(CPUser &U, unsigned UserOffset,
909 MachineBasicBlock** NewMBB) {
910 std::vector<MachineBasicBlock*>::iterator IPThatWouldPad;
911 MachineBasicBlock* WaterBBThatWouldPad = NULL;
912 if (!WaterList.empty()) {
913 for (std::vector<MachineBasicBlock*>::iterator IP = prior(WaterList.end()),
914 B = WaterList.begin();; --IP) {
915 MachineBasicBlock* WaterBB = *IP;
916 if (WaterIsInRange(UserOffset, WaterBB, U)) {
917 unsigned WBBId = WaterBB->getNumber();
919 (BBOffsets[WBBId] + BBSizes[WBBId])%4 != 0) {
920 // This is valid Water, but would introduce padding. Remember
921 // it in case we don't find any Water that doesn't do this.
922 if (!WaterBBThatWouldPad) {
923 WaterBBThatWouldPad = WaterBB;
927 *NewMBB = AcceptWater(WaterBB, IP);
935 if (isThumb && WaterBBThatWouldPad) {
936 *NewMBB = AcceptWater(WaterBBThatWouldPad, IPThatWouldPad);
942 /// CreateNewWater - No existing WaterList entry will work for
943 /// CPUsers[CPUserIndex], so create a place to put the CPE. The end of the
944 /// block is used if in range, and the conditional branch munged so control
945 /// flow is correct. Otherwise the block is split to create a hole with an
946 /// unconditional branch around it. In either case *NewMBB is set to a
947 /// block following which the new island can be inserted (the WaterList
948 /// is not adjusted).
950 void ARMConstantIslands::CreateNewWater(unsigned CPUserIndex,
951 unsigned UserOffset, MachineBasicBlock** NewMBB) {
952 CPUser &U = CPUsers[CPUserIndex];
953 MachineInstr *UserMI = U.MI;
954 MachineInstr *CPEMI = U.CPEMI;
955 MachineBasicBlock *UserMBB = UserMI->getParent();
956 unsigned OffsetOfNextBlock = BBOffsets[UserMBB->getNumber()] +
957 BBSizes[UserMBB->getNumber()];
958 assert(OffsetOfNextBlock== BBOffsets[UserMBB->getNumber()+1]);
960 // If the use is at the end of the block, or the end of the block
961 // is within range, make new water there. (The addition below is
962 // for the unconditional branch we will be adding: 4 bytes on ARM + Thumb2,
963 // 2 on Thumb1. Possible Thumb1 alignment padding is allowed for
964 // inside OffsetIsInRange.
965 // If the block ends in an unconditional branch already, it is water,
966 // and is known to be out of range, so we'll always be adding a branch.)
967 if (&UserMBB->back() == UserMI ||
968 OffsetIsInRange(UserOffset, OffsetOfNextBlock + (isThumb1 ? 2: 4),
969 U.MaxDisp, U.NegOk, U.IsSoImm)) {
970 DOUT << "Split at end of block\n";
971 if (&UserMBB->back() == UserMI)
972 assert(BBHasFallthrough(UserMBB) && "Expected a fallthrough BB!");
973 *NewMBB = next(MachineFunction::iterator(UserMBB));
974 // Add an unconditional branch from UserMBB to fallthrough block.
975 // Record it for branch lengthening; this new branch will not get out of
976 // range, but if the preceding conditional branch is out of range, the
977 // targets will be exchanged, and the altered branch may be out of
978 // range, so the machinery has to know about it.
979 int UncondBr = isThumb ? ((isThumb2) ? ARM::t2B : ARM::tB) : ARM::B;
980 BuildMI(UserMBB, DebugLoc::getUnknownLoc(),
981 TII->get(UncondBr)).addMBB(*NewMBB);
982 unsigned MaxDisp = getUnconditionalBrDisp(UncondBr);
983 ImmBranches.push_back(ImmBranch(&UserMBB->back(),
984 MaxDisp, false, UncondBr));
985 int delta = isThumb1 ? 2 : 4;
986 BBSizes[UserMBB->getNumber()] += delta;
987 AdjustBBOffsetsAfter(UserMBB, delta);
989 // What a big block. Find a place within the block to split it.
990 // This is a little tricky on Thumb1 since instructions are 2 bytes
991 // and constant pool entries are 4 bytes: if instruction I references
992 // island CPE, and instruction I+1 references CPE', it will
993 // not work well to put CPE as far forward as possible, since then
994 // CPE' cannot immediately follow it (that location is 2 bytes
995 // farther away from I+1 than CPE was from I) and we'd need to create
996 // a new island. So, we make a first guess, then walk through the
997 // instructions between the one currently being looked at and the
998 // possible insertion point, and make sure any other instructions
999 // that reference CPEs will be able to use the same island area;
1000 // if not, we back up the insertion point.
1002 // The 4 in the following is for the unconditional branch we'll be
1003 // inserting (allows for long branch on Thumb1). Alignment of the
1004 // island is handled inside OffsetIsInRange.
1005 unsigned BaseInsertOffset = UserOffset + U.MaxDisp -4;
1006 // This could point off the end of the block if we've already got
1007 // constant pool entries following this block; only the last one is
1008 // in the water list. Back past any possible branches (allow for a
1009 // conditional and a maximally long unconditional).
1010 if (BaseInsertOffset >= BBOffsets[UserMBB->getNumber()+1])
1011 BaseInsertOffset = BBOffsets[UserMBB->getNumber()+1] -
1013 unsigned EndInsertOffset = BaseInsertOffset +
1014 CPEMI->getOperand(2).getImm();
1015 MachineBasicBlock::iterator MI = UserMI;
1017 unsigned CPUIndex = CPUserIndex+1;
1018 for (unsigned Offset = UserOffset+TII->GetInstSizeInBytes(UserMI);
1019 Offset < BaseInsertOffset;
1020 Offset += TII->GetInstSizeInBytes(MI),
1022 if (CPUIndex < CPUsers.size() && CPUsers[CPUIndex].MI == MI) {
1023 CPUser &U = CPUsers[CPUIndex];
1024 if (!OffsetIsInRange(Offset, EndInsertOffset,
1025 U.MaxDisp, U.NegOk, U.IsSoImm)) {
1026 BaseInsertOffset -= (isThumb1 ? 2 : 4);
1027 EndInsertOffset -= (isThumb1 ? 2 : 4);
1029 // This is overly conservative, as we don't account for CPEMIs
1030 // being reused within the block, but it doesn't matter much.
1031 EndInsertOffset += CPUsers[CPUIndex].CPEMI->getOperand(2).getImm();
1035 DOUT << "Split in middle of big block\n";
1036 *NewMBB = SplitBlockBeforeInstr(prior(MI));
1040 /// HandleConstantPoolUser - Analyze the specified user, checking to see if it
1041 /// is out-of-range. If so, pick up the constant pool value and move it some
1042 /// place in-range. Return true if we changed any addresses (thus must run
1043 /// another pass of branch lengthening), false otherwise.
1044 bool ARMConstantIslands::HandleConstantPoolUser(MachineFunction &Fn,
1045 unsigned CPUserIndex) {
1046 CPUser &U = CPUsers[CPUserIndex];
1047 MachineInstr *UserMI = U.MI;
1048 MachineInstr *CPEMI = U.CPEMI;
1049 unsigned CPI = CPEMI->getOperand(1).getIndex();
1050 unsigned Size = CPEMI->getOperand(2).getImm();
1051 MachineBasicBlock *NewMBB;
1052 // Compute this only once, it's expensive. The 4 or 8 is the value the
1053 // hardware keeps in the PC (2 insns ahead of the reference).
1054 unsigned UserOffset = GetOffsetOf(UserMI) + (isThumb ? 4 : 8);
1056 // See if the current entry is within range, or there is a clone of it
1058 int result = LookForExistingCPEntry(U, UserOffset);
1059 if (result==1) return false;
1060 else if (result==2) return true;
1062 // No existing clone of this CPE is within range.
1063 // We will be generating a new clone. Get a UID for it.
1064 unsigned ID = AFI->createConstPoolEntryUId();
1066 // Look for water where we can place this CPE. We look for the farthest one
1067 // away that will work. Forward references only for now (although later
1068 // we might find some that are backwards).
1070 if (!LookForWater(U, UserOffset, &NewMBB)) {
1072 DOUT << "No water found\n";
1073 CreateNewWater(CPUserIndex, UserOffset, &NewMBB);
1076 // Okay, we know we can put an island before NewMBB now, do it!
1077 MachineBasicBlock *NewIsland = Fn.CreateMachineBasicBlock();
1078 Fn.insert(NewMBB, NewIsland);
1080 // Update internal data structures to account for the newly inserted MBB.
1081 UpdateForInsertedWaterBlock(NewIsland);
1083 // Decrement the old entry, and remove it if refcount becomes 0.
1084 DecrementOldEntry(CPI, CPEMI);
1086 // Now that we have an island to add the CPE to, clone the original CPE and
1087 // add it to the island.
1088 U.CPEMI = BuildMI(NewIsland, DebugLoc::getUnknownLoc(),
1089 TII->get(ARM::CONSTPOOL_ENTRY))
1090 .addImm(ID).addConstantPoolIndex(CPI).addImm(Size);
1091 CPEntries[CPI].push_back(CPEntry(U.CPEMI, ID, 1));
1094 BBOffsets[NewIsland->getNumber()] = BBOffsets[NewMBB->getNumber()];
1095 // Compensate for .align 2 in thumb mode.
1096 if (isThumb && BBOffsets[NewIsland->getNumber()]%4 != 0)
1098 // Increase the size of the island block to account for the new entry.
1099 BBSizes[NewIsland->getNumber()] += Size;
1100 AdjustBBOffsetsAfter(NewIsland, Size);
1102 // Finally, change the CPI in the instruction operand to be ID.
1103 for (unsigned i = 0, e = UserMI->getNumOperands(); i != e; ++i)
1104 if (UserMI->getOperand(i).isCPI()) {
1105 UserMI->getOperand(i).setIndex(ID);
1109 DOUT << " Moved CPE to #" << ID << " CPI=" << CPI << "\t" << *UserMI;
1114 /// RemoveDeadCPEMI - Remove a dead constant pool entry instruction. Update
1115 /// sizes and offsets of impacted basic blocks.
1116 void ARMConstantIslands::RemoveDeadCPEMI(MachineInstr *CPEMI) {
1117 MachineBasicBlock *CPEBB = CPEMI->getParent();
1118 unsigned Size = CPEMI->getOperand(2).getImm();
1119 CPEMI->eraseFromParent();
1120 BBSizes[CPEBB->getNumber()] -= Size;
1121 // All succeeding offsets have the current size value added in, fix this.
1122 if (CPEBB->empty()) {
1123 // In thumb1 mode, the size of island may be padded by two to compensate for
1124 // the alignment requirement. Then it will now be 2 when the block is
1125 // empty, so fix this.
1126 // All succeeding offsets have the current size value added in, fix this.
1127 if (BBSizes[CPEBB->getNumber()] != 0) {
1128 Size += BBSizes[CPEBB->getNumber()];
1129 BBSizes[CPEBB->getNumber()] = 0;
1132 AdjustBBOffsetsAfter(CPEBB, -Size);
1133 // An island has only one predecessor BB and one successor BB. Check if
1134 // this BB's predecessor jumps directly to this BB's successor. This
1135 // shouldn't happen currently.
1136 assert(!BBIsJumpedOver(CPEBB) && "How did this happen?");
1137 // FIXME: remove the empty blocks after all the work is done?
1140 /// RemoveUnusedCPEntries - Remove constant pool entries whose refcounts
1142 bool ARMConstantIslands::RemoveUnusedCPEntries() {
1143 unsigned MadeChange = false;
1144 for (unsigned i = 0, e = CPEntries.size(); i != e; ++i) {
1145 std::vector<CPEntry> &CPEs = CPEntries[i];
1146 for (unsigned j = 0, ee = CPEs.size(); j != ee; ++j) {
1147 if (CPEs[j].RefCount == 0 && CPEs[j].CPEMI) {
1148 RemoveDeadCPEMI(CPEs[j].CPEMI);
1149 CPEs[j].CPEMI = NULL;
1157 /// BBIsInRange - Returns true if the distance between specific MI and
1158 /// specific BB can fit in MI's displacement field.
1159 bool ARMConstantIslands::BBIsInRange(MachineInstr *MI,MachineBasicBlock *DestBB,
1161 unsigned PCAdj = isThumb ? 4 : 8;
1162 unsigned BrOffset = GetOffsetOf(MI) + PCAdj;
1163 unsigned DestOffset = BBOffsets[DestBB->getNumber()];
1165 DOUT << "Branch of destination BB#" << DestBB->getNumber()
1166 << " from BB#" << MI->getParent()->getNumber()
1167 << " max delta=" << MaxDisp
1168 << " from " << GetOffsetOf(MI) << " to " << DestOffset
1169 << " offset " << int(DestOffset-BrOffset) << "\t" << *MI;
1171 if (BrOffset <= DestOffset) {
1172 // Branch before the Dest.
1173 if (DestOffset-BrOffset <= MaxDisp)
1176 if (BrOffset-DestOffset <= MaxDisp)
1182 /// FixUpImmediateBr - Fix up an immediate branch whose destination is too far
1183 /// away to fit in its displacement field.
1184 bool ARMConstantIslands::FixUpImmediateBr(MachineFunction &Fn, ImmBranch &Br) {
1185 MachineInstr *MI = Br.MI;
1186 MachineBasicBlock *DestBB = MI->getOperand(0).getMBB();
1188 // Check to see if the DestBB is already in-range.
1189 if (BBIsInRange(MI, DestBB, Br.MaxDisp))
1193 return FixUpUnconditionalBr(Fn, Br);
1194 return FixUpConditionalBr(Fn, Br);
1197 /// FixUpUnconditionalBr - Fix up an unconditional branch whose destination is
1198 /// too far away to fit in its displacement field. If the LR register has been
1199 /// spilled in the epilogue, then we can use BL to implement a far jump.
1200 /// Otherwise, add an intermediate branch instruction to a branch.
1202 ARMConstantIslands::FixUpUnconditionalBr(MachineFunction &Fn, ImmBranch &Br) {
1203 MachineInstr *MI = Br.MI;
1204 MachineBasicBlock *MBB = MI->getParent();
1205 assert(isThumb && !isThumb2 && "Expected a Thumb1 function!");
1207 // Use BL to implement far jump.
1208 Br.MaxDisp = (1 << 21) * 2;
1209 MI->setDesc(TII->get(ARM::tBfar));
1210 BBSizes[MBB->getNumber()] += 2;
1211 AdjustBBOffsetsAfter(MBB, 2);
1215 DOUT << " Changed B to long jump " << *MI;
1220 /// FixUpConditionalBr - Fix up a conditional branch whose destination is too
1221 /// far away to fit in its displacement field. It is converted to an inverse
1222 /// conditional branch + an unconditional branch to the destination.
1224 ARMConstantIslands::FixUpConditionalBr(MachineFunction &Fn, ImmBranch &Br) {
1225 MachineInstr *MI = Br.MI;
1226 MachineBasicBlock *DestBB = MI->getOperand(0).getMBB();
1228 // Add an unconditional branch to the destination and invert the branch
1229 // condition to jump over it:
1235 ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(1).getImm();
1236 CC = ARMCC::getOppositeCondition(CC);
1237 unsigned CCReg = MI->getOperand(2).getReg();
1239 // If the branch is at the end of its MBB and that has a fall-through block,
1240 // direct the updated conditional branch to the fall-through block. Otherwise,
1241 // split the MBB before the next instruction.
1242 MachineBasicBlock *MBB = MI->getParent();
1243 MachineInstr *BMI = &MBB->back();
1244 bool NeedSplit = (BMI != MI) || !BBHasFallthrough(MBB);
1248 if (next(MachineBasicBlock::iterator(MI)) == prior(MBB->end()) &&
1249 BMI->getOpcode() == Br.UncondBr) {
1250 // Last MI in the BB is an unconditional branch. Can we simply invert the
1251 // condition and swap destinations:
1257 MachineBasicBlock *NewDest = BMI->getOperand(0).getMBB();
1258 if (BBIsInRange(MI, NewDest, Br.MaxDisp)) {
1259 DOUT << " Invert Bcc condition and swap its destination with " << *BMI;
1260 BMI->getOperand(0).setMBB(DestBB);
1261 MI->getOperand(0).setMBB(NewDest);
1262 MI->getOperand(1).setImm(CC);
1269 SplitBlockBeforeInstr(MI);
1270 // No need for the branch to the next block. We're adding an unconditional
1271 // branch to the destination.
1272 int delta = TII->GetInstSizeInBytes(&MBB->back());
1273 BBSizes[MBB->getNumber()] -= delta;
1274 MachineBasicBlock* SplitBB = next(MachineFunction::iterator(MBB));
1275 AdjustBBOffsetsAfter(SplitBB, -delta);
1276 MBB->back().eraseFromParent();
1277 // BBOffsets[SplitBB] is wrong temporarily, fixed below
1279 MachineBasicBlock *NextBB = next(MachineFunction::iterator(MBB));
1281 DOUT << " Insert B to BB#" << DestBB->getNumber()
1282 << " also invert condition and change dest. to BB#"
1283 << NextBB->getNumber() << "\n";
1285 // Insert a new conditional branch and a new unconditional branch.
1286 // Also update the ImmBranch as well as adding a new entry for the new branch.
1287 BuildMI(MBB, DebugLoc::getUnknownLoc(),
1288 TII->get(MI->getOpcode()))
1289 .addMBB(NextBB).addImm(CC).addReg(CCReg);
1290 Br.MI = &MBB->back();
1291 BBSizes[MBB->getNumber()] += TII->GetInstSizeInBytes(&MBB->back());
1292 BuildMI(MBB, DebugLoc::getUnknownLoc(), TII->get(Br.UncondBr)).addMBB(DestBB);
1293 BBSizes[MBB->getNumber()] += TII->GetInstSizeInBytes(&MBB->back());
1294 unsigned MaxDisp = getUnconditionalBrDisp(Br.UncondBr);
1295 ImmBranches.push_back(ImmBranch(&MBB->back(), MaxDisp, false, Br.UncondBr));
1297 // Remove the old conditional branch. It may or may not still be in MBB.
1298 BBSizes[MI->getParent()->getNumber()] -= TII->GetInstSizeInBytes(MI);
1299 MI->eraseFromParent();
1301 // The net size change is an addition of one unconditional branch.
1302 int delta = TII->GetInstSizeInBytes(&MBB->back());
1303 AdjustBBOffsetsAfter(MBB, delta);
1307 /// UndoLRSpillRestore - Remove Thumb push / pop instructions that only spills
1308 /// LR / restores LR to pc.
1309 bool ARMConstantIslands::UndoLRSpillRestore() {
1310 bool MadeChange = false;
1311 for (unsigned i = 0, e = PushPopMIs.size(); i != e; ++i) {
1312 MachineInstr *MI = PushPopMIs[i];
1313 if (MI->getOpcode() == ARM::tPOP_RET &&
1314 MI->getOperand(0).getReg() == ARM::PC &&
1315 MI->getNumExplicitOperands() == 1) {
1316 BuildMI(MI->getParent(), MI->getDebugLoc(), TII->get(ARM::tBX_RET));
1317 MI->eraseFromParent();